X64/Invd.asm\r
X64/Wbinvd.asm\r
X64/DisablePaging64.asm\r
- X64/EnablePaging64.asm\r
X64/Mwait.asm\r
X64/Monitor.asm\r
X64/ReadPmc.asm\r
X64/FxSave.S | GCC \r
X64/FxRestore.S | GCC \r
X64/FlushCacheLine.S | GCC \r
- X64/EnablePaging64.S | GCC \r
X64/EnableInterrupts.S | GCC \r
X64/EnableDisableInterrupts.S | GCC \r
X64/DisablePaging64.S | GCC \r
+++ /dev/null
-#------------------------------------------------------------------------------\r
-#\r
-# Copyright (c) 2006 - 2008, Intel Corporation\r
-# All rights reserved. This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-# Module Name:\r
-#\r
-# EnablePaging64.S\r
-#\r
-# Abstract:\r
-#\r
-# AsmEnablePaging64 function\r
-#\r
-# Notes:\r
-#\r
-#------------------------------------------------------------------------------\r
-\r
-\r
-#------------------------------------------------------------------------------\r
-# VOID\r
-# EFIAPI\r
-# InternalX86EnablePaging64 (\r
-# IN UINT16 Cs,\r
-# IN UINT64 EntryPoint,\r
-# IN UINT64 Context1, OPTIONAL\r
-# IN UINT64 Context2, OPTIONAL\r
-# IN UINT64 NewStack\r
-# );\r
-#------------------------------------------------------------------------------\r
-.global ASM_PFX(InternalX86EnablePaging64)\r
-ASM_PFX(InternalX86EnablePaging64):\r
- cli \r
- pop %rax # skip the return address\r
- callq Base\r
-Base:\r
- addl $(L1-Base),(%rsp) # offset for ret, seg is the 1st arg\r
- mov %cr4,%rax\r
- or $0x20,%al\r
- mov %rax,%cr4 # enable PAE\r
- mov $0xc0000080,%ecx\r
- rdmsr \r
- or $0x1,%ah # set LME\r
- wrmsr \r
- mov %cr0,%rax\r
- bts $0x1f,%eax\r
- mov %rax,%cr0 # enable paging\r
- lret \r
-L1: # long mode starts here\r
- addr32 mov (%esp),%rbx\r
- addr32 mov 0x8(%esp),%rcx\r
- addr32 mov 0x10(%esp),%rdx\r
- addr32 mov 0x18(%esp),%rsp\r
- add $-0x20,%rsp\r
- callq *%rbx\r
- jmp . # dead loop if EntryPoint() returned\r
+++ /dev/null
-;------------------------------------------------------------------------------\r
-;\r
-; Copyright (c) 2006 - 2008, Intel Corporation\r
-; All rights reserved. This program and the accompanying materials\r
-; are licensed and made available under the terms and conditions of the BSD License\r
-; which accompanies this distribution. The full text of the license may be found at\r
-; http://opensource.org/licenses/bsd-license.php\r
-;\r
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-;\r
-; Module Name:\r
-;\r
-; EnablePaging64.Asm\r
-;\r
-; Abstract:\r
-;\r
-; AsmEnablePaging64 function\r
-;\r
-; Notes:\r
-;\r
-;------------------------------------------------------------------------------\r
-\r
- .code\r
-\r
-;------------------------------------------------------------------------------\r
-; VOID\r
-; EFIAPI\r
-; InternalX86EnablePaging64 (\r
-; IN UINT16 Cs,\r
-; IN UINT64 EntryPoint,\r
-; IN UINT64 Context1, OPTIONAL\r
-; IN UINT64 Context2, OPTIONAL\r
-; IN UINT64 NewStack\r
-; );\r
-;------------------------------------------------------------------------------\r
-InternalX86EnablePaging64 PROC\r
- cli\r
- pop rax ; skip the return address\r
- call @Base\r
-@Base:\r
- add dword ptr [rsp], @F - @Base ; offset for far retf, seg is the 1st arg\r
- mov rax, cr4\r
- or al, (1 SHL 5)\r
- mov cr4, rax ; enable PAE\r
- mov ecx, 0c0000080h\r
- rdmsr\r
- or ah, 1 ; set LME\r
- wrmsr\r
- mov rax, cr0\r
- bts eax, 31\r
- mov cr0, rax ; enable paging\r
- retf\r
-@@: ; long mode starts here\r
- mov rbx, [esp]\r
- mov rcx, [esp + 8]\r
- mov rdx, [esp + 10h]\r
- mov rsp, [esp + 18h]\r
- add rsp, -20h\r
- call rbx\r
- hlt ; halt processor if EntryPoint() returned\r
-InternalX86EnablePaging64 ENDP\r
-\r
- END\r
//\r
ASSERT (FALSE);\r
}\r
+\r
+\r
+/**\r
+ Enables the 64-bit paging mode on the CPU.\r
+\r
+ Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r
+ must be properly initialized prior to calling this service. This function\r
+ assumes the current execution mode is 32-bit protected mode with flat\r
+ descriptors. This function is only available on IA-32. After the 64-bit\r
+ paging mode is enabled, control is transferred to the function specified by\r
+ EntryPoint using the new stack specified by NewStack and passing in the\r
+ parameters specified by Context1 and Context2. Context1 and Context2 are\r
+ optional and may be 0. The function EntryPoint must never return.\r
+\r
+ @param Cs The 16-bit selector to load in the CS before EntryPoint\r
+ is called. The descriptor in the GDT that this selector\r
+ references must be setup for long mode.\r
+ @param EntryPoint The 64-bit virtual address of the function to call with\r
+ the new stack after paging is enabled.\r
+ @param Context1 The 64-bit virtual address of the context to pass into\r
+ the EntryPoint function as the first parameter after\r
+ paging is enabled.\r
+ @param Context2 The 64-bit virtual address of the context to pass into\r
+ the EntryPoint function as the second parameter after\r
+ paging is enabled.\r
+ @param NewStack The 64-bit virtual address of the new stack to use for\r
+ the EntryPoint function after paging is enabled.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalX86EnablePaging64 (\r
+ IN UINT16 Cs,\r
+ IN UINT64 EntryPoint,\r
+ IN UINT64 Context1, OPTIONAL\r
+ IN UINT64 Context2, OPTIONAL\r
+ IN UINT64 NewStack\r
+ )\r
+{\r
+ //\r
+ // This function cannot work on x64 platform.\r
+ //\r
+ ASSERT (FALSE);\r
+}\r
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