1) Clean up MdePkg/Include/Common/BootScript.h and remove boot script definition...
authorqwang12 <qwang12@6f19259b-4bc3-4df7-8a09-765794883524>
Thu, 18 Jan 2007 09:15:52 +0000 (09:15 +0000)
committerqwang12 <qwang12@6f19259b-4bc3-4df7-8a09-765794883524>
Thu, 18 Jan 2007 09:15:52 +0000 (09:15 +0000)
2) Add MdePkg/Include/IndustryStandard/SmBus.h which hosts the standard definition defined in System Management Bus Spefication V2.0.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2266 6f19259b-4bc3-4df7-8a09-765794883524

MdePkg/Include/Common/BootScript.h
MdePkg/Include/IndustryStandard/SmBus.h [new file with mode: 0644]
MdePkg/Include/Ppi/Smbus.h
MdePkg/Include/Protocol/Smbus.h

index ef44425..7f7c229 100644 (file)
@@ -1,7 +1,7 @@
 /** @file\r
-  This file declares the related BootScript definitions and some SMBus definitions.\r
+  This file declares the related BootScript definitions.\r
 \r
-  Copyright (c) 2006, Intel Corporation                                                         \r
+  Copyright (c) 2006 - 2007, Intel Corporation                                                         \r
   All rights reserved. This program and the accompanying materials                          \r
   are licensed and made available under the terms and conditions of the BSD License         \r
   which accompanies this distribution.  The full text of the license may be found at        \r
   Module Name:  BootScript.h\r
 \r
   @par Revision Reference:\r
-  These definitions are defined in BootScript Spec 0.91 and SmBus PPI spec 0.9.\r
+  These definitions are defined in BootScript Spec 0.91.\r
 \r
 **/\r
 \r
-#ifndef _EFI_SCRIPT_H_\r
-#define _EFI_SCRIPT_H_\r
+#ifndef _EFI_BOOT_SCRIPT_H_\r
+#define _EFI_BOOT_SCRIPT_H_\r
 \r
 #define EFI_ACPI_S3_RESUME_SCRIPT_TABLE               0x00\r
 \r
 #define EFI_BOOT_SCRIPT_TABLE_OPCODE                  0xAA\r
 #define EFI_BOOT_SCRIPT_TERMINATE_OPCODE              0xFF\r
 \r
-#ifndef __GNUC__\r
-#pragma pack(1)\r
-#endif\r
-\r
 //\r
 // EFI Boot Script Width\r
 //\r
@@ -64,161 +60,4 @@ typedef enum {
   EfiBootScriptWidthMaximum\r
 } EFI_BOOT_SCRIPT_WIDTH;\r
 \r
-//\r
-// EFI Smbus Device Address, Smbus Device Command, Smbus Operation\r
-//\r
-typedef struct {\r
-  UINTN SmbusDeviceAddress : 7;\r
-} EFI_SMBUS_DEVICE_ADDRESS;\r
-\r
-typedef UINTN EFI_SMBUS_DEVICE_COMMAND;\r
-\r
-typedef enum _EFI_SMBUS_OPERATION\r
-{\r
-  EfiSmbusQuickRead,\r
-  EfiSmbusQuickWrite,\r
-  EfiSmbusReceiveByte,\r
-  EfiSmbusSendByte,\r
-  EfiSmbusReadByte,\r
-  EfiSmbusWriteByte,\r
-  EfiSmbusReadWord,\r
-  EfiSmbusWriteWord,\r
-  EfiSmbusReadBlock,\r
-  EfiSmbusWriteBlock,\r
-  EfiSmbusProcessCall,\r
-  EfiSmbusBWBRProcessCall\r
-} EFI_SMBUS_OPERATION;\r
-\r
-//\r
-// Boot Script Opcode Header Structure Definitions\r
-//\r
-\r
-typedef struct {\r
-  UINT16  OpCode;\r
-  UINT8   Length;\r
-} EFI_BOOT_SCRIPT_GENERIC_HEADER;\r
-\r
-typedef struct {\r
-  UINT16  OpCode;\r
-  UINT8   Length;\r
-  UINT16  Version;\r
-  UINT32  TableLength;\r
-  UINT16  Reserved[2];\r
-} EFI_BOOT_SCRIPT_TABLE_HEADER;\r
-\r
-typedef struct {\r
-  UINT16                OpCode;\r
-  UINT8                 Length;\r
-  UINT32                Width;\r
-} EFI_BOOT_SCRIPT_COMMON_HEADER;\r
-\r
-typedef struct {\r
-  UINT16                OpCode;\r
-  UINT8                 Length;\r
-  UINT32                Width;\r
-  UINT32                Count;\r
-  UINT64                Address;\r
-} EFI_BOOT_SCRIPT_IO_WRITE;\r
-\r
-typedef struct {\r
-  UINT16                OpCode;\r
-  UINT8                 Length;\r
-  UINT32                Width;\r
-  UINT64                Address;\r
-} EFI_BOOT_SCRIPT_IO_READ_WRITE;\r
-\r
-typedef struct {\r
-  UINT16                OpCode;\r
-  UINT8                 Length;\r
-  UINT32                Width;\r
-  UINT32                Count;\r
-  UINT64                Address;\r
-} EFI_BOOT_SCRIPT_MEM_WRITE;\r
-\r
-typedef struct {\r
-  UINT16                OpCode;\r
-  UINT8                 Length;\r
-  UINT32                Width;\r
-  UINT64                Address;\r
-} EFI_BOOT_SCRIPT_MEM_READ_WRITE;\r
-\r
-typedef struct {\r
-  UINT16                OpCode;\r
-  UINT8                 Length;\r
-  UINT32                Width;\r
-  UINT32                Count;\r
-  UINT64                Address;\r
-} EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE;\r
-\r
-typedef struct {\r
-  UINT16                OpCode;\r
-  UINT8                 Length;\r
-  UINT32                Width;\r
-  UINT64                Address;\r
-} EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE;\r
-\r
-typedef struct {\r
-  UINT16                    OpCode;\r
-  UINT8                     Length;\r
-  UINT64                    SlaveAddress;\r
-  UINT64                    Command;\r
-  UINT32                    Operation;\r
-  BOOLEAN                   PecCheck;\r
-  UINT32                    DataSize;\r
-} EFI_BOOT_SCRIPT_SMBUS_EXECUTE;\r
-\r
-typedef struct {\r
-  UINT16  OpCode;\r
-  UINT8   Length;\r
-  UINT64  Duration;\r
-} EFI_BOOT_SCRIPT_STALL;\r
-\r
-typedef struct {\r
-  UINT16                OpCode;\r
-  UINT8                 Length;\r
-  EFI_PHYSICAL_ADDRESS  EntryPoint;\r
-} EFI_BOOT_SCRIPT_DISPATCH;\r
-\r
-typedef struct {\r
-  UINT16                OpCode;\r
-  UINT8                 Length;\r
-  EFI_PHYSICAL_ADDRESS  EntryPoint;\r
-  EFI_PHYSICAL_ADDRESS  Context;\r
-} EFI_BOOT_SCRIPT_DISPATCH_2;\r
-\r
-typedef struct {\r
-  UINT16  OpCode;\r
-  UINT8   Length;\r
-  UINT32                InformationLength;  \r
-  EFI_PHYSICAL_ADDRESS  Information;\r
-} EFI_BOOT_SCRIPT_INFORMATION;\r
-\r
-typedef struct {\r
-  UINT16  OpCode;\r
-  UINT8   Length;\r
-} EFI_BOOT_SCRIPT_TERMINATE;\r
-\r
-typedef union {\r
-  EFI_BOOT_SCRIPT_GENERIC_HEADER        *Header;\r
-  EFI_BOOT_SCRIPT_TABLE_HEADER          *TableInfo;\r
-  EFI_BOOT_SCRIPT_IO_WRITE              *IoWrite;\r
-  EFI_BOOT_SCRIPT_IO_READ_WRITE         *IoReadWrite;\r
-  EFI_BOOT_SCRIPT_MEM_WRITE             *MemWrite;\r
-  EFI_BOOT_SCRIPT_MEM_READ_WRITE        *MemReadWrite;\r
-  EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE      *PciWrite;\r
-  EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE *PciReadWrite;\r
-  EFI_BOOT_SCRIPT_SMBUS_EXECUTE         *SmbusExecute;\r
-  EFI_BOOT_SCRIPT_STALL                 *Stall;\r
-  EFI_BOOT_SCRIPT_DISPATCH              *Dispatch;\r
-  EFI_BOOT_SCRIPT_DISPATCH_2            *Dispatch2;  \r
-  EFI_BOOT_SCRIPT_INFORMATION           *Information;\r
-  EFI_BOOT_SCRIPT_TERMINATE             *Terminate;\r
-  EFI_BOOT_SCRIPT_COMMON_HEADER         *CommonHeader;\r
-  UINT8                                 *Raw;\r
-} BOOT_SCRIPT_POINTERS;\r
-\r
-#ifndef __GNUC__\r
-#pragma pack()\r
-#endif\r
-\r
 #endif\r
diff --git a/MdePkg/Include/IndustryStandard/SmBus.h b/MdePkg/Include/IndustryStandard/SmBus.h
new file mode 100644 (file)
index 0000000..d2755dd
--- /dev/null
@@ -0,0 +1,94 @@
+/** @file\r
+  This file declares the SMBus definitions defined in SmBus Specifciation\r
+  V2.0.\r
+\r
+  Copyright (c) 2007, Intel Corporation                                                         \r
+  All rights reserved. This program and the accompanying materials                          \r
+  are licensed and made available under the terms and conditions of the BSD License         \r
+  which accompanies this distribution.  The full text of the license may be found at        \r
+  http://opensource.org/licenses/bsd-license.php                                            \r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
+\r
+  @par Revision Reference:\r
+  These definitions are defined in System Management Bus (SmBus) Specification V2.0.\r
+\r
+**/\r
+\r
+#ifndef _SMBUS_H_\r
+#define _SMBUS_H_\r
+\r
+//\r
+// Smbus Device Address, Smbus Device Command, Smbus Operations\r
+//\r
+typedef struct {\r
+  UINTN SmbusDeviceAddress : 7;\r
+} EFI_SMBUS_DEVICE_ADDRESS;\r
+\r
+typedef UINTN EFI_SMBUS_DEVICE_COMMAND;\r
+\r
+typedef enum _EFI_SMBUS_OPERATION\r
+{\r
+  EfiSmbusQuickRead,\r
+  EfiSmbusQuickWrite,\r
+  EfiSmbusReceiveByte,\r
+  EfiSmbusSendByte,\r
+  EfiSmbusReadByte,\r
+  EfiSmbusWriteByte,\r
+  EfiSmbusReadWord,\r
+  EfiSmbusWriteWord,\r
+  EfiSmbusReadBlock,\r
+  EfiSmbusWriteBlock,\r
+  EfiSmbusProcessCall,\r
+  EfiSmbusBWBRProcessCall\r
+} EFI_SMBUS_OPERATION;\r
+\r
+#endif\r
+/** @file\r
+  This file declares the SMBus definitions defined in SmBus Specifciation\r
+  V2.0.\r
+\r
+  Copyright (c) 2007, Intel Corporation                                                         \r
+  All rights reserved. This program and the accompanying materials                          \r
+  are licensed and made available under the terms and conditions of the BSD License         \r
+  which accompanies this distribution.  The full text of the license may be found at        \r
+  http://opensource.org/licenses/bsd-license.php                                            \r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
+\r
+  @par Revision Reference:\r
+  These definitions are defined in System Management Bus (SmBus) Specification V2.0.\r
+\r
+**/\r
+\r
+#ifndef _SMBUS_H_\r
+#define _SMBUS_H_\r
+\r
+//\r
+// Smbus Device Address, Smbus Device Command, Smbus Operations\r
+//\r
+typedef struct {\r
+  UINTN SmbusDeviceAddress : 7;\r
+} EFI_SMBUS_DEVICE_ADDRESS;\r
+\r
+typedef UINTN EFI_SMBUS_DEVICE_COMMAND;\r
+\r
+typedef enum _EFI_SMBUS_OPERATION\r
+{\r
+  EfiSmbusQuickRead,\r
+  EfiSmbusQuickWrite,\r
+  EfiSmbusReceiveByte,\r
+  EfiSmbusSendByte,\r
+  EfiSmbusReadByte,\r
+  EfiSmbusWriteByte,\r
+  EfiSmbusReadWord,\r
+  EfiSmbusWriteWord,\r
+  EfiSmbusReadBlock,\r
+  EfiSmbusWriteBlock,\r
+  EfiSmbusProcessCall,\r
+  EfiSmbusBWBRProcessCall\r
+} EFI_SMBUS_OPERATION;\r
+\r
+#endif\r
index c0e1d90..d2acae7 100644 (file)
@@ -1,7 +1,7 @@
 /** @file\r
   This file declares Smbus PPI.\r
 \r
-  Copyright (c) 2006, Intel Corporation                                                         \r
+  Copyright (c) 2006 - 2007, Intel Corporation                                                         \r
   All rights reserved. This program and the accompanying materials                          \r
   are licensed and made available under the terms and conditions of the BSD License         \r
   which accompanies this distribution.  The full text of the license may be found at        \r
@@ -21,6 +21,8 @@
 #ifndef _PEI_SMBUS_PPI_H\r
 #define _PEI_SMBUS_PPI_H\r
 \r
+#include <IndustryStandard/SmBus.h>\r
+\r
 #define EFI_PEI_SMBUS_PPI_GUID \\r
   { \\r
     0xabd42895, 0x78cf, 0x4872, {0x84, 0x44, 0x1b, 0x5c, 0x18, 0xb, 0xfb, 0xda } \\r
index 1150933..b63d26f 100644 (file)
@@ -1,7 +1,7 @@
 /** @file\r
   This file declares the EFI SMBus Host Controller protocol\r
 \r
-  Copyright (c) 2006, Intel Corporation                                                         \r
+  Copyright (c) 2006 - 2007, Intel Corporation                                                         \r
   All rights reserved. This program and the accompanying materials                          \r
   are licensed and made available under the terms and conditions of the BSD License         \r
   which accompanies this distribution.  The full text of the license may be found at        \r
@@ -21,6 +21,8 @@
 #ifndef _EFI_SMBUS_H\r
 #define _EFI_SMBUS_H\r
 \r
+#include <IndustryStandard/SmBus.h>\r
+\r
 #define EFI_SMBUS_HC_PROTOCOL_GUID \\r
   { \\r
     0xe49d33ed, 0x513d, 0x4634, {0xb6, 0x98, 0x6f, 0x55, 0xaa, 0x75, 0x1c, 0x1b } \\r