MdePkg/Cpuid.h: Add CPUID_HYBRID_INFORMATION Leaf(1Ah).

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3105

The UefiCpuPkg/CpuCacheInfoLib will reference new definition
about CPUID_HYBRID_INFORMATION Leaf(1Ah).

Signed-off-by: Jason Lou <yun.lou@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>

diff --git a/MdePkg/Include/Register/Intel/Cpuid.h b/MdePkg/Include/Register/Intel/Cpuid.h
index d4496079570df44172af8dd5103217ee05cb3342..dd1b64a1e50b64e4814db60540c8df69a2c04104 100644 (file)
--- a/MdePkg/Include/Register/Intel/Cpuid.h
+++ b/MdePkg/Include/Register/Intel/Cpuid.h
@@ -1278,7 +1278,7 @@ typedef union {
   @retval  EAX  The maximum input value for ECX to retrieve sub-leaf information.\r
   @retval  EBX  Structured Extended Feature Flags described by the type\r
                 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EBX.\r
-  @retval  EBX  Structured Extended Feature Flags described by the type\r
+  @retval  ECX  Structured Extended Feature Flags described by the type\r
                 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX.\r
   @retval  EDX  Reserved.\r
 \r
@@ -3597,6 +3597,67 @@ typedef union {
 ///\r
 \r
 \r
+/**\r
+  CPUID Hybrid Information Enumeration Leaf\r
+\r
+  @param   EAX  CPUID_HYBRID_INFORMATION (0x1A)\r
+  @param   ECX  CPUID_HYBRID_INFORMATION_SUB_LEAF (0x00).\r
+\r
+  @retval  EAX  Enumerates the native model ID and core type described\r
+                by the type CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX\r
+  @retval  EBX  Reserved.\r
+  @retval  ECX  Reserved.\r
+  @retval  EDX  Reserved.\r
+\r
+  <b>Example usage</b>\r
+  @code\r
+  CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX          Eax;\r
+\r
+  AsmCpuidEx (\r
+    CPUID_HYBRID_INFORMATION,\r
+    CPUID_HYBRID_INFORMATION_SUB_LEAF,\r
+    &Eax, NULL, NULL, NULL\r
+    );\r
+  @endcode\r
+\r
+**/\r
+#define CPUID_HYBRID_INFORMATION                                       0x1A\r
+\r
+///\r
+/// CPUID Hybrid Information Enumeration sub-leaf\r
+///\r
+#define CPUID_HYBRID_INFORMATION_SUB_LEAF                               0x00\r
+\r
+/**\r
+  CPUID Hybrid Information EAX for CPUID leaf #CPUID_HYBRID_INFORMATION,\r
+  sub-leaf #CPUID_HYBRID_INFORMATION_SUB_LEAF.\r
+**/\r
+typedef union {\r
+  ///\r
+  /// Individual bit fields\r
+  ///\r
+  struct {\r
+    ///\r
+    /// [Bit 23:0] Native model ID of the core.\r
+    ///\r
+    /// The core-type and native mode ID can be used to uniquely identify\r
+    /// the microarchitecture of the core.This native model ID is not unique\r
+    /// across core types, and not related to the model ID reported in CPUID\r
+    /// leaf 01H, and does not identify the SOC.\r
+    ///\r
+    UINT32  NativeModelId:24;\r
+    ///\r
+    /// [Bit 31:24] Core type\r
+    ///\r
+    UINT32  CoreType:8;\r
+  } Bits;\r
+  ///\r
+  /// All bit fields as a 32-bit value\r
+  ///\r
+  UINT32  Uint32;\r
+} CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX;\r
+\r
+\r
 /**\r
   CPUID V2 Extended Topology Enumeration Leaf\r
 \r