MdePkg/BaseLib: Added ARM Aarch64 architecture support

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14515 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index db075963990c4829de16a42f587a80f1fb4b0fb7..cba5ab6b15e1d31aa6da92991a95ef0a1c7697a2 100644 (file)
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -146,6 +146,39 @@ typedef struct {
 \r
 #endif  // defined (MDE_CPU_ARM)\r
 \r
+#if defined (MDE_CPU_AARCH64)\r
+typedef struct {\r
+  // GP regs\r
+  UINT64    X19;\r
+  UINT64    X20;\r
+  UINT64    X21;\r
+  UINT64    X22;\r
+  UINT64    X23;\r
+  UINT64    X24;\r
+  UINT64    X25;\r
+  UINT64    X26;\r
+  UINT64    X27;\r
+  UINT64    X28;\r
+  UINT64    FP;\r
+  UINT64    LR;\r
+  UINT64    IP0;\r
+\r
+  // FP regs\r
+  UINT64    D8;\r
+  UINT64    D9;\r
+  UINT64    D10;\r
+  UINT64    D11;\r
+  UINT64    D12;\r
+  UINT64    D13;\r
+  UINT64    D14;\r
+  UINT64    D15;\r
+} BASE_LIBRARY_JUMP_BUFFER;\r
+\r
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
+\r
+#endif  // defined (MDE_CPU_AARCH64)\r
+\r
+\r
 //\r
 // String Services\r
 //\r

diff --git a/MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.S b/MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.S
new file mode 100644 (file)
index 0000000..fe8c571
--- /dev/null
+++ b/MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.S
@@ -0,0 +1,37 @@
+#------------------------------------------------------------------------------\r
+#\r
+# CpuBreakpoint() for AArch64\r
+#\r
+# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php.\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.text\r
+.p2align 2\r
+ASM_GLOBAL ASM_PFX(CpuBreakpoint)\r
+\r
+#/**\r
+#  Generates a breakpoint on the CPU.\r
+#\r
+#  Generates a breakpoint on the CPU. The breakpoint must be implemented such\r
+#  that code can resume normal execution after the breakpoint.\r
+#\r
+#**/\r
+#VOID\r
+#EFIAPI\r
+#CpuBreakpoint (\r
+#  VOID\r
+#  );\r
+#\r
+ASM_PFX(CpuBreakpoint):\r
+    svc   0xdbdb    // Superviser exception. Takes 16bit arg -> Armv7 had 'swi' here.\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.S b/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.S
new file mode 100644 (file)
index 0000000..b80a7b4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.S
@@ -0,0 +1,34 @@
+#------------------------------------------------------------------------------\r
+#\r
+# DisableInterrupts() for AArch64\r
+#\r
+# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php.\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.text\r
+.p2align 2\r
+ASM_GLOBAL ASM_PFX(DisableInterrupts)\r
+\r
+#/**\r
+#  Disables CPU interrupts.\r
+#\r
+#**/\r
+#VOID\r
+#EFIAPI\r
+#DisableInterrupts (\r
+#  VOID\r
+#  );\r
+#\r
+ASM_PFX(DisableInterrupts):\r
+   msr  daifset, #2\r
+   ret\r

diff --git a/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.S b/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.S
new file mode 100644 (file)
index 0000000..289739c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.S
@@ -0,0 +1,35 @@
+#------------------------------------------------------------------------------\r
+#\r
+# EnableInterrupts() for AArch64\r
+#\r
+# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php.\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.text\r
+.p2align 2\r
+ASM_GLOBAL ASM_PFX(EnableInterrupts)\r
+\r
+\r
+#/**\r
+#  Enables CPU interrupts.\r
+#\r
+#**/\r
+#VOID\r
+#EFIAPI\r
+#EnableInterrupts (\r
+#  VOID\r
+#  );\r
+#\r
+ASM_PFX(EnableInterrupts):\r
+    msr  daifclr, #2\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/AArch64/GetInterruptsState.S b/MdePkg/Library/BaseLib/AArch64/GetInterruptsState.S
new file mode 100644 (file)
index 0000000..5a971f5
--- /dev/null
+++ b/MdePkg/Library/BaseLib/AArch64/GetInterruptsState.S
@@ -0,0 +1,45 @@
+#------------------------------------------------------------------------------\r
+#\r
+# GetInterruptState() function for AArch64\r
+#\r
+# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php.\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.text\r
+.p2align 2\r
+ASM_GLOBAL ASM_PFX(GetInterruptState)\r
+\r
+#/**\r
+#  Retrieves the current CPU interrupt state.\r
+#\r
+#  Returns TRUE is interrupts are currently enabled. Otherwise\r
+#  returns FALSE.\r
+#\r
+#  @retval TRUE  CPU interrupts are enabled.\r
+#  @retval FALSE CPU interrupts are disabled.\r
+#\r
+#**/\r
+#\r
+#BOOLEAN\r
+#EFIAPI\r
+#GetInterruptState (\r
+#  VOID\r
+# );\r
+#\r
+ASM_PFX(GetInterruptState):\r
+    mrs    x0, daif\r
+    tst    x0, #2            // Check if IRQ is enabled. Enabled if 0.\r
+    mov    w0, #0\r
+    mov    w1, #1\r
+    csel   w0, w1, w0, ne\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/AArch64/SetJumpLongJump.S b/MdePkg/Library/BaseLib/AArch64/SetJumpLongJump.S
new file mode 100644 (file)
index 0000000..dbc5adb
--- /dev/null
+++ b/MdePkg/Library/BaseLib/AArch64/SetJumpLongJump.S
@@ -0,0 +1,97 @@
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2009-2013, ARM Ltd.  All rights reserved.\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php.\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#------------------------------------------------------------------------------\r
+.text\r
+.p2align 3\r
+\r
+ASM_GLOBAL ASM_PFX(SetJump)\r
+ASM_GLOBAL ASM_PFX(InternalLongJump)\r
+\r
+#define GPR_LAYOUT                         \\r
+        REG_PAIR (x19, x20,  0);           \\r
+        REG_PAIR (x21, x22, 16);           \\r
+        REG_PAIR (x23, x24, 32);           \\r
+        REG_PAIR (x25, x26, 48);           \\r
+        REG_PAIR (x27, x28, 64);           \\r
+        REG_PAIR (x29, x30, 80);/*FP, LR*/ \\r
+        REG_ONE  (x16,      96) /*IP0*/\r
+\r
+#define FPR_LAYOUT                      \\r
+        REG_PAIR ( d8,  d9, 112);       \\r
+        REG_PAIR (d10, d11, 128);       \\r
+        REG_PAIR (d12, d13, 144);       \\r
+        REG_PAIR (d14, d15, 160);\r
+\r
+#/**\r
+#  Saves the current CPU context that can be restored with a call to LongJump() and returns 0.#\r
+#\r
+#  Saves the current CPU context in the buffer specified by JumpBuffer and returns 0.  The initial\r
+#  call to SetJump() must always return 0.  Subsequent calls to LongJump() cause a non-zero\r
+#  value to be returned by SetJump().\r
+#\r
+#  If JumpBuffer is NULL, then ASSERT().\r
+#  For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
+#\r
+#  @param  JumpBuffer    A pointer to CPU context buffer.\r
+#\r
+#**/\r
+#\r
+#UINTN\r
+#EFIAPI\r
+#SetJump (\r
+#  IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer  // X0\r
+#  );\r
+#\r
+ASM_PFX(SetJump):\r
+        mov     x16, sp // use IP0 so save SP\r
+#define REG_PAIR(REG1, REG2, OFFS)      stp REG1, REG2, [x0, OFFS]\r
+#define REG_ONE(REG1, OFFS)             str REG1, [x0, OFFS]\r
+        GPR_LAYOUT\r
+        FPR_LAYOUT\r
+#undef REG_PAIR\r
+#undef REG_ONE\r
+        mov     w0, #0\r
+        ret\r
+\r
+#/**\r
+#  Restores the CPU context that was saved with SetJump().#\r
+#\r
+#  Restores the CPU context from the buffer specified by JumpBuffer.\r
+#  This function never returns to the caller.\r
+#  Instead is resumes execution based on the state of JumpBuffer.\r
+#\r
+#  @param  JumpBuffer    A pointer to CPU context buffer.\r
+#  @param  Value         The value to return when the SetJump() context is restored.\r
+#\r
+#**/\r
+#VOID\r
+#EFIAPI\r
+#InternalLongJump (\r
+#  IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer,  // X0\r
+#  IN      UINTN                     Value         // X1\r
+#  );\r
+#\r
+ASM_PFX(InternalLongJump):\r
+#define REG_PAIR(REG1, REG2, OFFS)      ldp REG1, REG2, [x0, OFFS]\r
+#define REG_ONE(REG1, OFFS)             ldr REG1, [x0, OFFS]\r
+        GPR_LAYOUT\r
+        FPR_LAYOUT\r
+#undef REG_PAIR\r
+#undef REG_ONE\r
+        mov     sp, x16\r
+        cmp     w1, #0\r
+        mov     w0, #1\r
+        csel    w0, w1, w0, ne\r
+        // use br not ret, as ret is guaranteed to mispredict\r
+        br      x30\r
+\r
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED\r

diff --git a/MdePkg/Library/BaseLib/AArch64/SwitchStack.S b/MdePkg/Library/BaseLib/AArch64/SwitchStack.S
new file mode 100644 (file)
index 0000000..207a569
--- /dev/null
+++ b/MdePkg/Library/BaseLib/AArch64/SwitchStack.S
@@ -0,0 +1,68 @@
+//------------------------------------------------------------------------------\r
+//\r
+// Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+// Portions copyright (c) 2011 - 2013, ARM Limited. All rights reserved.<BR>\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution.  The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php.\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//------------------------------------------------------------------------------\r
+\r
+.text\r
+.align 5\r
+\r
+ASM_GLOBAL ASM_PFX(InternalSwitchStackAsm)\r
+ASM_GLOBAL ASM_PFX(CpuPause)\r
+\r
+/**\r
+//\r
+//  This allows the caller to switch the stack and goes to the new entry point\r
+//\r
+// @param      EntryPoint   The pointer to the location to enter\r
+// @param      Context      Parameter to pass in\r
+// @param      Context2     Parameter2 to pass in\r
+// @param      NewStack     New Location of the stack\r
+//\r
+// @return     Nothing. Goes to the Entry Point passing in the new parameters\r
+//\r
+VOID\r
+EFIAPI\r
+InternalSwitchStackAsm (\r
+  SWITCH_STACK_ENTRY_POINT EntryPoint,\r
+  VOID  *Context,\r
+  VOID  *Context2,\r
+  VOID  *NewStack\r
+  );\r
+**/\r
+ASM_PFX(InternalSwitchStackAsm):\r
+    mov   x30, x0\r
+    mov   sp, x3\r
+    mov   x0, x1\r
+    mov   x1, x2\r
+    ret\r
+\r
+/**\r
+//\r
+//  Requests CPU to pause for a short period of time.\r
+//\r
+//  Requests CPU to pause for a short period of time. Typically used in MP\r
+//  systems to prevent memory starvation while waiting for a spin lock.\r
+//\r
+VOID\r
+EFIAPI\r
+CpuPause (\r
+  VOID\r
+  )\r
+**/\r
+ASM_PFX(CpuPause):\r
+    nop\r
+    nop\r
+    nop\r
+    nop\r
+    nop\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index f54c3bc32b1fd6b6667a9095025ab5388b25f486..3e47b55d19877f3d338646fd7104310e70628831 100644 (file)
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -3,6 +3,7 @@
 #\r
 #  Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+#  Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
 #\r
 #  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
@@ -23,7 +24,7 @@
   LIBRARY_CLASS                  = BaseLib \r
 \r
 #\r
-#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC ARM\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC ARM AARCH64\r
 #\r
 \r
 [Sources]\r
@@ -476,6 +477,18 @@
   Arm/SetJumpLongJump.S         | GCC\r
   Arm/CpuBreakpoint.S           | GCC\r
 \r
+[Sources.AARCH64]\r
+  Arm/InternalSwitchStack.c\r
+  Arm/Unaligned.c\r
+  Math64.c\r
+\r
+  AArch64/SwitchStack.S             | GCC\r
+  AArch64/EnableInterrupts.S        | GCC\r
+  AArch64/DisableInterrupts.S       | GCC\r
+  AArch64/GetInterruptsState.S      | GCC\r
+  AArch64/SetJumpLongJump.S         | GCC\r
+  AArch64/CpuBreakpoint.S           | GCC\r
+\r
 [Packages]\r
   MdePkg/MdePkg.dec\r
 \r