ArmPkg/ArmLib: Added new functions to access ARM coprocessors

Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13253 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index 50cd50212fc204e70ae9914aeea2a2ab1799753f..f34ab42ced4329783775057c7aba631c4884b270 100644 (file)
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -443,6 +443,12 @@ ArmSetAuxCrBit (
   IN  UINT32    Bits
   );
 
+VOID
+EFIAPI
+ArmUnsetAuxCrBit (
+  IN  UINT32    Bits
+  );
+
 VOID
 EFIAPI
 ArmCallSEV (
@@ -455,6 +461,8 @@ ArmCallWFE (
   VOID
   );
 
+VOID
+EFIAPI
 ArmCallWFI (
   VOID
   );
@@ -465,9 +473,15 @@ ArmReadMpidr (
   VOID
   );
 
+UINT32
+EFIAPI
+ArmReadCpacr (
+  VOID
+  );
+
 VOID
 EFIAPI
-ArmWriteCPACR (
+ArmWriteCpacr (
   IN  UINT32   Access
   );
 
@@ -477,22 +491,46 @@ ArmEnableVFP (
   VOID
   );
 
+UINT32
+EFIAPI
+ArmReadNsacr (
+  VOID
+  );
+
 VOID
 EFIAPI
 ArmWriteNsacr (
   IN  UINT32   SetWayFormat
   );
 
+UINT32
+EFIAPI
+ArmReadScr (
+  VOID
+  );
+
 VOID
 EFIAPI
 ArmWriteScr (
   IN  UINT32   SetWayFormat
   );
 
+UINT32
+EFIAPI
+ArmReadMVBar (
+  VOID
+  );
+
 VOID
 EFIAPI
-ArmWriteVMBar (
+ArmWriteMVBar (
   IN  UINT32   VectorMonitorBase
   );
 
+UINT32
+EFIAPI
+ArmReadSctlr (
+  VOID
+  );
+
 #endif // __ARM_LIB__

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
index 5ac35524036a6ba0ab36e24cc8b1ad9e98a2be7a..910e50e40182b1578e6536e48adb236b9a5cb7ea 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
@@ -42,6 +42,7 @@ GCC_ASM_EXPORT (ArmV7PerformPoUDataCacheOperation)
 GCC_ASM_EXPORT (ArmDataMemoryBarrier)\r
 GCC_ASM_EXPORT (ArmDataSyncronizationBarrier)\r
 GCC_ASM_EXPORT (ArmInstructionSynchronizationBarrier)\r
+GCC_ASM_EXPORT (ArmReadVBar)\r
 GCC_ASM_EXPORT (ArmWriteVBar)\r
 GCC_ASM_EXPORT (ArmEnableVFP)\r
 GCC_ASM_EXPORT (ArmCallWFI)\r
@@ -330,6 +331,11 @@ ASM_PFX(ArmInstructionSynchronizationBarrier):
   isb\r
   bx      LR\r
 \r
+ASM_PFX(ArmReadVBar):\r
+  # Set the Address of the Vector Table in the VBAR register\r
+  mrc     p15, 0, r0, c12, c0, 0\r
+  bx      lr\r
+\r
 ASM_PFX(ArmWriteVBar):\r
   # Set the Address of the Vector Table in the VBAR register\r
   mcr     p15, 0, r0, c12, c0, 0 \r

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
index 8fedcdba97180beb6d4167bf379942bda26a4ddb..80354005997c3efd4ee897ad15a02e333d20a3ad 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
@@ -39,6 +39,7 @@
     EXPORT  ArmDataMemoryBarrier\r
     EXPORT  ArmDataSyncronizationBarrier\r
     EXPORT  ArmInstructionSynchronizationBarrier\r
+    EXPORT  ArmReadVBar\r
     EXPORT  ArmWriteVBar\r
     EXPORT  ArmEnableVFP\r
     EXPORT  ArmCallWFI\r
@@ -324,6 +325,11 @@ ArmInstructionSynchronizationBarrier
   isb\r
   bx      LR\r
 \r
+ArmReadVBar\r
+  // Set the Address of the Vector Table in the VBAR register\r
+  mrc     p15, 0, r0, c12, c0, 0\r
+  bx      lr\r
+\r
 ArmWriteVBar\r
   // Set the Address of the Vector Table in the VBAR register\r
   mcr     p15, 0, r0, c12, c0, 0 \r

diff --git a/ArmPkg/Library/ArmLib/Common/ArmLib.c b/ArmPkg/Library/ArmLib/Common/ArmLib.c
index ae1b7856081dc51c625e67d957f0c3326d38712e..a7b9551ba1d1ff08c79109ea93d041eb3fa12c3c 100644 (file)
--- a/ArmPkg/Library/ArmLib/Common/ArmLib.c
+++ b/ArmPkg/Library/ArmLib/Common/ArmLib.c
@@ -1,6 +1,7 @@
 /** @file\r
 \r
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+  Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR>\r
   \r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
@@ -70,3 +71,13 @@ ArmSetAuxCrBit (
   ArmWriteAuxCr(val);\r
 }\r
 \r
+VOID\r
+EFIAPI\r
+ArmUnsetAuxCrBit (\r
+  IN  UINT32    Bits\r
+  )\r
+{\r
+  UINT32 val = ArmReadAuxCr();\r
+  val &= ~Bits;\r
+  ArmWriteAuxCr(val);\r
+}\r

diff --git a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S
index da927b9d4351fd3593e750875649c5fd97d7e112..b19185412cb3f4b2f3203818daa51f8d23b7c529 100644 (file)
--- a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S
+++ b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S
@@ -32,16 +32,21 @@ GCC_ASM_EXPORT(ArmSetTTBR0)
 GCC_ASM_EXPORT(ArmSetDomainAccessControl)\r
 GCC_ASM_EXPORT(CPSRMaskInsert)\r
 GCC_ASM_EXPORT(CPSRRead)\r
-GCC_ASM_EXPORT(ArmWriteCPACR)\r
+GCC_ASM_EXPORT(ArmReadCpacr)\r
+GCC_ASM_EXPORT(ArmWriteCpacr)\r
 GCC_ASM_EXPORT(ArmWriteAuxCr)\r
 GCC_ASM_EXPORT(ArmReadAuxCr)\r
 GCC_ASM_EXPORT(ArmInvalidateTlb)\r
 GCC_ASM_EXPORT(ArmUpdateTranslationTableEntry)\r
+GCC_ASM_EXPORT(ArmReadNsacr)\r
 GCC_ASM_EXPORT(ArmWriteNsacr)\r
+GCC_ASM_EXPORT(ArmReadScr)\r
 GCC_ASM_EXPORT(ArmWriteScr)\r
-GCC_ASM_EXPORT(ArmWriteVMBar)\r
+GCC_ASM_EXPORT(ArmReadMVBar)\r
+GCC_ASM_EXPORT(ArmWriteMVBar)\r
 GCC_ASM_EXPORT(ArmCallWFE)\r
 GCC_ASM_EXPORT(ArmCallSEV)\r
+GCC_ASM_EXPORT(ArmReadSctlr)\r
 \r
 #------------------------------------------------------------------------------\r
 \r
@@ -88,7 +93,11 @@ ASM_PFX(CPSRRead):
   mrs     r0, cpsr\r
   bx      lr\r
 \r
-ASM_PFX(ArmWriteCPACR):\r
+ASM_PFX(ArmReadCpacr):\r
+  mrc     p15, 0, r0, c1, c0, 2\r
+  bx      lr\r
+\r
+ASM_PFX(ArmWriteCpacr):\r
   mcr     p15, 0, r0, c1, c0, 2\r
   isb\r
   bx      lr\r
@@ -136,15 +145,27 @@ ASM_PFX(ArmInvalidateTlb):
   isb\r
   bx      lr\r
 \r
+ASM_PFX(ArmReadNsacr):\r
+  mrc     p15, 0, r0, c1, c1, 2\r
+  bx      lr\r
+\r
 ASM_PFX(ArmWriteNsacr):\r
   mcr     p15, 0, r0, c1, c1, 2\r
   bx      lr\r
 \r
+ASM_PFX(ArmReadScr):\r
+  mrc     p15, 0, r0, c1, c1, 0\r
+  bx      lr\r
+\r
 ASM_PFX(ArmWriteScr):\r
   mcr     p15, 0, r0, c1, c1, 0\r
   bx      lr\r
 \r
-ASM_PFX(ArmWriteVMBar):\r
+ASM_PFX(ArmReadMVBar):\r
+  mrc     p15, 0, r0, c12, c0, 1\r
+  bx      lr\r
+\r
+ASM_PFX(ArmWriteMVBar):\r
   mcr     p15, 0, r0, c12, c0, 1\r
   bx      lr\r
 \r
@@ -156,4 +177,8 @@ ASM_PFX(ArmCallSEV):
   sev\r
   bx      lr\r
 \r
+ASM_PFX(ArmReadSctlr):\r
+  mrc     p15, 0, R0, c1, c0, 0      @ Read SCTLR into R0 (Read control register configuration data)\r
+  bx     lr\r
+\r
 ASM_FUNCTION_REMOVE_IF_UNREFERENCED\r

diff --git a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm
index 186ee33dfa3884ff4cef62b78eb673269a4db7e6..fd0f332bd65c3ce86ea7d1ff175bdc192ec28915 100644 (file)
--- a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm
+++ b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm
@@ -1,7 +1,7 @@
 //------------------------------------------------------------------------------ \r
 //\r
 // Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-// Copyright (c) 2011, ARM Limited. All rights reserved.\r
+// Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
 //\r
 // This program and the accompanying materials\r
 // are licensed and made available under the terms and conditions of the BSD License\r
@@ -32,16 +32,21 @@
     EXPORT ArmSetDomainAccessControl\r
     EXPORT CPSRMaskInsert\r
     EXPORT CPSRRead\r
-    EXPORT ArmWriteCPACR\r
+    EXPORT ArmReadCpacr\r
+    EXPORT ArmWriteCpacr\r
     EXPORT ArmWriteAuxCr\r
     EXPORT ArmReadAuxCr\r
     EXPORT ArmInvalidateTlb\r
     EXPORT ArmUpdateTranslationTableEntry\r
+    EXPORT ArmReadNsacr\r
     EXPORT ArmWriteNsacr\r
+    EXPORT ArmReadScr\r
     EXPORT ArmWriteScr\r
-    EXPORT ArmWriteVMBar\r
+    EXPORT ArmReadMVBar\r
+    EXPORT ArmWriteMVBar\r
     EXPORT ArmCallWFE\r
     EXPORT ArmCallSEV\r
+    EXPORT ArmReadSctlr\r
 \r
     AREA ArmLibSupport, CODE, READONLY\r
 \r
@@ -88,7 +93,11 @@ CPSRRead
   mrs     r0, cpsr\r
   bx      lr\r
 \r
-ArmWriteCPACR\r
+ArmReadCpacr\r
+  mrc     p15, 0, r0, c1, c0, 2\r
+  bx      lr\r
+\r
+ArmWriteCpacr\r
   mcr     p15, 0, r0, c1, c0, 2\r
   isb\r
   bx      lr\r
@@ -136,15 +145,27 @@ ArmInvalidateTlb
   isb\r
   bx      lr\r
 \r
+ArmReadNsacr\r
+  mrc     p15, 0, r0, c1, c1, 2\r
+  bx      lr\r
+\r
 ArmWriteNsacr\r
   mcr     p15, 0, r0, c1, c1, 2\r
   bx      lr\r
 \r
+ArmReadScr\r
+  mrc     p15, 0, r0, c1, c1, 0\r
+  bx      lr\r
+\r
 ArmWriteScr\r
   mcr     p15, 0, r0, c1, c1, 0\r
   bx      lr\r
 \r
-ArmWriteVMBar\r
+ArmReadMVBar\r
+  mrc     p15, 0, r0, c12, c0, 1\r
+  bx      lr\r
+\r
+ArmWriteMVBar\r
   mcr     p15, 0, r0, c12, c0, 1\r
   bx      lr\r
   \r
@@ -156,4 +177,8 @@ ArmCallSEV
   sev\r
   blx   lr\r
 \r
+ArmReadSctlr\r
+  mrc     p15, 0, R0, c1, c0, 0      // Read SCTLR into R0 (Read control register configuration data)\r
+  bx     lr\r
+\r
   END\r

diff --git a/ArmPlatformPkg/Library/ArmTrustedMonitorLibNull/ArmTrustedMonitorLibNull.c b/ArmPlatformPkg/Library/ArmTrustedMonitorLibNull/ArmTrustedMonitorLibNull.c
index b6eff6ee9d4fd72481393d1fe17c95b5e3c04892..6d3250e3a50f603a9221818d4a9f2aa4283afb12 100644 (file)
--- a/ArmPlatformPkg/Library/ArmTrustedMonitorLibNull/ArmTrustedMonitorLibNull.c
+++ b/ArmPlatformPkg/Library/ArmTrustedMonitorLibNull/ArmTrustedMonitorLibNull.c
@@ -1,7 +1,7 @@
 /** @file\r
 *  Main file supporting the Monitor World on ARM PLatforms\r
 *\r
-*  Copyright (c) 2011, ARM Limited. All rights reserved.\r
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
 *\r
 *  This program and the accompanying materials\r
 *  are licensed and made available under the terms and conditions of the BSD License\r
@@ -33,5 +33,5 @@ ArmSecureMonitorWorldInitialize (
   ASSERT (IS_ALIGNED(MonitorVectorTable, BIT5));\r
 \r
   // Write the Monitor Mode Vector Table Address\r
-  ArmWriteVMBar ((UINT32) &MonitorVectorTable);\r
+  ArmWriteMVBar ((UINT32) &MonitorVectorTable);\r
 }\r

diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c
index a8de52fcc2bf7bf2e85dc071403cec589444842d..00293f0d007be2d865a13ee4bfc3c801b4f347bb 100644 (file)
--- a/ArmPlatformPkg/Sec/Sec.c
+++ b/ArmPlatformPkg/Sec/Sec.c
@@ -91,7 +91,7 @@ CEntryPoint (
   }
 
   // Enable Full Access to CoProcessors
-  ArmWriteCPACR (CPACR_CP_FULL_ACCESS);
+  ArmWriteCpacr (CPACR_CP_FULL_ACCESS);
 
   if (IS_PRIMARY_CORE(MpId)) {
     // Initialize peripherals that must be done at the early stage