--- /dev/null
+/*++\r
+ Defives data structures per MultiProcessor Specification Ver 1.4.\r
+ \r
+ The MultiProcessor Specification defines an enhancement to the standard \r
+ to which PC manufacturers design DOS-compatible systems.\r
+\r
+Copyright (c) 2007 - 2011, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+--*/\r
+\r
+#ifndef _LEGACY_BIOS_MPTABLE_H_\r
+#define _LEGACY_BIOS_MPTABLE_H_\r
+\r
+#define EFI_LEGACY_MP_TABLE_REV_1_4 0x04\r
+\r
+//\r
+// Define MP table structures. All are packed.\r
+//\r
+#pragma pack(1)\r
+\r
+#define EFI_LEGACY_MP_TABLE_FLOATING_POINTER_SIGNATURE SIGNATURE_32 ('_', 'M', 'P', '_')\r
+typedef struct {\r
+ UINT32 Signature;\r
+ UINT32 PhysicalAddress;\r
+ UINT8 Length;\r
+ UINT8 SpecRev;\r
+ UINT8 Checksum;\r
+ UINT8 FeatureByte1;\r
+ struct {\r
+ UINT32 Reserved1 : 6;\r
+ UINT32 MutipleClk : 1;\r
+ UINT32 Imcr : 1;\r
+ UINT32 Reserved2 : 24;\r
+ } FeatureByte2_5;\r
+} EFI_LEGACY_MP_TABLE_FLOATING_POINTER;\r
+\r
+#define EFI_LEGACY_MP_TABLE_HEADER_SIGNATURE SIGNATURE_32 ('P', 'C', 'M', 'P')\r
+typedef struct {\r
+ UINT32 Signature;\r
+ UINT16 BaseTableLength;\r
+ UINT8 SpecRev;\r
+ UINT8 Checksum;\r
+ CHAR8 OemId[8];\r
+ CHAR8 OemProductId[12];\r
+ UINT32 OemTablePointer;\r
+ UINT16 OemTableSize;\r
+ UINT16 EntryCount;\r
+ UINT32 LocalApicAddress;\r
+ UINT16 ExtendedTableLength;\r
+ UINT8 ExtendedChecksum;\r
+ UINT8 Reserved;\r
+} EFI_LEGACY_MP_TABLE_HEADER;\r
+\r
+typedef struct {\r
+ UINT8 EntryType;\r
+} EFI_LEGACY_MP_TABLE_ENTRY_TYPE;\r
+\r
+//\r
+// Entry Type 0: Processor.\r
+//\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_PROCESSOR 0x00\r
+typedef struct {\r
+ UINT8 EntryType;\r
+ UINT8 Id;\r
+ UINT8 Ver;\r
+ struct {\r
+ UINT8 Enabled : 1;\r
+ UINT8 Bsp : 1;\r
+ UINT8 Reserved : 6;\r
+ } Flags;\r
+ struct {\r
+ UINT32 Stepping : 4;\r
+ UINT32 Model : 4;\r
+ UINT32 Family : 4;\r
+ UINT32 Reserved : 20;\r
+ } Signature;\r
+ struct {\r
+ UINT32 Fpu : 1;\r
+ UINT32 Reserved1 : 6;\r
+ UINT32 Mce : 1;\r
+ UINT32 Cx8 : 1;\r
+ UINT32 Apic : 1;\r
+ UINT32 Reserved2 : 22;\r
+ } Features;\r
+ UINT32 Reserved1;\r
+ UINT32 Reserved2;\r
+} EFI_LEGACY_MP_TABLE_ENTRY_PROCESSOR;\r
+\r
+//\r
+// Entry Type 1: Bus.\r
+//\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_BUS 0x01\r
+typedef struct {\r
+ UINT8 EntryType;\r
+ UINT8 Id;\r
+ CHAR8 TypeString[6];\r
+} EFI_LEGACY_MP_TABLE_ENTRY_BUS;\r
+\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_CBUS "CBUS " // Corollary CBus\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_CBUSII "CBUSII" // Corollary CBUS II\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_EISA "EISA " // Extended ISA\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_FUTURE "FUTURE" // IEEE FutureBus\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_INTERN "INTERN" // Internal bus\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_ISA "ISA " // Industry Standard Architecture\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MBI "MBI " // Multibus I\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MBII "MBII " // Multibus II\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MCA "MCA " // Micro Channel Architecture\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MPI "MPI " // MPI\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MPSA "MPSA " // MPSA\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_NUBUS "NUBUS " // Apple Macintosh NuBus\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_PCI "PCI " // Peripheral Component Interconnect\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_PCMCIA "PCMCIA" // PC Memory Card International Assoc.\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_TC "TC " // DEC TurboChannel\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_VL "VL " // VESA Local Bus\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_VME "VME " // VMEbus\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_XPRESS "XPRESS" // Express System Bus\r
+//\r
+// Entry Type 2: I/O APIC.\r
+//\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_IOAPIC 0x02\r
+typedef struct {\r
+ UINT8 EntryType;\r
+ UINT8 Id;\r
+ UINT8 Ver;\r
+ struct {\r
+ UINT8 Enabled : 1;\r
+ UINT8 Reserved : 7;\r
+ } Flags;\r
+ UINT32 Address;\r
+} EFI_LEGACY_MP_TABLE_ENTRY_IOAPIC;\r
+\r
+//\r
+// Entry Type 3: I/O Interrupt Assignment.\r
+//\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_IO_INT 0x03\r
+typedef struct {\r
+ UINT8 EntryType;\r
+ UINT8 IntType;\r
+ struct {\r
+ UINT16 Polarity : 2;\r
+ UINT16 Trigger : 2;\r
+ UINT16 Reserved : 12;\r
+ } Flags;\r
+ UINT8 SourceBusId;\r
+ union {\r
+ struct {\r
+ UINT8 IntNo : 2;\r
+ UINT8 Dev : 5;\r
+ UINT8 Reserved : 1;\r
+ } fields;\r
+ UINT8 byte;\r
+ } SourceBusIrq;\r
+ UINT8 DestApicId;\r
+ UINT8 DestApicIntIn;\r
+} EFI_LEGACY_MP_TABLE_ENTRY_IO_INT;\r
+\r
+typedef enum {\r
+ EfiLegacyMpTableEntryIoIntTypeInt = 0,\r
+ EfiLegacyMpTableEntryIoIntTypeNmi = 1,\r
+ EfiLegacyMpTableEntryIoIntTypeSmi = 2,\r
+ EfiLegacyMpTableEntryIoIntTypeExtInt= 3,\r
+} EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_TYPE;\r
+\r
+typedef enum {\r
+ EfiLegacyMpTableEntryIoIntFlagsPolaritySpec = 0x0,\r
+ EfiLegacyMpTableEntryIoIntFlagsPolarityActiveHigh = 0x1,\r
+ EfiLegacyMpTableEntryIoIntFlagsPolarityReserved = 0x2,\r
+ EfiLegacyMpTableEntryIoIntFlagsPolarityActiveLow = 0x3,\r
+} EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_FLAGS_POLARITY;\r
+\r
+typedef enum {\r
+ EfiLegacyMpTableEntryIoIntFlagsTriggerSpec = 0x0,\r
+ EfiLegacyMpTableEntryIoIntFlagsTriggerEdge = 0x1,\r
+ EfiLegacyMpTableEntryIoIntFlagsTriggerReserved = 0x2,\r
+ EfiLegacyMpTableEntryIoIntFlagsTriggerLevel = 0x3,\r
+} EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_FLAGS_TRIGGER;\r
+\r
+//\r
+// Entry Type 4: Local Interrupt Assignment.\r
+//\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_LOCAL_INT 0x04\r
+typedef struct {\r
+ UINT8 EntryType;\r
+ UINT8 IntType;\r
+ struct {\r
+ UINT16 Polarity : 2;\r
+ UINT16 Trigger : 2;\r
+ UINT16 Reserved : 12;\r
+ } Flags;\r
+ UINT8 SourceBusId;\r
+ union {\r
+ struct {\r
+ UINT8 IntNo : 2;\r
+ UINT8 Dev : 5;\r
+ UINT8 Reserved : 1;\r
+ } fields;\r
+ UINT8 byte;\r
+ } SourceBusIrq;\r
+ UINT8 DestApicId;\r
+ UINT8 DestApicIntIn;\r
+} EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT;\r
+\r
+typedef enum {\r
+ EfiLegacyMpTableEntryLocalIntTypeInt = 0,\r
+ EfiLegacyMpTableEntryLocalIntTypeNmi = 1,\r
+ EfiLegacyMpTableEntryLocalIntTypeSmi = 2,\r
+ EfiLegacyMpTableEntryLocalIntTypeExtInt = 3,\r
+} EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_TYPE;\r
+\r
+typedef enum {\r
+ EfiLegacyMpTableEntryLocalIntFlagsPolaritySpec = 0x0,\r
+ EfiLegacyMpTableEntryLocalIntFlagsPolarityActiveHigh= 0x1,\r
+ EfiLegacyMpTableEntryLocalIntFlagsPolarityReserved = 0x2,\r
+ EfiLegacyMpTableEntryLocalIntFlagsPolarityActiveLow = 0x3,\r
+} EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_FLAGS_POLARITY;\r
+\r
+typedef enum {\r
+ EfiLegacyMpTableEntryLocalIntFlagsTriggerSpec = 0x0,\r
+ EfiLegacyMpTableEntryLocalIntFlagsTriggerEdge = 0x1,\r
+ EfiLegacyMpTableEntryLocalIntFlagsTriggerReserved = 0x2,\r
+ EfiLegacyMpTableEntryLocalIntFlagsTriggerLevel = 0x3,\r
+} EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_FLAGS_TRIGGER;\r
+\r
+//\r
+// Entry Type 128: System Address Space Mapping.\r
+//\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_SYS_ADDR_SPACE_MAPPING 0x80\r
+typedef struct {\r
+ UINT8 EntryType;\r
+ UINT8 Length;\r
+ UINT8 BusId;\r
+ UINT8 AddressType;\r
+ UINT64 AddressBase;\r
+ UINT64 AddressLength;\r
+} EFI_LEGACY_MP_TABLE_ENTRY_EXT_SYS_ADDR_SPACE_MAPPING;\r
+\r
+typedef enum {\r
+ EfiLegacyMpTableEntryExtSysAddrSpaceMappingIo = 0,\r
+ EfiLegacyMpTableEntryExtSysAddrSpaceMappingMemory = 1,\r
+ EfiLegacyMpTableEntryExtSysAddrSpaceMappingPrefetch = 2,\r
+} EFI_LEGACY_MP_TABLE_ENTRY_EXT_SYS_ADDR_SPACE_MAPPING_TYPE;\r
+\r
+//\r
+// Entry Type 129: Bus Hierarchy.\r
+//\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_BUS_HIERARCHY 0x81\r
+typedef struct {\r
+ UINT8 EntryType;\r
+ UINT8 Length;\r
+ UINT8 BusId;\r
+ struct {\r
+ UINT8 SubtractiveDecode : 1;\r
+ UINT8 Reserved : 7;\r
+ } BusInfo;\r
+ UINT8 ParentBus;\r
+ UINT8 Reserved1;\r
+ UINT8 Reserved2;\r
+ UINT8 Reserved3;\r
+} EFI_LEGACY_MP_TABLE_ENTRY_EXT_BUS_HIERARCHY;\r
+\r
+//\r
+// Entry Type 130: Compatibility Bus Address Space Modifier.\r
+//\r
+#define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_COMPAT_BUS_ADDR_SPACE_MODIFIER 0x82\r
+typedef struct {\r
+ UINT8 EntryType;\r
+ UINT8 Length;\r
+ UINT8 BusId;\r
+ struct {\r
+ UINT8 RangeMode : 1;\r
+ UINT8 Reserved : 7;\r
+ } AddrMode;\r
+ UINT32 PredefinedRangeList;\r
+} EFI_LEGACY_MP_TABLE_ENTRY_EXT_COMPAT_BUS_ADDR_SPACE_MODIFIER;\r
+\r
+#pragma pack()\r
+\r
+#endif\r