Resolved several warnings generated by GCC.

In PcatPciRootBridge.c -> GetPciExpressBaseAddressForRootBridge,
fixed a hang condition if the PCI Express Base Address HOB is
not present.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6684 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/DuetPkg/PciRootBridgeNoEnumerationDxe/DeviceIo.c b/DuetPkg/PciRootBridgeNoEnumerationDxe/DeviceIo.c
index 286c03ef4c11b54df8d77a3066c8e2251966b947..8525b4b94e5b515ceac4798f7e33f432e055b007 100644 (file)
--- a/DuetPkg/PciRootBridgeNoEnumerationDxe/DeviceIo.c
+++ b/DuetPkg/PciRootBridgeNoEnumerationDxe/DeviceIo.c
@@ -1,6 +1,6 @@
 /*++\r
 \r
-Copyright (c) 2006, Intel Corporation                                                         \r
+Copyright (c) 2006 - 2008, Intel Corporation                                                         \r
 All rights reserved. This program and the accompanying materials                          \r
 are licensed and made available under the terms and conditions of the BSD License         \r
 which accompanies this distribution.  The full text of the license may be found at        \r
@@ -141,7 +141,7 @@ Returns:
     Status = Private->PciRootBridgeIo->CopyMem (\r
                                          Private->PciRootBridgeIo,\r
                                          (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,\r
-                                         (UINT64) Buffer,\r
+                                         (UINT64)(UINTN) Buffer,\r
                                          Address,\r
                                          Count\r
                                          );\r
@@ -206,7 +206,7 @@ Returns:
                                          Private->PciRootBridgeIo,\r
                                          (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,\r
                                          Address,\r
-                                         (UINT64) Buffer,\r
+                                         (UINT64)(UINTN) Buffer,\r
                                          Count\r
                                          );\r
   } else {\r

diff --git a/DuetPkg/PciRootBridgeNoEnumerationDxe/Ia32/PcatIo.c b/DuetPkg/PciRootBridgeNoEnumerationDxe/Ia32/PcatIo.c
index 92dd1c3d24cc57fd9650331b4de5da29fc116e5a..9edbc698bc76833f4a130e82d9abb04b761c5125 100644 (file)
--- a/DuetPkg/PciRootBridgeNoEnumerationDxe/Ia32/PcatIo.c
+++ b/DuetPkg/PciRootBridgeNoEnumerationDxe/Ia32/PcatIo.c
@@ -1,6 +1,6 @@
 /*++\r
 \r
-Copyright (c) 2005 - 2006, Intel Corporation                                                         \r
+Copyright (c) 2005 - 2008, Intel Corporation                                                         \r
 All rights reserved. This program and the accompanying materials                          \r
 are licensed and made available under the terms and conditions of the BSD License         \r
 which accompanies this distribution.  The full text of the license may be found at        \r
@@ -608,7 +608,7 @@ ScanPciRootBridgeForRoms(
     mPciOptionRomTableInstalled = TRUE;\r
   }\r
 \r
-  Status = IoDev->Configuration(IoDev, &Descriptors);\r
+  Status = IoDev->Configuration(IoDev, (VOID **)&Descriptors);\r
   if (EFI_ERROR (Status) || Descriptors == NULL) {\r
     return EFI_NOT_FOUND;\r
   }\r
@@ -632,7 +632,7 @@ ScanPciRootBridgeForRoms(
       //\r
       // Find Memory Descriptors that are less than 4GB, so the PPB Memory Window can be used for downstream devices\r
       //\r
-      if (Descriptors->AddrRangeMax < 0x100000000) {\r
+      if (Descriptors->AddrRangeMax < 0x100000000ULL) {\r
         //\r
         // Find the largest Non-Prefetchable Memory Descriptor that is less than 4GB\r
         //\r
@@ -679,7 +679,7 @@ ScanPciRootBridgeForRoms(
   Status = gBS->AllocatePool(\r
                   EfiBootServicesData,\r
                   sizeof(UINT16) * (MaxBus - MinBus + 1) * (PCI_MAX_DEVICE+1) * (PCI_MAX_FUNC+1),\r
-                  &Context.CommandRegisterBuffer\r
+                  (VOID **)&Context.CommandRegisterBuffer\r
                   );\r
 \r
   if (EFI_ERROR (Status)) {\r

diff --git a/DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridge.c b/DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridge.c
index ff53bb5c78bf1c63f1b06863374442f7d6dd5c36..c5895d98d83d96a7fe7c46c6ecd03874cb06de73 100644 (file)
--- a/DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridge.c
+++ b/DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridge.c
@@ -1,6 +1,6 @@
 /*++\r
 \r
-Copyright (c) 2005 - 2006, Intel Corporation                                                         \r
+Copyright (c) 2005 - 2008, Intel Corporation                                                         \r
 All rights reserved. This program and the accompanying materials                          \r
 are licensed and made available under the terms and conditions of the BSD License         \r
 which accompanies this distribution.  The full text of the license may be found at        \r
@@ -62,7 +62,7 @@ Returns:
   //\r
   // Initialize gCpuIo now since the chipset init code requires it.\r
   //\r
-  Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, &gCpuIo);\r
+  Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID **)&gCpuIo);\r
   ASSERT_EFI_ERROR (Status);\r
 \r
   //\r
@@ -79,7 +79,7 @@ Returns:
     Status = gBS->AllocatePool(\r
                     EfiBootServicesData,\r
                     sizeof (PCAT_PCI_ROOT_BRIDGE_INSTANCE),\r
-                    &PrivateData\r
+                    (VOID **)&PrivateData\r
                     );\r
     if (EFI_ERROR (Status)) {\r
       goto Done;\r
@@ -104,10 +104,10 @@ Returns:
 \r
     PrivateData->IoBase      = 0xffffffff;\r
     PrivateData->MemBase     = 0xffffffff;\r
-    PrivateData->Mem32Base   = 0xffffffffffffffff;\r
-    PrivateData->Pmem32Base  = 0xffffffffffffffff;\r
-    PrivateData->Mem64Base   = 0xffffffffffffffff;\r
-    PrivateData->Pmem64Base  = 0xffffffffffffffff;\r
+    PrivateData->Mem32Base   = 0xffffffffffffffffULL;\r
+    PrivateData->Pmem32Base  = 0xffffffffffffffffULL;\r
+    PrivateData->Mem64Base   = 0xffffffffffffffffULL;\r
+    PrivateData->Pmem64Base  = 0xffffffffffffffffULL;\r
 \r
     //\r
     // The default mechanism for performing PCI Configuration cycles is to \r
@@ -217,6 +217,7 @@ Returns:
           break;\r
         }\r
 \r
+\r
         //\r
         // Increment the number of PCI device found on the primary bus of the PCI root bridge\r
         //\r
@@ -592,7 +593,7 @@ Returns:
     Status = gBS->AllocatePool (\r
                     EfiBootServicesData, \r
                     sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR),\r
-                    &PrivateData->Configuration\r
+                    (VOID **)&PrivateData->Configuration\r
                     );\r
     if (EFI_ERROR (Status )) {\r
       return Status;\r
@@ -621,7 +622,7 @@ Returns:
   Status = gBS->AllocatePool (\r
                   EfiBootServicesData, \r
                   sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) * NumConfig + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR),\r
-                  &PrivateData->Configuration\r
+                  (VOID **)&PrivateData->Configuration\r
                   );\r
   if (EFI_ERROR (Status )) {\r
     return Status;\r
@@ -974,24 +975,14 @@ Returns:
   UINTN                                    BufferSize;\r
   UINT32                                   Index;\r
   UINT32                                   Number;\r
-  VOID                                     *HobList;\r
-  EFI_STATUS                               Status;\r
   EFI_PEI_HOB_POINTERS                     GuidHob;\r
 \r
-  //\r
-  // Get Hob List from configuration table\r
-  //\r
-  Status = EfiGetSystemConfigurationTable (&gEfiHobListGuid, &HobList);\r
-  if (EFI_ERROR (Status)) {\r
-    return 0;\r
-  }\r
-\r
   //\r
   // Get PciExpressAddressInfo Hob\r
   //\r
   PciExpressBaseAddressInfo = NULL;\r
   BufferSize                = 0;\r
-  GuidHob.Raw = GetNextGuidHob (&gEfiPciExpressBaseAddressGuid, &HobList);\r
+  GuidHob.Raw = GetFirstGuidHob (&gEfiPciExpressBaseAddressGuid);\r
   if (GuidHob.Raw != NULL) {\r
     PciExpressBaseAddressInfo = GET_GUID_HOB_DATA (GuidHob.Guid);\r
     BufferSize                = GET_GUID_HOB_DATA_SIZE (GuidHob.Guid);\r

diff --git a/DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridgeIo.c b/DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridgeIo.c
index ed2aea7dc0053803c70ca5c82e9b0f239dbb0a41..9c5ae3c400364ba49b32c4babfe74629e04118b5 100644 (file)
--- a/DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridgeIo.c
+++ b/DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridgeIo.c
@@ -1,6 +1,6 @@
 /*++\r
 \r
-Copyright (c) 2005 - 2007, Intel Corporation                                                         \r
+Copyright (c) 2005 - 2008, Intel Corporation                                                         \r
 All rights reserved. This program and the accompanying materials                          \r
 are licensed and made available under the terms and conditions of the BSD License         \r
 which accompanies this distribution.  The full text of the license may be found at        \r
@@ -635,7 +635,7 @@ PcatRootBridgeIoMap (
   // map the DMA transfer to a buffer below 4GB.\r
   //\r
   PhysicalAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;\r
-  if ((PhysicalAddress + *NumberOfBytes) > 0x100000000) {\r
+  if ((PhysicalAddress + *NumberOfBytes) > 0x100000000ULL) {\r
 \r
     //\r
     // Common Buffer operations can not be remapped.  If the common buffer\r
@@ -653,7 +653,7 @@ PcatRootBridgeIoMap (
     Status = gBS->AllocatePool (\r
                     EfiBootServicesData, \r
                     sizeof(MAP_INFO), \r
-                    &MapInfo\r
+                    (VOID **)&MapInfo\r
                     );\r
     if (EFI_ERROR (Status)) {\r
       *NumberOfBytes = 0;\r
@@ -706,7 +706,7 @@ PcatRootBridgeIoMap (
        Status =gBS->AllocatePool (\r
                     EfiBootServicesData, \r
                     sizeof(MAP_INFO_INSTANCE), \r
-                    &MapInstance\r
+                    (VOID **)&MapInstance\r
                     );                    \r
     if (EFI_ERROR(Status)) {\r
       gBS->FreePages (MapInfo->MappedHostAddress,MapInfo->NumberOfPages);\r