#include <Ppi/VectorHandoffInfo.h>\r
#include <Protocol/Cpu.h>\r
\r
-#define CPU_EXCEPTION_INIT_DATA_REV 1\r
-\r
-typedef union {\r
- struct {\r
- //\r
- // Revision number of this structure.\r
- //\r
- UINT32 Revision;\r
- //\r
- // The address of top of known good stack reserved for *ALL* exceptions\r
- // listed in field StackSwitchExceptions.\r
- //\r
- UINTN KnownGoodStackTop;\r
- //\r
- // The size of known good stack for *ONE* exception only.\r
- //\r
- UINTN KnownGoodStackSize;\r
- //\r
- // Buffer of exception vector list for stack switch.\r
- //\r
- UINT8 *StackSwitchExceptions;\r
- //\r
- // Number of exception vectors in StackSwitchExceptions.\r
- //\r
- UINTN StackSwitchExceptionNumber;\r
- //\r
- // Buffer of IDT table. It must be type of IA32_IDT_GATE_DESCRIPTOR.\r
- // Normally there's no need to change IDT table size.\r
- //\r
- VOID *IdtTable;\r
- //\r
- // Size of buffer for IdtTable.\r
- //\r
- UINTN IdtTableSize;\r
- //\r
- // Buffer of GDT table. It must be type of IA32_SEGMENT_DESCRIPTOR.\r
- //\r
- VOID *GdtTable;\r
- //\r
- // Size of buffer for GdtTable.\r
- //\r
- UINTN GdtTableSize;\r
- //\r
- // Pointer to start address of descriptor of exception task gate in the\r
- // GDT table. It must be type of IA32_TSS_DESCRIPTOR.\r
- //\r
- VOID *ExceptionTssDesc;\r
- //\r
- // Size of buffer for ExceptionTssDesc.\r
- //\r
- UINTN ExceptionTssDescSize;\r
- //\r
- // Buffer of task-state segment for exceptions. It must be type of\r
- // IA32_TASK_STATE_SEGMENT.\r
- //\r
- VOID *ExceptionTss;\r
- //\r
- // Size of buffer for ExceptionTss.\r
- //\r
- UINTN ExceptionTssSize;\r
- //\r
- // Flag to indicate if default handlers should be initialized or not.\r
- //\r
- BOOLEAN InitDefaultHandlers;\r
- } Ia32, X64;\r
-} CPU_EXCEPTION_INIT_DATA;\r
-\r
/**\r
Initializes all CPU exceptions entries and provides the default exception handlers.\r
\r
/** @file\r
Common header file for CPU Exception Handler Library.\r
\r
- Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2012 - 2022, Intel Corporation. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#define CPU_TSS_GDT_SIZE (SIZE_2KB + CPU_TSS_DESC_SIZE + CPU_TSS_SIZE)\r
\r
+#define CPU_EXCEPTION_INIT_DATA_REV 1\r
+\r
+typedef union {\r
+ struct {\r
+ //\r
+ // Revision number of this structure.\r
+ //\r
+ UINT32 Revision;\r
+ //\r
+ // The address of top of known good stack reserved for *ALL* exceptions\r
+ // listed in field StackSwitchExceptions.\r
+ //\r
+ UINTN KnownGoodStackTop;\r
+ //\r
+ // The size of known good stack for *ONE* exception only.\r
+ //\r
+ UINTN KnownGoodStackSize;\r
+ //\r
+ // Buffer of exception vector list for stack switch.\r
+ //\r
+ UINT8 *StackSwitchExceptions;\r
+ //\r
+ // Number of exception vectors in StackSwitchExceptions.\r
+ //\r
+ UINTN StackSwitchExceptionNumber;\r
+ //\r
+ // Buffer of IDT table. It must be type of IA32_IDT_GATE_DESCRIPTOR.\r
+ // Normally there's no need to change IDT table size.\r
+ //\r
+ VOID *IdtTable;\r
+ //\r
+ // Size of buffer for IdtTable.\r
+ //\r
+ UINTN IdtTableSize;\r
+ //\r
+ // Buffer of GDT table. It must be type of IA32_SEGMENT_DESCRIPTOR.\r
+ //\r
+ VOID *GdtTable;\r
+ //\r
+ // Size of buffer for GdtTable.\r
+ //\r
+ UINTN GdtTableSize;\r
+ //\r
+ // Pointer to start address of descriptor of exception task gate in the\r
+ // GDT table. It must be type of IA32_TSS_DESCRIPTOR.\r
+ //\r
+ VOID *ExceptionTssDesc;\r
+ //\r
+ // Size of buffer for ExceptionTssDesc.\r
+ //\r
+ UINTN ExceptionTssDescSize;\r
+ //\r
+ // Buffer of task-state segment for exceptions. It must be type of\r
+ // IA32_TASK_STATE_SEGMENT.\r
+ //\r
+ VOID *ExceptionTss;\r
+ //\r
+ // Size of buffer for ExceptionTss.\r
+ //\r
+ UINTN ExceptionTssSize;\r
+ //\r
+ // Flag to indicate if default handlers should be initialized or not.\r
+ //\r
+ BOOLEAN InitDefaultHandlers;\r
+ } Ia32, X64;\r
+} CPU_EXCEPTION_INIT_DATA;\r
+\r
//\r
// Record exception handler information\r
//\r