ArmPkg: Fix coding style to follow EDK2 coding convention

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11789 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPkg/Drivers/PL390Gic/PL390GicDxe.c b/ArmPkg/Drivers/PL390Gic/PL390GicDxe.c
index 94da7f5a744170567c0bbc07e632284f9133c811..d9d9b5f718b2d211168927a002b3bffd504a3d1e 100644 (file)
--- a/ArmPkg/Drivers/PL390Gic/PL390GicDxe.c
+++ b/ArmPkg/Drivers/PL390Gic/PL390GicDxe.c
@@ -126,7 +126,7 @@ EnableInterruptSource (
   RegShift = Source % 32;
 
   // write set-enable register
-  MmioWrite32 (PcdGet32(PcdGicDistributorBase) + GIC_ICDISER+(4*RegOffset), 1 << RegShift);
+  MmioWrite32 (PcdGet32(PcdGicDistributorBase) + GIC_ICDISER + (4*RegOffset), 1 << RegShift);
   
   return EFI_SUCCESS;
 }
@@ -156,12 +156,12 @@ DisableInterruptSource (
     return EFI_UNSUPPORTED;
   }
   
-  // calculate enable register offset and bit position
+  // Calculate enable register offset and bit position
   RegOffset = Source / 32;
   RegShift = Source % 32;
 
-  // write set-enable register
-  MmioWrite32 (PcdGet32(PcdGicDistributorBase) + GIC_ICDICER+(4*RegOffset), 1 << RegShift);
+  // Write set-enable register
+  MmioWrite32 (PcdGet32(PcdGicDistributorBase) + GIC_ICDICER + (4*RegOffset), 1 << RegShift);
   
   return EFI_SUCCESS;
 }
@@ -197,7 +197,7 @@ GetInterruptSourceState (
   RegOffset = Source / 32;
   RegShift = Source % 32;
     
-  if ((MmioRead32 (PcdGet32(PcdGicDistributorBase) + GIC_ICDISER+(4*RegOffset)) & (1<<RegShift)) == 0) {
+  if ((MmioRead32 (PcdGet32(PcdGicDistributorBase) + GIC_ICDISER + (4*RegOffset)) & (1<<RegShift)) == 0) {
     *InterruptState = FALSE;
   } else {
     *InterruptState = TRUE;
@@ -389,27 +389,27 @@ InterruptDxeInitialize (
     RegOffset = i / 4;
     RegShift = (i % 4) * 8;
     MmioAndThenOr32 (
-      PcdGet32(PcdGicDistributorBase) + GIC_ICDIPR+(4*RegOffset), 
+      PcdGet32(PcdGicDistributorBase) + GIC_ICDIPR + (4*RegOffset),
       ~(0xff << RegShift), 
       GIC_DEFAULT_PRIORITY << RegShift
       );
   }
 
-  // configure interrupts for cpu 0
+  // Configure interrupts for cpu 0
   for (i = 0; i < GIC_NUM_REG_PER_INT_BYTES; i++) {
     MmioWrite32 (PcdGet32(PcdGicDistributorBase) + GIC_ICDIPTR + (i*4), 0x01010101);
   }
 
-  // set binary point reg to 0x7 (no preemption)
+  // Set binary point reg to 0x7 (no preemption)
   MmioWrite32 (PcdGet32(PcdGicInterruptInterfaceBase) + GIC_ICCBPR, 0x7);
 
-  // set priority mask reg to 0xff to allow all priorities through
+  // Set priority mask reg to 0xff to allow all priorities through
   MmioWrite32 (PcdGet32(PcdGicInterruptInterfaceBase) + GIC_ICCPMR, 0xff);
   
-  // enable gic cpu interface
+  // Enable gic cpu interface
   MmioWrite32 (PcdGet32(PcdGicInterruptInterfaceBase) + GIC_ICCICR, 0x1);
 
-  // enable gic distributor
+  // Enable gic distributor
   MmioWrite32 (PcdGet32(PcdGicDistributorBase) + GIC_ICDDCR, 0x1);
   
   ZeroMem (&gRegisteredInterruptHandlers, sizeof (gRegisteredInterruptHandlers));

diff --git a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
index 156e0601e8770e9ef08a37fc3d76f6ddf47e18fd..bf4c010b7043a57ea71b67d3c79933e53f976e6a 100644 (file)
--- a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
+++ b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
@@ -12,6 +12,7 @@
 *\r
 **/\r
 \r
+#include <Uefi.h>\r
 #include <Library/IoLib.h>\r
 #include <Drivers/PL390Gic.h>\r
 \r
@@ -26,28 +27,27 @@ PL390GicSetupNonSecure (
   IN  INTN          GicInterruptInterfaceBase\r
   )\r
 {\r
-   UINTN CachedPriorityMask = MmioRead32(GicInterruptInterfaceBase + GIC_ICCPMR);\r
+  UINTN CachedPriorityMask = MmioRead32(GicInterruptInterfaceBase + GIC_ICCPMR);\r
 \r
-   //Set priority Mask so that no interrupts get through to CPU\r
-   MmioWrite32(GicInterruptInterfaceBase + GIC_ICCPMR, 0);\r
+  // Set priority Mask so that no interrupts get through to CPU\r
+  MmioWrite32(GicInterruptInterfaceBase + GIC_ICCPMR, 0);\r
 \r
-   //Check if there are any pending interrupts\r
-   while(0 != (MmioRead32(GicDistributorBase + GIC_ICDICPR) & 0xF))\r
-   {\r
-     //Some of the SGI's are still pending, read Ack register and send End of Interrupt Signal\r
-     UINTN InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);\r
+  // Check if there are any pending interrupts\r
+  while(0 != (MmioRead32(GicDistributorBase + GIC_ICDICPR) & 0xF)) {\r
+    // Some of the SGI's are still pending, read Ack register and send End of Interrupt Signal\r
+    UINTN InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);\r
 \r
-     //Write to End of interrupt signal\r
-     MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);\r
-   }\r
+    // Write to End of interrupt signal\r
+    MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);\r
+  }\r
 \r
   // Ensure all GIC interrupts are Non-Secure\r
-   MmioWrite32(GicDistributorBase + GIC_ICDISR, 0xffffffff);     // IRQs  0-31 are Non-Secure : Private Peripheral Interrupt[31:16] & Software Generated Interrupt[15:0]\r
-   MmioWrite32(GicDistributorBase + GIC_ICDISR + 4, 0xffffffff); // IRQs 32-63 are Non-Secure : Shared Peripheral Interrupt\r
-   MmioWrite32(GicDistributorBase + GIC_ICDISR + 8, 0xffffffff); // And another 32 in case we're on the testchip : Shared Peripheral Interrupt (2)\r
+  MmioWrite32(GicDistributorBase + GIC_ICDISR, 0xffffffff);     // IRQs  0-31 are Non-Secure : Private Peripheral Interrupt[31:16] & Software Generated Interrupt[15:0]\r
+  MmioWrite32(GicDistributorBase + GIC_ICDISR + 4, 0xffffffff); // IRQs 32-63 are Non-Secure : Shared Peripheral Interrupt\r
+  MmioWrite32(GicDistributorBase + GIC_ICDISR + 8, 0xffffffff); // And another 32 in case we're on the testchip : Shared Peripheral Interrupt (2)\r
 \r
   // Ensure all interrupts can get through the priority mask\r
-   MmioWrite32(GicInterruptInterfaceBase + GIC_ICCPMR, CachedPriorityMask);\r
+  MmioWrite32(GicInterruptInterfaceBase + GIC_ICCPMR, CachedPriorityMask);\r
 }\r
 \r
 VOID\r
@@ -63,12 +63,12 @@ PL390GicEnableInterruptInterface (
      * Enable CPU inteface in Non-secure World\r
    * Signal Secure Interrupts to CPU using FIQ line *\r
    */\r
-    MmioWrite32(GicInterruptInterfaceBase + GIC_ICCICR,\r
-        GIC_ICCICR_ENABLE_SECURE(1) |\r
-        GIC_ICCICR_ENABLE_NS(1) |\r
-        GIC_ICCICR_ACK_CTL(0) |\r
-        GIC_ICCICR_SIGNAL_SECURE_TO_FIQ(1) |\r
-        GIC_ICCICR_USE_SBPR(0));\r
+  MmioWrite32(GicInterruptInterfaceBase + GIC_ICCICR,\r
+      GIC_ICCICR_ENABLE_SECURE(1) |\r
+      GIC_ICCICR_ENABLE_NS(1) |\r
+      GIC_ICCICR_ACK_CTL(0) |\r
+      GIC_ICCICR_SIGNAL_SECURE_TO_FIQ(1) |\r
+      GIC_ICCICR_USE_SBPR(0));\r
 }\r
 \r
 VOID\r
@@ -77,7 +77,7 @@ PL390GicEnableDistributor (
   IN  INTN          GicDistributorBase\r
   )\r
 {\r
-    MmioWrite32(GicDistributorBase + GIC_ICDDCR, 1);               // turn on the GIC distributor\r
+  MmioWrite32(GicDistributorBase + GIC_ICDDCR, 1);               // turn on the GIC distributor\r
 }\r
 \r
 VOID\r
@@ -98,18 +98,18 @@ PL390GicAcknowledgeSgiFrom (
   IN  INTN          CoreId\r
   )\r
 {\r
-    INTN            InterruptId;\r
+  INTN            InterruptId;\r
 \r
-    InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);\r
+  InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);\r
 \r
-    //Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID\r
+  // Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID\r
   if (((CoreId & 0x7) << 10) == (InterruptId & 0x1C00)) {\r
-      //Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR\r
+    // Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR\r
     MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);\r
-        return 1;\r
-    } else {\r
-        return 0;\r
-    }\r
+    return 1;\r
+  } else {\r
+    return 0;\r
+  }\r
 }\r
 \r
 UINT32\r
@@ -120,16 +120,16 @@ PL390GicAcknowledgeSgi2From (
   IN  INTN          SgiId\r
   )\r
 {\r
-    INTN            InterruptId;\r
+  INTN            InterruptId;\r
 \r
-    InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);\r
+  InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);\r
 \r
-    //Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID\r
+  // Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID\r
   if((((CoreId & 0x7) << 10) | (SgiId & 0x3FF)) == (InterruptId & 0x1FFF)) {\r
-      //Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR\r
+    // Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR\r
     MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);\r
-        return 1;\r
-    } else {\r
-        return 0;\r
-    }\r
+    return 1;\r
+  } else {\r
+    return 0;\r
+  }\r
 }\r

diff --git a/ArmPkg/Include/Chipset/ArmV7.h b/ArmPkg/Include/Chipset/ArmV7.h
index 47d414ddf267a208ac7e27d1f264369bc933d36f..e986ae7407e0135126b98b67e556f4ae4636c4df 100644 (file)
--- a/ArmPkg/Include/Chipset/ArmV7.h
+++ b/ArmPkg/Include/Chipset/ArmV7.h
@@ -339,7 +339,7 @@ ArmGetScuBaseAddress (
 \r
 UINT32\r
 EFIAPI\r
-ArmIsScuEnable(\r
+ArmIsScuEnable (\r
   VOID\r
   );\r
 \r
@@ -370,35 +370,35 @@ ArmSetupSmpNonSecure (
 \r
 UINTN \r
 EFIAPI\r
-ArmReadCbar(\r
-VOID\r
-);\r
+ArmReadCbar (\r
+  VOID\r
+  );\r
 \r
 VOID\r
 EFIAPI\r
-ArmInvalidateInstructionAndDataTlb(\r
-VOID\r
-);\r
+ArmInvalidateInstructionAndDataTlb (\r
+  VOID\r
+  );\r
 \r
 \r
 UINTN\r
 EFIAPI\r
-ArmReadMpidr(\r
-VOID\r
-);\r
+ArmReadMpidr (\r
+  VOID\r
+  );\r
 \r
 \r
 UINTN\r
 EFIAPI\r
-ArmReadTpidrurw(\r
-VOID\r
-);\r
+ArmReadTpidrurw (\r
+  VOID\r
+  );\r
 \r
 \r
 VOID\r
 EFIAPI\r
-ArmWriteTpidrurw(\r
-UINTN Value\r
-);\r
+ArmWriteTpidrurw (\r
+  UINTN Value\r
+  );\r
 \r
 #endif // __ARM_V7_H__\r

diff --git a/ArmPlatformPkg/Library/EblCmdLib/EblCmdMmu.c b/ArmPlatformPkg/Library/EblCmdLib/EblCmdMmu.c
index fba4741699c3d8f8c88bf11d9e66eab912eef7a8..4b001eaef325d6ebe7d0ae2d100ee901ebf3ba8b 100644 (file)
--- a/ArmPlatformPkg/Library/EblCmdLib/EblCmdMmu.c
+++ b/ArmPlatformPkg/Library/EblCmdLib/EblCmdMmu.c
@@ -67,247 +67,285 @@
 typedef enum { Level0, Level1,Level2 } MMU_LEVEL;\r
 \r
 typedef struct {\r
-    MMU_LEVEL   Level;\r
-    UINT32      Value;\r
-    UINT32      Index;\r
-    UINT32*     Table;\r
+  MMU_LEVEL   Level;\r
+  UINT32      Value;\r
+  UINT32      Index;\r
+  UINT32*     Table;\r
 } MMU_ENTRY;\r
 \r
-MMU_ENTRY MmuEntryCreate(MMU_LEVEL Level,UINT32* Table,UINT32 Index) {\r
-    MMU_ENTRY Entry;\r
-    Entry.Level = Level;\r
-    Entry.Value = Table[Index];\r
-    Entry.Table = Table;\r
-    Entry.Index = Index;\r
-    return Entry;\r
+MMU_ENTRY\r
+MmuEntryCreate (\r
+  IN MMU_LEVEL Level,\r
+  IN UINT32* Table,\r
+  IN UINT32 Index\r
+  )\r
+{\r
+  MMU_ENTRY Entry;\r
+  Entry.Level = Level;\r
+  Entry.Value = Table[Index];\r
+  Entry.Table = Table;\r
+  Entry.Index = Index;\r
+  return Entry;\r
 }\r
 \r
-UINT32 MmuEntryIsValidAddress(MMU_LEVEL Level, UINT32 Entry) {\r
-    if (Level == Level0) {\r
-        return 0;\r
-    } else if (Level == Level1) {\r
-        if ((Entry & 0x3) == 0) {           // Ignored\r
-            return 0;\r
-        } else if ((Entry & 0x3) == 2) {    // Section Type\r
-            return 1;\r
-        } else {                            // Page Type\r
-            return 0;\r
-        }\r
-    } else if (Level == Level2){\r
-        if ((Entry & 0x3) == 0) {           // Ignored\r
-            return 0;\r
-        } else {                            // Page Type\r
-            return 1;\r
-        }\r
-    } else {\r
-        DEBUG((EFI_D_ERROR,"MmuEntryIsValidAddress: Level:%d Entry:0x%X\n",(UINT32)Level,(UINT32)Entry));\r
-        ASSERT(0);\r
-        return 0;\r
+UINT32\r
+MmuEntryIsValidAddress (\r
+  IN MMU_LEVEL Level,\r
+  IN UINT32 Entry\r
+  )\r
+{\r
+  if (Level == Level0) {\r
+    return 0;\r
+  } else if (Level == Level1) {\r
+    if ((Entry & 0x3) == 0) {           // Ignored\r
+      return 0;\r
+    } else if ((Entry & 0x3) == 2) {    // Section Type\r
+      return 1;\r
+    } else {                            // Page Type\r
+      return 0;\r
+    }\r
+  } else if (Level == Level2){\r
+    if ((Entry & 0x3) == 0) {           // Ignored\r
+      return 0;\r
+    } else {                            // Page Type\r
+      return 1;\r
     }\r
+  } else {\r
+    DEBUG((EFI_D_ERROR,"MmuEntryIsValidAddress: Level:%d Entry:0x%X\n",(UINT32)Level,(UINT32)Entry));\r
+    ASSERT(0);\r
+    return 0;\r
+  }\r
 }\r
 \r
-UINT32 MmuEntryGetAddress(MMU_ENTRY Entry) {\r
-    if (Entry.Level == Level1) {\r
-        if ((Entry.Value & 0x3) == 0) {\r
-            return 0;\r
-        } else if ((Entry.Value & 0x3) == 2) {    // Section Type\r
-            return Entry.Value & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK;\r
-        } else if ((Entry.Value & 0x3) == 1) {    // Level2 Table\r
-            MMU_ENTRY Entry = MmuEntryCreate(Level2,(UINT32*)(Entry.Value & 0xFFFFC000),0);\r
-            return MmuEntryGetAddress(Entry);\r
-        } else {                                  // Page Type\r
-            return 0;\r
-        }\r
-    } else if (Entry.Level == Level2) {\r
-        if ((Entry.Value & 0x3) == 0) {           // Ignored\r
-            return 0;\r
-        } else if ((Entry.Value & 0x3) == 1) {    // Large Page\r
-            return Entry.Value & 0xFFFF0000;\r
-        } else if ((Entry.Value & 0x2) == 2) {    // Small Page\r
-            return Entry.Value & 0xFFFFF000;\r
-        } else {\r
-            return 0;\r
-        }\r
+UINT32\r
+MmuEntryGetAddress (\r
+  IN MMU_ENTRY Entry\r
+  )\r
+{\r
+  if (Entry.Level == Level1) {\r
+    if ((Entry.Value & 0x3) == 0) {\r
+      return 0;\r
+    } else if ((Entry.Value & 0x3) == 2) {    // Section Type\r
+      return Entry.Value & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK;\r
+    } else if ((Entry.Value & 0x3) == 1) {    // Level2 Table\r
+      MMU_ENTRY Entry = MmuEntryCreate(Level2,(UINT32*)(Entry.Value & 0xFFFFC000),0);\r
+      return MmuEntryGetAddress(Entry);\r
+    } else {                                  // Page Type\r
+      return 0;\r
+    }\r
+  } else if (Entry.Level == Level2) {\r
+    if ((Entry.Value & 0x3) == 0) {           // Ignored\r
+      return 0;\r
+    } else if ((Entry.Value & 0x3) == 1) {    // Large Page\r
+      return Entry.Value & 0xFFFF0000;\r
+    } else if ((Entry.Value & 0x2) == 2) {    // Small Page\r
+      return Entry.Value & 0xFFFFF000;\r
     } else {\r
-        ASSERT(0);\r
-        return 0;\r
+      return 0;\r
     }\r
+  } else {\r
+    ASSERT(0);\r
+    return 0;\r
+  }\r
 }\r
 \r
-UINT32 MmuEntryGetSize(MMU_ENTRY Entry) {\r
-    if (Entry.Level == Level1) {\r
-        if ((Entry.Value & 0x3) == 0) {\r
-            return 0;\r
-        } else if ((Entry.Value & 0x3) == 2) {\r
-            if (Entry.Value & (1 << 18))\r
-                return 16*SIZE_1MB;\r
-            else\r
-                return SIZE_1MB;\r
-        } else if ((Entry.Value & 0x3) == 1) {      // Level2 Table split 1MB section\r
-            return SIZE_1MB;\r
-        } else {\r
-            DEBUG((EFI_D_ERROR, "MmuEntryGetSize: Value:0x%X",Entry.Value));\r
-            ASSERT(0);\r
-            return 0;\r
-        }\r
-    } else if (Entry.Level == Level2) {\r
-        if ((Entry.Value & 0x3) == 0) {           // Ignored\r
-            return 0;\r
-        } else if ((Entry.Value & 0x3) == 1) {    // Large Page\r
-            return SIZE_64KB;\r
-        } else if ((Entry.Value & 0x2) == 2) {    // Small Page\r
-            return SIZE_4KB;\r
-        } else {\r
-            ASSERT(0);\r
-            return 0;\r
-        }\r
+UINT32\r
+MmuEntryGetSize (\r
+  IN MMU_ENTRY Entry\r
+  )\r
+{\r
+  if (Entry.Level == Level1) {\r
+    if ((Entry.Value & 0x3) == 0) {\r
+      return 0;\r
+    } else if ((Entry.Value & 0x3) == 2) {\r
+      if (Entry.Value & (1 << 18))\r
+        return 16*SIZE_1MB;\r
+      else\r
+        return SIZE_1MB;\r
+    } else if ((Entry.Value & 0x3) == 1) {      // Level2 Table split 1MB section\r
+      return SIZE_1MB;\r
     } else {\r
-        ASSERT(0);\r
-        return 0;\r
+      DEBUG((EFI_D_ERROR, "MmuEntryGetSize: Value:0x%X",Entry.Value));\r
+      ASSERT(0);\r
+      return 0;\r
     }\r
+  } else if (Entry.Level == Level2) {\r
+    if ((Entry.Value & 0x3) == 0) {           // Ignored\r
+      return 0;\r
+    } else if ((Entry.Value & 0x3) == 1) {    // Large Page\r
+      return SIZE_64KB;\r
+    } else if ((Entry.Value & 0x2) == 2) {    // Small Page\r
+      return SIZE_4KB;\r
+    } else {\r
+      ASSERT(0);\r
+      return 0;\r
+    }\r
+  } else {\r
+    ASSERT(0);\r
+    return 0;\r
+  }\r
 }\r
 \r
-CONST CHAR8* MmuEntryGetAttributesName(MMU_ENTRY Entry) {\r
-    if (Entry.Level == Level1) {\r
-        if (GET_TT_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_SECTION_WRITE_BACK(0))\r
-            return "TT_DESCRIPTOR_SECTION_WRITE_BACK";\r
-        else if (GET_TT_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0))\r
-            return "TT_DESCRIPTOR_SECTION_WRITE_THROUGH";\r
-        else if (GET_TT_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_SECTION_DEVICE(0))\r
-            return "TT_DESCRIPTOR_SECTION_DEVICE";\r
-        else if (GET_TT_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_SECTION_UNCACHED(0))\r
-            return "TT_DESCRIPTOR_SECTION_UNCACHED";\r
-        else if (GET_TT_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_SECTION_STRONGLY_ORDER)\r
-               return "TT_DESCRIPTOR_SECTION_STRONGLY_ORDERED";\r
-        else {\r
-            return "SectionUnknown";\r
-        }\r
-    } else if ((Entry.Level == Level2) && ((Entry.Value & 0x2) == 2)) { //Small Page\r
-        if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_WRITE_BACK)\r
-            return "TT_DESCRIPTOR_PAGE_WRITE_BACK";\r
-        else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_WRITE_THROUGH)\r
-            return "TT_DESCRIPTOR_PAGE_WRITE_THROUGH";\r
-        else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_DEVICE)\r
-            return "TT_DESCRIPTOR_PAGE_DEVICE";\r
-        else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_UNCACHED)\r
-            return "TT_DESCRIPTOR_PAGE_UNCACHED";\r
-        else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_STRONGLY_ORDER)\r
-               return "TT_DESCRIPTOR_PAGE_STRONGLY_ORDERED";\r
-        else {\r
-            return "PageUnknown";\r
-        }\r
-    } else if ((Entry.Level == Level2) && ((Entry.Value & 0x3) == 1)) { //Large Page\r
-        if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_WRITE_BACK)\r
-            return "TT_DESCRIPTOR_LARGEPAGE_WRITE_BACK";\r
-        else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_WRITE_THROUGH)\r
-            return "TT_DESCRIPTOR_LARGEPAGE_WRITE_THROUGH";\r
-        else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_DEVICE)\r
-            return "TT_DESCRIPTOR_LARGEPAGE_DEVICE";\r
-        else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_UNCACHED)\r
-            return "TT_DESCRIPTOR_LARGEPAGE_UNCACHED";\r
-        else {\r
-            return "LargePageUnknown";\r
-        }\r
-    } else {\r
-        ASSERT(0);\r
-        return "";\r
+CONST CHAR8*\r
+MmuEntryGetAttributesName (\r
+  IN MMU_ENTRY Entry\r
+  )\r
+{\r
+  UINT32 Value;\r
+\r
+  if (Entry.Level == Level1) {\r
+    Value = GET_TT_ATTRIBUTES(Entry.Value) | TT_DESCRIPTOR_SECTION_NS_MASK;\r
+    if (Value == TT_DESCRIPTOR_SECTION_WRITE_BACK(0))\r
+      return "TT_DESCRIPTOR_SECTION_WRITE_BACK";\r
+    else if (Value == TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0))\r
+      return "TT_DESCRIPTOR_SECTION_WRITE_THROUGH";\r
+    else if (Value == TT_DESCRIPTOR_SECTION_DEVICE(0))\r
+      return "TT_DESCRIPTOR_SECTION_DEVICE";\r
+    else if (Value == TT_DESCRIPTOR_SECTION_UNCACHED(0))\r
+      return "TT_DESCRIPTOR_SECTION_UNCACHED";\r
+    else if (Value == TT_DESCRIPTOR_SECTION_STRONGLY_ORDER)\r
+      return "TT_DESCRIPTOR_SECTION_STRONGLY_ORDERED";\r
+    else {\r
+      return "SectionUnknown";\r
+    }\r
+  } else if ((Entry.Level == Level2) && ((Entry.Value & 0x2) == 2)) { //Small Page\r
+    Value = GET_TT_PAGE_ATTRIBUTES(Entry.Value);\r
+    if (Value == TT_DESCRIPTOR_PAGE_WRITE_BACK)\r
+      return "TT_DESCRIPTOR_PAGE_WRITE_BACK";\r
+    else if (Value == TT_DESCRIPTOR_PAGE_WRITE_THROUGH)\r
+      return "TT_DESCRIPTOR_PAGE_WRITE_THROUGH";\r
+    else if (Value == TT_DESCRIPTOR_PAGE_DEVICE)\r
+      return "TT_DESCRIPTOR_PAGE_DEVICE";\r
+    else if (Value == TT_DESCRIPTOR_PAGE_UNCACHED)\r
+      return "TT_DESCRIPTOR_PAGE_UNCACHED";\r
+    else if (Value == TT_DESCRIPTOR_PAGE_STRONGLY_ORDER)\r
+      return "TT_DESCRIPTOR_PAGE_STRONGLY_ORDERED";\r
+    else {\r
+      return "PageUnknown";\r
+    }\r
+  } else if ((Entry.Level == Level2) && ((Entry.Value & 0x3) == 1)) { //Large Page\r
+    Value = GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value);\r
+    if (Value == TT_DESCRIPTOR_LARGEPAGE_WRITE_BACK)\r
+      return "TT_DESCRIPTOR_LARGEPAGE_WRITE_BACK";\r
+    else if (Value == TT_DESCRIPTOR_LARGEPAGE_WRITE_THROUGH)\r
+      return "TT_DESCRIPTOR_LARGEPAGE_WRITE_THROUGH";\r
+    else if (Value == TT_DESCRIPTOR_LARGEPAGE_DEVICE)\r
+      return "TT_DESCRIPTOR_LARGEPAGE_DEVICE";\r
+    else if (Value == TT_DESCRIPTOR_LARGEPAGE_UNCACHED)\r
+      return "TT_DESCRIPTOR_LARGEPAGE_UNCACHED";\r
+    else {\r
+      return "LargePageUnknown";\r
     }\r
+  } else {\r
+    ASSERT(0);\r
+    return "";\r
+  }\r
 }\r
 \r
-UINT32 MmuEntryGetAttributes(MMU_ENTRY Entry) {\r
-    if (Entry.Level == Level1) {\r
-        if ((Entry.Value & 0x3) == 0) {\r
-            return 0;\r
-        } else if ((Entry.Value & 0x3) == 2) {\r
-            return GET_TT_ATTRIBUTES(Entry.Value);\r
-        } else {\r
-            return 0;\r
-        }\r
-    } else if ((Entry.Level == Level2) && ((Entry.Value & 0x2) == 2)) { //Small Page\r
-        if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_WRITE_BACK)\r
-            return TT_DESCRIPTOR_SECTION_WRITE_BACK(0);\r
-        else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_WRITE_THROUGH)\r
-            return TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0);\r
-        else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_DEVICE)\r
-            return TT_DESCRIPTOR_SECTION_DEVICE(0);\r
-        else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_UNCACHED)\r
-            return TT_DESCRIPTOR_SECTION_UNCACHED(0);\r
-        else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_STRONGLY_ORDER)\r
-               return TT_DESCRIPTOR_SECTION_STRONGLY_ORDER;\r
-        else {\r
-            return 0;\r
-        }\r
-    } else if ((Entry.Level == Level2) && ((Entry.Value & 0x3) == 1)) { //Large Page\r
-        if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_WRITE_BACK)\r
-            return TT_DESCRIPTOR_SECTION_WRITE_BACK(0);\r
-        else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_WRITE_THROUGH)\r
-            return TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0);\r
-        else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_DEVICE)\r
-            return TT_DESCRIPTOR_SECTION_DEVICE(0);\r
-        else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_UNCACHED)\r
-            return TT_DESCRIPTOR_SECTION_UNCACHED(0);\r
-        else {\r
-            return 0;\r
-        }\r
+UINT32\r
+MmuEntryGetAttributes (\r
+  IN MMU_ENTRY Entry\r
+  )\r
+{\r
+  if (Entry.Level == Level1) {\r
+    if ((Entry.Value & 0x3) == 0) {\r
+      return 0;\r
+    } else if ((Entry.Value & 0x3) == 2) {\r
+      return GET_TT_ATTRIBUTES(Entry.Value);\r
     } else {\r
-        return 0;\r
+      return 0;\r
+    }\r
+  } else if ((Entry.Level == Level2) && ((Entry.Value & 0x2) == 2)) { //Small Page\r
+    if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_WRITE_BACK)\r
+      return TT_DESCRIPTOR_SECTION_WRITE_BACK(0);\r
+    else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_WRITE_THROUGH)\r
+      return TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0);\r
+    else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_DEVICE)\r
+      return TT_DESCRIPTOR_SECTION_DEVICE(0);\r
+    else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_UNCACHED)\r
+      return TT_DESCRIPTOR_SECTION_UNCACHED(0);\r
+    else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_STRONGLY_ORDER)\r
+      return TT_DESCRIPTOR_SECTION_STRONGLY_ORDER;\r
+    else {\r
+      return 0;\r
+    }\r
+  } else if ((Entry.Level == Level2) && ((Entry.Value & 0x3) == 1)) { //Large Page\r
+    if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_WRITE_BACK)\r
+      return TT_DESCRIPTOR_SECTION_WRITE_BACK(0);\r
+    else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_WRITE_THROUGH)\r
+      return TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0);\r
+    else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_DEVICE)\r
+      return TT_DESCRIPTOR_SECTION_DEVICE(0);\r
+    else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_UNCACHED)\r
+      return TT_DESCRIPTOR_SECTION_UNCACHED(0);\r
+    else {\r
+      return 0;\r
     }\r
+  } else {\r
+    return 0;\r
+  }\r
 }\r
 \r
 \r
-MMU_ENTRY DumpMmuLevel(MMU_LEVEL Level, UINT32* Table, MMU_ENTRY PreviousEntry) {\r
-    UINT32      Index = 0, Count;\r
-    MMU_ENTRY   LastEntry, Entry;\r
+MMU_ENTRY\r
+DumpMmuLevel (\r
+  IN MMU_LEVEL Level,\r
+  IN UINT32* Table,\r
+  IN MMU_ENTRY PreviousEntry\r
+  )\r
+{\r
+  UINT32      Index = 0, Count;\r
+  MMU_ENTRY   LastEntry, Entry;\r
 \r
        ASSERT((Level == Level1) || (Level == Level2));\r
 \r
-    if (Level == Level1)    Count = 4096;\r
-    else                    Count = 256;\r
+  if (Level == Level1)    Count = 4096;\r
+  else                    Count = 256;\r
 \r
-    // At Level1, we will get into this function because PreviousEntry is not valid\r
-    if (!MmuEntryIsValidAddress((MMU_LEVEL)(Level-1),PreviousEntry.Value)) {\r
-        // Find the first valid address\r
-        for (; (Index < Count) && (!MmuEntryIsValidAddress(Level,Table[Index])); Index++);\r
+  // At Level1, we will get into this function because PreviousEntry is not valid\r
+  if (!MmuEntryIsValidAddress((MMU_LEVEL)(Level-1),PreviousEntry.Value)) {\r
+      // Find the first valid address\r
+      for (; (Index < Count) && (!MmuEntryIsValidAddress(Level,Table[Index])); Index++);\r
 \r
-        LastEntry = MmuEntryCreate(Level,Table,Index);\r
-        Index++;\r
-    } else {\r
-       LastEntry = PreviousEntry;\r
-    }\r
+      LastEntry = MmuEntryCreate(Level,Table,Index);\r
+      Index++;\r
+  } else {\r
+    LastEntry = PreviousEntry;\r
+  }\r
 \r
-    for (; Index < Count; Index++) {\r
-        Entry = MmuEntryCreate(Level,Table,Index);\r
-        if ((Level == Level1) && ((Entry.Value & 0x3) == 1)) {       // We have got a Level2 table redirection\r
-               LastEntry = DumpMmuLevel(Level2,(UINT32*)(Entry.Value & 0xFFFFFC00),LastEntry);\r
-        } else if (!MmuEntryIsValidAddress(Level,Table[Index])) {\r
-            if (MmuEntryIsValidAddress(LastEntry.Level,LastEntry.Value)) {\r
-                AsciiPrint("0x%08X-0x%08X\t%a\n",\r
-                    MmuEntryGetAddress(LastEntry),MmuEntryGetAddress(PreviousEntry)+MmuEntryGetSize(PreviousEntry)-1,\r
-                    MmuEntryGetAttributesName(LastEntry));\r
-            }\r
-            LastEntry = Entry;\r
-        } else {\r
-            if (MmuEntryGetAttributes(LastEntry) != MmuEntryGetAttributes(Entry)) {\r
-                if (MmuEntryIsValidAddress(Level,LastEntry.Value)) {\r
-                       AsciiPrint("0x%08X-0x%08X\t%a\n",\r
-                            MmuEntryGetAddress(LastEntry),MmuEntryGetAddress(PreviousEntry)+MmuEntryGetSize(PreviousEntry)-1,\r
-                            MmuEntryGetAttributesName(LastEntry));\r
-                }\r
-                LastEntry = Entry;\r
-            } else {\r
-               ASSERT(LastEntry.Value != 0);\r
-            }\r
-        }\r
-        PreviousEntry = Entry;\r
+  for (; Index < Count; Index++) {\r
+    Entry = MmuEntryCreate(Level,Table,Index);\r
+    if ((Level == Level1) && ((Entry.Value & 0x3) == 1)) {       // We have got a Level2 table redirection\r
+      LastEntry = DumpMmuLevel(Level2,(UINT32*)(Entry.Value & 0xFFFFFC00),LastEntry);\r
+    } else if (!MmuEntryIsValidAddress(Level,Table[Index])) {\r
+      if (MmuEntryIsValidAddress(LastEntry.Level,LastEntry.Value)) {\r
+          AsciiPrint("0x%08X-0x%08X\t%a\n",\r
+              MmuEntryGetAddress(LastEntry),MmuEntryGetAddress(PreviousEntry)+MmuEntryGetSize(PreviousEntry)-1,\r
+              MmuEntryGetAttributesName(LastEntry));\r
+      }\r
+      LastEntry = Entry;\r
+    } else {\r
+      if (MmuEntryGetAttributes(LastEntry) != MmuEntryGetAttributes(Entry)) {\r
+          if (MmuEntryIsValidAddress(Level,LastEntry.Value)) {\r
+            AsciiPrint("0x%08X-0x%08X\t%a\n",\r
+                      MmuEntryGetAddress(LastEntry),MmuEntryGetAddress(PreviousEntry)+MmuEntryGetSize(PreviousEntry)-1,\r
+                      MmuEntryGetAttributesName(LastEntry));\r
+          }\r
+          LastEntry = Entry;\r
+      } else {\r
+        ASSERT(LastEntry.Value != 0);\r
+      }\r
     }\r
+    PreviousEntry = Entry;\r
+  }\r
 \r
-    if ((Level == Level1) && (LastEntry.Index != Index) && MmuEntryIsValidAddress(Level,LastEntry.Value)) {\r
-       AsciiPrint("0x%08X-0x%08X\t%a\n",\r
-                    MmuEntryGetAddress(LastEntry),MmuEntryGetAddress(PreviousEntry)+MmuEntryGetSize(PreviousEntry)-1,\r
-                    MmuEntryGetAttributesName(LastEntry));\r
-    }\r
+  if ((Level == Level1) && (LastEntry.Index != Index) && MmuEntryIsValidAddress(Level,LastEntry.Value)) {\r
+    AsciiPrint("0x%08X-0x%08X\t%a\n",\r
+                  MmuEntryGetAddress(LastEntry),MmuEntryGetAddress(PreviousEntry)+MmuEntryGetSize(PreviousEntry)-1,\r
+                  MmuEntryGetAttributesName(LastEntry));\r
+  }\r
 \r
-    return LastEntry;\r
+  return LastEntry;\r
 }\r
 \r
 \r
@@ -317,17 +355,17 @@ EblDumpMmu (
   IN CHAR8  **Argv\r
   )\r
 {\r
-    UINT32  *TTEntry;\r
-    MMU_ENTRY NoEntry;\r
+  UINT32  *TTEntry;\r
+  MMU_ENTRY NoEntry;\r
+\r
+  TTEntry = ArmGetTTBR0BaseAddress();\r
 \r
-    TTEntry = ArmGetTTBR0BaseAddress();\r
+  AsciiPrint ("\nTranslation Table:0x%X\n",TTEntry);\r
+  AsciiPrint ("Address Range\t\tAttributes\n");\r
+  AsciiPrint ("____________________________________________________\n");\r
 \r
-    AsciiPrint ("\nTranslation Table:0x%X\n",TTEntry);\r
-    AsciiPrint ("Address Range\t\tAttributes\n");\r
-    AsciiPrint ("____________________________________________________\n");\r
-    \r
-    NoEntry.Level = (MMU_LEVEL)200;\r
-    DumpMmuLevel(Level1,TTEntry,NoEntry);\r
+  NoEntry.Level = (MMU_LEVEL)200;\r
+  DumpMmuLevel(Level1,TTEntry,NoEntry);\r
 \r
-    return EFI_SUCCESS;\r
+  return EFI_SUCCESS;\r
 }\r