Contributed-under: TianoCore Contribution Agreement 1.0
Signed off by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Eric Dong <eric.dong@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15743
6f19259b-4bc3-4df7-8a09-
765794883524
@param[in] SizeOfRam Size of the temporary memory available for use.\r
@param[in] TempRamBase Base address of tempory ram\r
@param[in] BootFirmwareVolume Base address of the Boot Firmware Volume.\r
@param[in] SizeOfRam Size of the temporary memory available for use.\r
@param[in] TempRamBase Base address of tempory ram\r
@param[in] BootFirmwareVolume Base address of the Boot Firmware Volume.\r
+ @param[in] PeiCoreEntry Pei Core entrypoint.\r
\r
@return This function never returns.\r
\r
\r
@return This function never returns.\r
\r
SecStartup (\r
IN UINT32 SizeOfRam,\r
IN UINT32 TempRamBase,\r
SecStartup (\r
IN UINT32 SizeOfRam,\r
IN UINT32 TempRamBase,\r
- IN VOID *BootFirmwareVolume\r
+ IN VOID *BootFirmwareVolume,\r
+ IN UINTN PeiCoreEntry\r
)\r
{\r
EFI_SEC_PEI_HAND_OFF SecCoreData;\r
)\r
{\r
EFI_SEC_PEI_HAND_OFF SecCoreData;\r
//\r
// Call PeiCore Entry\r
//\r
//\r
// Call PeiCore Entry\r
//\r
- PeiCore = (PEI_CORE_ENTRY)(*(UINTN *)((&BootFirmwareVolume) + 1));\r
+ PeiCore = (PEI_CORE_ENTRY)(PeiCoreEntry);\r
PeiCore (&SecCoreData, mPeiSecPlatformInformationPpi);\r
\r
//\r
PeiCore (&SecCoreData, mPeiSecPlatformInformationPpi);\r
\r
//\r
@param[in] SizeOfRam Size of the temporary memory available for use.\r
@param[in] TempRamBase Base address of tempory ram\r
@param[in] BootFirmwareVolume Base address of the Boot Firmware Volume.\r
@param[in] SizeOfRam Size of the temporary memory available for use.\r
@param[in] TempRamBase Base address of tempory ram\r
@param[in] BootFirmwareVolume Base address of the Boot Firmware Volume.\r
+ @param[in] PeiCoreEntry Pei Core entrypoint.\r
\r
@return This function never returns.\r
\r
\r
@return This function never returns.\r
\r
SecStartup (\r
IN UINT32 SizeOfRam,\r
IN UINT32 TempRamBase,\r
SecStartup (\r
IN UINT32 SizeOfRam,\r
IN UINT32 TempRamBase,\r
- IN VOID *BootFirmwareVolume\r
+ IN VOID *BootFirmwareVolume,\r
+ IN UINTN PeiCoreEntry\r
+ S3PeiMemBase = 0;\r
+ S3PeiMemSize = 0;\r
Status = GetS3MemoryInfo (&S3PeiMemBase, &S3PeiMemSize);\r
ASSERT_EFI_ERROR (Status);\r
DEBUG((DEBUG_INFO, "S3 memory %Xh - %Xh bytes\n", S3PeiMemBase, S3PeiMemSize));\r
Status = GetS3MemoryInfo (&S3PeiMemBase, &S3PeiMemSize);\r
ASSERT_EFI_ERROR (Status);\r
DEBUG((DEBUG_INFO, "S3 memory %Xh - %Xh bytes\n", S3PeiMemBase, S3PeiMemSize));\r
+#ifndef __FSP_H__\r
+#define __FSP_H__\r
+\r
//\r
#define FSP_HEADER_IMAGEBASE_OFFSET 0x1C\r
#define FSP_HEADER_TEMPRAMINIT_OFFSET 0x30\r
//\r
#define FSP_HEADER_IMAGEBASE_OFFSET 0x1C\r
#define FSP_HEADER_TEMPRAMINIT_OFFSET 0x30\r
Ia32/PeiCoreEntry.asm\r
Ia32/AsmSaveSecContext.asm\r
Ia32/Stack.asm\r
Ia32/PeiCoreEntry.asm\r
Ia32/AsmSaveSecContext.asm\r
Ia32/Stack.asm\r
Ia32/SecEntry.S\r
Ia32/PeiCoreEntry.S\r
Ia32/AsmSaveSecContext.S\r
Ia32/SecEntry.S\r
Ia32/PeiCoreEntry.S\r
Ia32/AsmSaveSecContext.S\r