/** @file\r
Ia32 arch definition for CPU Exception Handler Library.\r
\r
- Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
#define CPU_TSS_DESC_SIZE \\r
(sizeof (IA32_TSS_DESCRIPTOR) * \\r
- (PcdGetSize (PcdCpuStackSwitchExceptionList) + 1))\r
+ (FixedPcdGetSize (PcdCpuStackSwitchExceptionList) + 1))\r
\r
#define CPU_TSS_SIZE \\r
(sizeof (IA32_TASK_STATE_SEGMENT) * \\r
- (PcdGetSize (PcdCpuStackSwitchExceptionList) + 1))\r
+ (FixedPcdGetSize (PcdCpuStackSwitchExceptionList) + 1))\r
\r
#endif\r