--- /dev/null
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution. The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+; AsmFuncs.nasm\r
+;\r
+; Abstract:\r
+;\r
+; Debug interrupt handle functions.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+#include "DebugException.h"\r
+\r
+;\r
+; InterruptProcess()\r
+;\r
+extern ASM_PFX(InterruptProcess)\r
+\r
+global ASM_PFX(Exception0Handle)\r
+global ASM_PFX(TimerInterruptHandle)\r
+global ASM_PFX(ExceptionStubHeaderSize)\r
+\r
+%macro AGENT_HANDLER_SIGNATURE 0\r
+ db 0x41, 0x47, 0x54, 0x48 ; SIGNATURE_32('A','G','T','H')\r
+%endmacro\r
+\r
+SECTION .data\r
+\r
+ASM_PFX(ExceptionStubHeaderSize): DD Exception1Handle - ASM_PFX(Exception0Handle)\r
+CommonEntryAddr: DD CommonEntry\r
+\r
+SECTION .text\r
+\r
+AGENT_HANDLER_SIGNATURE\r
+ASM_PFX(Exception0Handle):\r
+ cli\r
+ push eax\r
+ mov eax, 0\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception1Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 1\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception2Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 2\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception3Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 3\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception4Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 4\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception5Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 5\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception6Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 6\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception7Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 7\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception8Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 8\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception9Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 9\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception10Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 10\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception11Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 11\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception12Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 12\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception13Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 13\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception14Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 14\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception15Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 15\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception16Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 16\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception17Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 17\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception18Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 18\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+Exception19Handle:\r
+ cli\r
+ push eax\r
+ mov eax, 19\r
+ jmp dword [CommonEntryAddr]\r
+AGENT_HANDLER_SIGNATURE\r
+ASM_PFX(TimerInterruptHandle):\r
+ cli\r
+ push eax\r
+ mov eax, 32\r
+ jmp dword [CommonEntryAddr]\r
+\r
+CommonEntry:\r
+;\r
+; +---------------------+\r
+; + EFlags +\r
+; +---------------------+\r
+; + CS +\r
+; +---------------------+\r
+; + EIP +\r
+; +---------------------+\r
+; + Error Code +\r
+; +---------------------+\r
+; + EAX / Vector Number +\r
+; +---------------------+\r
+; + EBP +\r
+; +---------------------+ <-- EBP\r
+;\r
+ cmp eax, DEBUG_EXCEPT_DOUBLE_FAULT\r
+ je NoExtrPush\r
+ cmp eax, DEBUG_EXCEPT_INVALID_TSS\r
+ je NoExtrPush\r
+ cmp eax, DEBUG_EXCEPT_SEG_NOT_PRESENT\r
+ je NoExtrPush\r
+ cmp eax, DEBUG_EXCEPT_STACK_FAULT\r
+ je NoExtrPush\r
+ cmp eax, DEBUG_EXCEPT_GP_FAULT\r
+ je NoExtrPush\r
+ cmp eax, DEBUG_EXCEPT_PAGE_FAULT\r
+ je NoExtrPush\r
+ cmp eax, DEBUG_EXCEPT_ALIGNMENT_CHECK\r
+ je NoExtrPush\r
+\r
+ push dword [esp]\r
+ mov dword [esp + 4], 0\r
+\r
+NoExtrPush:\r
+\r
+ push ebp\r
+ mov ebp, esp ; save esp in ebp\r
+ ;\r
+ ; Make stack 16-byte alignment to make sure save fxrstor later\r
+ ;\r
+ and esp, 0xfffffff0\r
+ sub esp, 12\r
+\r
+ ; store UINT32 Edi, Esi, Ebp, Ebx, Edx, Ecx, Eax;\r
+ push dword [ebp + 4] ; original eax\r
+ push ebx\r
+ push ecx\r
+ push edx\r
+ mov ebx, eax ; save vector in ebx\r
+ mov eax, ebp\r
+ add eax, 4 * 6\r
+ push eax ; original ESP\r
+ push dword [ebp] ; EBP\r
+ push esi\r
+ push edi\r
+\r
+ ;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
+ ;; insure FXSAVE/FXRSTOR is enabled in CR4...\r
+ ;; ... while we're at it, make sure DE is also enabled...\r
+ mov eax, 1\r
+ push ebx ; temporarily save value of ebx on stack\r
+ cpuid ; use CPUID to determine if FXSAVE/FXRESTOR and\r
+ ; DE are supported\r
+ pop ebx ; retore value of ebx that was overwritten by CPUID\r
+ mov eax, cr4\r
+ push eax ; push cr4 firstly\r
+ test edx, BIT24 ; Test for FXSAVE/FXRESTOR support\r
+ jz .0\r
+ or eax, BIT9 ; Set CR4.OSFXSR\r
+.0:\r
+ test edx, BIT2 ; Test for Debugging Extensions support\r
+ jz .1\r
+ or eax, BIT3 ; Set CR4.DE\r
+.1:\r
+ mov cr4, eax\r
+ mov eax, cr3\r
+ push eax\r
+ mov eax, cr2\r
+ push eax\r
+ push 0 ; cr0 will not saved???\r
+ mov eax, cr0\r
+ push eax\r
+\r
+ xor ecx, ecx\r
+ mov ecx, Ss\r
+ push ecx\r
+ mov ecx, Cs\r
+ push ecx\r
+ mov ecx, Ds\r
+ push ecx\r
+ mov ecx, Es\r
+ push ecx\r
+ mov ecx, Fs\r
+ push ecx\r
+ mov ecx, Gs\r
+ push ecx\r
+\r
+ ;; EIP\r
+ mov ecx, [ebp + 4 * 3] ; EIP\r
+ push ecx\r
+\r
+ ;; UINT32 Gdtr[2], Idtr[2];\r
+ sub esp, 8\r
+ sidt [esp]\r
+ sub esp, 8\r
+ sgdt [esp]\r
+\r
+ ;; UINT32 Ldtr, Tr;\r
+ xor eax, eax\r
+ str ax\r
+ push eax\r
+ sldt ax\r
+ push eax\r
+\r
+ ;; EFlags\r
+ mov ecx, [ebp + 4 * 5]\r
+ push ecx\r
+\r
+ ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
+ mov eax, dr7\r
+ push eax\r
+\r
+ ;; clear Dr7 while executing debugger itself\r
+ xor eax, eax\r
+ mov dr7, eax\r
+\r
+ ;; Dr6\r
+ mov eax, dr6\r
+ push eax\r
+\r
+ ;; insure all status bits in dr6 are clear...\r
+ xor eax, eax\r
+ mov dr6, eax\r
+\r
+ mov eax, dr3\r
+ push eax\r
+ mov eax, dr2\r
+ push eax\r
+ mov eax, dr1\r
+ push eax\r
+ mov eax, dr0\r
+ push eax\r
+\r
+ ;; Clear Direction Flag\r
+ cld\r
+\r
+ ;; FX_SAVE_STATE_IA32 FxSaveState;\r
+ sub esp, 512\r
+ mov edi, esp\r
+ ;; Clear the buffer\r
+ xor eax, eax\r
+ mov ecx, 128 ;= 512 / 4\r
+ rep stosd\r
+ mov edi, esp\r
+\r
+ test edx, BIT24 ; Test for FXSAVE/FXRESTOR support.\r
+ ; edx still contains result from CPUID above\r
+ jz .2\r
+ db 0xf, 0xae, 00000111y ;fxsave [edi]\r
+.2:\r
+\r
+ ;; save the exception data\r
+ push dword [ebp + 8]\r
+\r
+ ; call the C interrupt process function\r
+ push esp ; Structure\r
+ push ebx ; vector\r
+ call ASM_PFX(InterruptProcess)\r
+ add esp, 8\r
+\r
+ ; skip the exception data\r
+ add esp, 4\r
+\r
+ ;; FX_SAVE_STATE_IA32 FxSaveState;\r
+ mov esi, esp\r
+ mov eax, 1\r
+ cpuid ; use CPUID to determine if FXSAVE/FXRESTOR are supported\r
+ test edx, BIT24 ; Test for FXSAVE/FXRESTOR support\r
+ jz .3\r
+ db 0xf, 0xae, 00001110y ; fxrstor [esi]\r
+.3:\r
+ add esp, 512\r
+\r
+ ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
+ pop eax\r
+ mov dr0, eax\r
+ pop eax\r
+ mov dr1, eax\r
+ pop eax\r
+ mov dr2, eax\r
+ pop eax\r
+ mov dr3, eax\r
+ ;; skip restore of dr6. We cleared dr6 during the context save.\r
+ add esp, 4\r
+ pop eax\r
+ mov dr7, eax\r
+\r
+ ;; set EFlags\r
+ pop dword [ebp + 4 * 5] ; set EFLAGS in stack\r
+\r
+ ;; UINT32 Ldtr, Tr;\r
+ ;; UINT32 Gdtr[2], Idtr[2];\r
+ ;; Best not let anyone mess with these particular registers...\r
+ add esp, 24\r
+\r
+ ;; UINT32 Eip;\r
+ pop dword [ebp + 4 * 3] ; set EIP in stack\r
+\r
+ ;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;\r
+ ;; NOTE - modified segment registers could hang the debugger... We\r
+ ;; could attempt to insulate ourselves against this possibility,\r
+ ;; but that poses risks as well.\r
+ ;;\r
+ pop gs\r
+ pop fs\r
+ pop es\r
+ pop ds\r
+ pop dword [ebp + 4 * 4] ; set CS in stack\r
+ pop ss\r
+\r
+ ;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
+ pop eax\r
+ mov cr0, eax\r
+ add esp, 4 ; skip for Cr1\r
+ pop eax\r
+ mov cr2, eax\r
+ pop eax\r
+ mov cr3, eax\r
+ pop eax\r
+ mov cr4, eax\r
+\r
+ ;; restore general register\r
+ pop edi\r
+ pop esi\r
+ pop dword [ebp] ; save updated ebp\r
+ pop dword [ebp + 4] ; save updated esp\r
+ pop edx\r
+ pop ecx\r
+ pop ebx\r
+ pop eax\r
+\r
+ mov esp, ebp\r
+ pop ebp ; restore ebp maybe updated\r
+ pop esp ; restore esp maybe updated\r
+ sub esp, 4 * 3 ; restore interupt pushced stack\r
+\r
+ iretd\r
+\r