]> git.proxmox.com Git - mirror_edk2.git/commitdiff
Clean up module to use SMM CPU Save State Protocol definitions from IntelFrameworkPkg...
authormdkinney <mdkinney@6f19259b-4bc3-4df7-8a09-765794883524>
Wed, 27 Jan 2010 23:11:00 +0000 (23:11 +0000)
committermdkinney <mdkinney@6f19259b-4bc3-4df7-8a09-765794883524>
Wed, 27 Jan 2010 23:11:00 +0000 (23:11 +0000)
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9843 6f19259b-4bc3-4df7-8a09-765794883524

EdkCompatibilityPkg/Compatibility/SmmBaseHelper/CpuSaveState.h [deleted file]
EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.c
EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.h [deleted file]
EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf

diff --git a/EdkCompatibilityPkg/Compatibility/SmmBaseHelper/CpuSaveState.h b/EdkCompatibilityPkg/Compatibility/SmmBaseHelper/CpuSaveState.h
deleted file mode 100644 (file)
index 17352bc..0000000
+++ /dev/null
@@ -1,143 +0,0 @@
-/** @file\r
-  Definitions for SMM CPU Save State per Framework SMM CIS 0.91 spec.\r
-  \r
-  Copyright (c) 2009, Intel Corporation\r
-  All rights reserved. This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#ifndef _CPU_SAVE_STATE_H_\r
-#define _CPU_SAVE_STATE_H_\r
-\r
-typedef unsigned char               ASM_UINT8;\r
-typedef ASM_UINT8                   ASM_BOOL;\r
-typedef unsigned short              ASM_UINT16;\r
-typedef unsigned long               ASM_UINT32;\r
-\r
-typedef UINT64                      ASM_UINT64;\r
-\r
-#ifndef __GNUC__\r
-#pragma pack (push)\r
-#pragma pack (1)\r
-#endif\r
-\r
-typedef struct _EFI_SMM_CPU_STATE32 {\r
-  ASM_UINT8                         Reserved1[0xf8];        // fe00h\r
-  ASM_UINT32                        SMBASE;                 // fef8h\r
-  ASM_UINT32                        SMMRevId;               // fefch\r
-  ASM_UINT16                        IORestart;              // ff00h\r
-  ASM_UINT16                        AutoHALTRestart;        // ff02h\r
-  ASM_UINT32                        IEDBASE;                // ff04h\r
-  ASM_UINT8                         Reserved2[0x98];        // ff08h\r
-  ASM_UINT32                        IOMemAddr;              // ffa0h\r
-  ASM_UINT32                        IOMisc;                 // ffa4h\r
-  ASM_UINT32                        _ES;\r
-  ASM_UINT32                        _CS;\r
-  ASM_UINT32                        _SS;\r
-  ASM_UINT32                        _DS;\r
-  ASM_UINT32                        _FS;\r
-  ASM_UINT32                        _GS;\r
-  ASM_UINT32                        _LDTBase;\r
-  ASM_UINT32                        _TR;\r
-  ASM_UINT32                        _DR7;\r
-  ASM_UINT32                        _DR6;\r
-  ASM_UINT32                        _EAX;\r
-  ASM_UINT32                        _ECX;\r
-  ASM_UINT32                        _EDX;\r
-  ASM_UINT32                        _EBX;\r
-  ASM_UINT32                        _ESP;\r
-  ASM_UINT32                        _EBP;\r
-  ASM_UINT32                        _ESI;\r
-  ASM_UINT32                        _EDI;\r
-  ASM_UINT32                        _EIP;\r
-  ASM_UINT32                        _EFLAGS;\r
-  ASM_UINT32                        _CR3;\r
-  ASM_UINT32                        _CR0;\r
-} EFI_SMM_CPU_STATE32;\r
-\r
-typedef struct _EFI_SMM_CPU_STATE64 {\r
-  ASM_UINT8                         Reserved1[0x1d0];       // fc00h\r
-  ASM_UINT32                        GdtBaseHiDword;         // fdd0h\r
-  ASM_UINT32                        LdtBaseHiDword;         // fdd4h\r
-  ASM_UINT32                        IdtBaseHiDword;         // fdd8h\r
-  ASM_UINT8                         Reserved2[0xc];         // fddch\r
-  ASM_UINT64                        IO_EIP;                 // fde8h\r
-  ASM_UINT8                         Reserved3[0x50];        // fdf0h\r
-  ASM_UINT32                        _CR4;                   // fe40h\r
-  ASM_UINT8                         Reserved4[0x48];        // fe44h\r
-  ASM_UINT32                        GdtBaseLoDword;         // fe8ch\r
-  ASM_UINT32                        GdtLimit;               // fe90h\r
-  ASM_UINT32                        IdtBaseLoDword;         // fe94h\r
-  ASM_UINT32                        IdtLimit;               // fe98h\r
-  ASM_UINT32                        LdtBaseLoDword;         // fe9ch\r
-  ASM_UINT32                        LdtLimit;               // fea0h\r
-  ASM_UINT32                        LdtInfo;                // fea4h\r
-  ASM_UINT8                         Reserved5[0x50];        // fea8h\r
-  ASM_UINT32                        SMBASE;                 // fef8h\r
-  ASM_UINT32                        SMMRevId;               // fefch\r
-  ASM_UINT16                        AutoHALTRestart;        // ff00h\r
-  ASM_UINT16                        IORestart;              // ff02h\r
-  ASM_UINT32                        IEDBASE;                // ff04h\r
-  ASM_UINT8                         Reserved6[0x14];        // ff08h\r
-  ASM_UINT64                        _R15;                   // ff1ch\r
-  ASM_UINT64                        _R14;\r
-  ASM_UINT64                        _R13;\r
-  ASM_UINT64                        _R12;\r
-  ASM_UINT64                        _R11;\r
-  ASM_UINT64                        _R10;\r
-  ASM_UINT64                        _R9;\r
-  ASM_UINT64                        _R8;\r
-  ASM_UINT64                        _RAX;                   // ff5ch\r
-  ASM_UINT64                        _RCX;\r
-  ASM_UINT64                        _RDX;\r
-  ASM_UINT64                        _RBX;\r
-  ASM_UINT64                        _RSP;\r
-  ASM_UINT64                        _RBP;\r
-  ASM_UINT64                        _RSI;\r
-  ASM_UINT64                        _RDI;\r
-  ASM_UINT64                        IOMemAddr;              // ff9ch\r
-  ASM_UINT32                        IOMisc;                 // ffa4h\r
-  ASM_UINT32                        _ES;                    // ffa8h\r
-  ASM_UINT32                        _CS;\r
-  ASM_UINT32                        _SS;\r
-  ASM_UINT32                        _DS;\r
-  ASM_UINT32                        _FS;\r
-  ASM_UINT32                        _GS;\r
-  ASM_UINT32                        _LDTR;                  // ffc0h\r
-  ASM_UINT32                        _TR;\r
-  ASM_UINT64                        _DR7;                   // ffc8h\r
-  ASM_UINT64                        _DR6;\r
-  ASM_UINT64                        _RIP;                   // ffd8h\r
-  ASM_UINT64                        IA32_EFER;              // ffe0h\r
-  ASM_UINT64                        _RFLAGS;                // ffe8h\r
-  ASM_UINT64                        _CR3;                   // fff0h\r
-  ASM_UINT64                        _CR0;                   // fff8h\r
-} EFI_SMM_CPU_STATE64;\r
-\r
-#ifndef __GNUC__\r
-#pragma warning (push)\r
-#pragma warning (disable: 4201)\r
-#endif\r
-\r
-typedef union _EFI_SMM_CPU_STATE {\r
-  struct {\r
-    ASM_UINT8                       Reserved[0x200];\r
-    EFI_SMM_CPU_STATE32             x86;\r
-  };\r
-  EFI_SMM_CPU_STATE64               x64;\r
-} EFI_SMM_CPU_STATE;\r
-\r
-#ifndef __GNUC__\r
-#pragma warning (pop)\r
-#pragma pack (pop)\r
-#endif\r
-\r
-#define EFI_SMM_MIN_REV_ID_x64      0x30006\r
-\r
-#endif\r
index d03fcd3be443dd13c77da838a667cc99083bfa30..347e83d01f61b5d47aac6bf5e562e814677e0fcb 100644 (file)
@@ -4,7 +4,7 @@
   This driver is the counterpart of the SMM Base On SMM Base2 Thunk driver. It\r
   provides helping services in SMM to the SMM Base On SMM Base2 Thunk driver.\r
 \r
-  Copyright (c) 2009, Intel Corporation\r
+  Copyright (c) 2009 - 2010, Intel Corporation\r
   All rights reserved. This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
 \r
 **/\r
 \r
-#include "SmmBaseHelper.h"\r
+#include <PiSmm.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/UefiBootServicesTableLib.h>\r
+#include <Library/SmmServicesTableLib.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/PeCoffLib.h>\r
+#include <Library/DevicePathLib.h>\r
+#include <Library/CacheMaintenanceLib.h>\r
+#include <Guid/SmmBaseThunkCommunication.h>\r
+#include <Protocol/SmmBaseHelperReady.h>\r
+#include <Protocol/SmmCpu.h>\r
+#include <Protocol/LoadedImage.h>\r
+#include <Protocol/SmmCpuSaveState.h>\r
+\r
+///\r
+/// Structure for tracking paired information of registered Framework SMI handler\r
+/// and correpsonding dispatch handle for SMI handler thunk.\r
+///\r
+typedef struct {\r
+  LIST_ENTRY                    Link;\r
+  EFI_HANDLE                    DispatchHandle;\r
+  EFI_HANDLE                    SmmImageHandle;\r
+  EFI_SMM_CALLBACK_ENTRY_POINT  CallbackAddress;\r
+} CALLBACK_INFO;\r
+\r
+typedef struct {\r
+  ///\r
+  /// PI SMM CPU Save State register index\r
+  ///\r
+  EFI_SMM_SAVE_STATE_REGISTER   Register;\r
+  ///\r
+  /// Offset in Framework SMST\r
+  ///\r
+  UINTN                         Offset;\r
+} CPU_SAVE_STATE_CONVERSION;\r
+\r
+#define CPU_SAVE_STATE_GET_OFFSET(Field)  (UINTN)(&(((EFI_SMM_CPU_SAVE_STATE *) 0)->Ia32SaveState.Field))\r
+\r
 \r
 EFI_HANDLE                         mDispatchHandle;\r
 EFI_SMM_CPU_PROTOCOL               *mSmmCpu;\r
diff --git a/EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.h b/EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.h
deleted file mode 100644 (file)
index 5bc2187..0000000
+++ /dev/null
@@ -1,57 +0,0 @@
-/** @file\r
-  Include file for SMM Base Helper SMM driver.\r
-  \r
-  Copyright (c) 2009, Intel Corporation\r
-  All rights reserved. This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#ifndef  _SMM_BASE_HELPER_H_\r
-#define  _SMM_BASE_HELPER_H_\r
-\r
-#include <PiSmm.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/UefiBootServicesTableLib.h>\r
-#include <Library/SmmServicesTableLib.h>\r
-#include <Library/BaseLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/PeCoffLib.h>\r
-#include <Library/DevicePathLib.h>\r
-#include <Library/CacheMaintenanceLib.h>\r
-#include <Guid/SmmBaseThunkCommunication.h>\r
-#include <Protocol/SmmBaseHelperReady.h>\r
-#include <Protocol/SmmCpu.h>\r
-#include <Protocol/LoadedImage.h>\r
-#include "CpuSaveState.h"\r
-\r
-///\r
-/// Structure for tracking paired information of registered Framework SMI handler\r
-/// and correpsonding dispatch handle for SMI handler thunk.\r
-///\r
-typedef struct {\r
-  LIST_ENTRY                    Link;\r
-  EFI_HANDLE                    DispatchHandle;\r
-  EFI_HANDLE                    SmmImageHandle;\r
-  EFI_SMM_CALLBACK_ENTRY_POINT  CallbackAddress;\r
-} CALLBACK_INFO;\r
-\r
-typedef struct {\r
-  ///\r
-  /// PI SMM CPU Save State register index\r
-  ///\r
-  EFI_SMM_SAVE_STATE_REGISTER   Register;\r
-  ///\r
-  /// Offset in Framework SMST\r
-  ///\r
-  UINTN                         Offset;\r
-} CPU_SAVE_STATE_CONVERSION;\r
-\r
-#define CPU_SAVE_STATE_GET_OFFSET(Field)  (UINTN)(&(((EFI_SMM_CPU_SAVE_STATE *) 0)->Ia32SaveState.Field))\r
-\r
-#endif  \r
index 3a54544e20191e590b603d7acdda2b6d9e788f4e..cd425adfa05466611ef0c325ec7eda46caaaa41a 100644 (file)
@@ -1,7 +1,7 @@
 ## @file\r
 #  Component description file for SMM Base Helper SMM driver.\r
 #\r
-#  Copyright (c) 2009, Intel Corporation.\r
+#  Copyright (c) 2009 - 2010, Intel Corporation.\r
 #\r
 #  All rights reserved. This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
@@ -20,7 +20,6 @@
   MODULE_TYPE                    = DXE_SMM_DRIVER\r
   VERSION_STRING                 = 1.0\r
   PI_SPECIFICATION_VERSION       = 0x0001000A\r
-\r
   ENTRY_POINT                    = SmmBaseHelperMain\r
 \r
 #\r
@@ -31,7 +30,6 @@
 \r
 [Sources]\r
   SmmBaseHelper.c\r
-  SmmBaseHelper.h\r
  \r
 [Packages]\r
   MdePkg/MdePkg.dec\r
@@ -55,7 +53,7 @@
   gEfiSmmCpuProtocolGuid                 # PROTOCOL ALWAYS_CONSUMED\r
   gEfiLoadedImageProtocolGuid            # PROTOCOL ALWAYS_CONSUMED\r
   gEfiLoadedImageDevicePathProtocolGuid  # PROTOCOL ALWAYS_CONSUMED\r
-\r
+  gEfiSmmCpuSaveStateProtocolGuid        # PROTOCOL ALWAYS_CONSUMED\r
+  \r
 [Depex]\r
   gEfiSmmCpuProtocolGuid\r
-\r