(This is a replacement for commit
75136b29541b, "OvmfPkg/PlatformPei:
reorder the 32-bit PCI window vs. the PCIEXBAR on q35", 2019-05-16).
Commit
7b8fe63561b4 ("OvmfPkg: PlatformPei: enable PCIEXBAR (aka MMCONFIG
/ ECAM) on Q35", 2016-03-10) claimed that,
On Q35 machine types that QEMU intends to support in the long term, QEMU
never lets the RAM below 4 GB exceed 2 GB.
Alas, this statement came from a misunderstanding that occurred while we
worked out the interface contract. In fact QEMU does allow the 32-bit RAM
extend up to 0xB000_0000 (exclusive), in case the RAM size falls in the
range (0x8000_0000, 0xB000_0000) (i.e., the RAM size is greater than
2048MB and smaller than 2816MB).
In turn, such a RAM size (justifiedly) triggers
ASSERT (TopOfLowRam <= PciExBarBase);
in MemMapInitialization(), because we placed the 256MB PCIEXBAR at
0x8000_0000 (2GB) exactly, relying on the interface contract. (And, the
32-bit PCI window would follow the PCIEXBAR, covering the [0x9000_0000,
0xFC00_0000) range.)
In order to fix this, place the PCIEXBAR at 2816MB (0xB000_0000), and
start the 32-bit PCI window at 3 GB (0xC000_0000). This shrinks the 32-bit
PCI window to
0xFC00_0000 - 0xC000_0000 = 0x3C00_0000 = 960 MB.
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
# the PCIEXBAR register.\r
#\r
# On Q35 machine types that QEMU intends to support in the long term, QEMU\r
- # never lets the RAM below 4 GB exceed 2 GB.\r
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x80000000\r
+ # never lets the RAM below 4 GB exceed 2816 MB.\r
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000\r
\r
!ifdef $(SOURCE_DEBUG_ENABLE)\r
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2\r
# the PCIEXBAR register.\r
#\r
# On Q35 machine types that QEMU intends to support in the long term, QEMU\r
- # never lets the RAM below 4 GB exceed 2 GB.\r
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x80000000\r
+ # never lets the RAM below 4 GB exceed 2816 MB.\r
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000\r
\r
!ifdef $(SOURCE_DEBUG_ENABLE)\r
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2\r
# the PCIEXBAR register.\r
#\r
# On Q35 machine types that QEMU intends to support in the long term, QEMU\r
- # never lets the RAM below 4 GB exceed 2 GB.\r
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x80000000\r
+ # never lets the RAM below 4 GB exceed 2816 MB.\r
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000\r
\r
!ifdef $(SOURCE_DEBUG_ENABLE)\r
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2\r