ArmPkg/CpuDxe: Correct EFI_MEMORY_RO usage

Current Arm CpuDxe driver uses EFI_MEMORY_WP for write protection,
according to UEFI spec, we should use EFI_MEMORY_RO for write protection.
The EFI_MEMORY_WP is the cache attribute instead of memory attribute.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
index d8bb41978066334e8b88cd43b0df3051a9e717a2..15d5a81732334211a8e15ae957b826308187bbf4 100644 (file)
--- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
@@ -3,6 +3,7 @@
 Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>\r
 Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>\r
 Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>\r
 Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>\r
 Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>\r
 Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>\r

+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r

 \r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 \r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r


@@ -224,7 +225,7 @@ EfiAttributeToArmAttribute (
   ArmAttributes |= TT_AF;\r
 \r
   // Determine protection attributes\r
   ArmAttributes |= TT_AF;\r
 \r
   // Determine protection attributes\r

-  if (EfiAttributes & EFI_MEMORY_WP) {\r
+  if (EfiAttributes & EFI_MEMORY_RO) {\r

     ArmAttributes |= TT_AP_RO_RO;\r
   }\r
 \r
     ArmAttributes |= TT_AP_RO_RO;\r
   }\r
 \r

diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
index 14fc22d7a59fb1637aeca74305a9a28aa518a803..6dcfba69e8799f04d4f618359e9531c521305d93 100644 (file)
--- a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
@@ -3,6 +3,7 @@
 Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>\r
 Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>\r
 Portions copyright (c) 2013, ARM Ltd. All rights reserved.<BR>\r
 Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>\r
 Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>\r
 Portions copyright (c) 2013, ARM Ltd. All rights reserved.<BR>\r

+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r

 \r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 \r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r


@@ -62,7 +63,7 @@ SectionToGcdAttributes (
   // determine protection attributes\r
   switch(SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) {\r
     case TT_DESCRIPTOR_SECTION_AP_NO_NO: // no read, no write\r
   // determine protection attributes\r
   switch(SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) {\r
     case TT_DESCRIPTOR_SECTION_AP_NO_NO: // no read, no write\r

-      //*GcdAttributes |= EFI_MEMORY_WP | EFI_MEMORY_RP;\r
+      //*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;\r

       break;\r
 \r
     case TT_DESCRIPTOR_SECTION_AP_RW_NO:\r
       break;\r
 \r
     case TT_DESCRIPTOR_SECTION_AP_RW_NO:\r


@@ -73,7 +74,7 @@ SectionToGcdAttributes (
     // read only cases map to write-protect\r
     case TT_DESCRIPTOR_SECTION_AP_RO_NO:\r
     case TT_DESCRIPTOR_SECTION_AP_RO_RO:\r
     // read only cases map to write-protect\r
     case TT_DESCRIPTOR_SECTION_AP_RO_NO:\r
     case TT_DESCRIPTOR_SECTION_AP_RO_RO:\r

-      *GcdAttributes |= EFI_MEMORY_WP;\r
+      *GcdAttributes |= EFI_MEMORY_RO;\r

       break;\r
 \r
     default:\r
       break;\r
 \r
     default:\r


@@ -126,7 +127,7 @@ PageToGcdAttributes (
   // determine protection attributes\r
   switch(PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {\r
     case TT_DESCRIPTOR_PAGE_AP_NO_NO: // no read, no write\r
   // determine protection attributes\r
   switch(PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {\r
     case TT_DESCRIPTOR_PAGE_AP_NO_NO: // no read, no write\r

-      //*GcdAttributes |= EFI_MEMORY_WP | EFI_MEMORY_RP;\r
+      //*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;\r

       break;\r
 \r
     case TT_DESCRIPTOR_PAGE_AP_RW_NO:\r
       break;\r
 \r
     case TT_DESCRIPTOR_PAGE_AP_RW_NO:\r


@@ -137,7 +138,7 @@ PageToGcdAttributes (
     // read only cases map to write-protect\r
     case TT_DESCRIPTOR_PAGE_AP_RO_NO:\r
     case TT_DESCRIPTOR_PAGE_AP_RO_RO:\r
     // read only cases map to write-protect\r
     case TT_DESCRIPTOR_PAGE_AP_RO_NO:\r
     case TT_DESCRIPTOR_PAGE_AP_RO_RO:\r

-      *GcdAttributes |= EFI_MEMORY_WP;\r
+      *GcdAttributes |= EFI_MEMORY_RO;\r

       break;\r
 \r
     default:\r
       break;\r
 \r
     default:\r


@@ -730,9 +731,6 @@ EfiAttributeToArmAttribute (
       ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC; // TEX [2:0] = 001, C=1, B=1\r
       break;\r
 \r
       ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC; // TEX [2:0] = 001, C=1, B=1\r
       break;\r
 \r

-    case EFI_MEMORY_WP:\r
-    case EFI_MEMORY_XP:\r
-    case EFI_MEMORY_RP:\r

     case EFI_MEMORY_UCE:\r
     default:\r
       // Cannot be implemented UEFI definition unclear for ARM\r
     case EFI_MEMORY_UCE:\r
     default:\r
       // Cannot be implemented UEFI definition unclear for ARM\r


@@ -743,7 +741,7 @@ EfiAttributeToArmAttribute (
   }\r
 \r
   // Determine protection attributes\r
   }\r
 \r
   // Determine protection attributes\r

-  if (EfiAttributes & EFI_MEMORY_WP) {\r
+  if (EfiAttributes & EFI_MEMORY_RO) {\r

     ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RO_RO;\r
   } else {\r
     ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RW_RW;\r
     ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RO_RO;\r
   } else {\r
     ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RW_RW;\r

diff --git a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
index 723604d1df966ecb0db083e4c4f749443e10de60..54d9b016333107be81fa07c6fb01996bb0652c07 100644 (file)
--- a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
+++ b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
@@ -1,6 +1,7 @@
 /** @file\r
 *\r
 *  Copyright (c) 2013, ARM Limited. All rights reserved.\r
 /** @file\r
 *\r
 *  Copyright (c) 2013, ARM Limited. All rights reserved.\r

+*  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r

 *\r
 *  This program and the accompanying materials\r
 *  are licensed and made available under the terms and conditions of the BSD License\r
 *\r
 *  This program and the accompanying materials\r
 *  are licensed and made available under the terms and conditions of the BSD License\r


@@ -236,7 +237,7 @@ CpuConvertPagesToUncachedVirtualAddress (
   // be the PCI address. Code should always use the CPU address, and we will or in VirtualMask\r
   // to that address.\r
   //\r
   // be the PCI address. Code should always use the CPU address, and we will or in VirtualMask\r
   // to that address.\r
   //\r

-  Status = SetMemoryAttributes (Address, Length, EFI_MEMORY_WP, 0);\r
+  Status = SetMemoryAttributes (Address, Length, EFI_MEMORY_RO, 0);\r

   if (!EFI_ERROR (Status)) {\r
     Status = SetMemoryAttributes (Address | VirtualMask, Length, EFI_MEMORY_UC, VirtualMask);\r
   }\r
   if (!EFI_ERROR (Status)) {\r
     Status = SetMemoryAttributes (Address | VirtualMask, Length, EFI_MEMORY_UC, VirtualMask);\r
   }\r


@@ -264,7 +265,7 @@ CpuReconvertPages (
   //\r
   // Unmap the aliased Address\r
   //\r
   //\r
   // Unmap the aliased Address\r
   //\r

-  Status = SetMemoryAttributes (Address | VirtualMask, Length, EFI_MEMORY_WP, 0);\r
+  Status = SetMemoryAttributes (Address | VirtualMask, Length, EFI_MEMORY_RO, 0);\r

   if (!EFI_ERROR (Status)) {\r
     //\r
     // Restore atttributes\r
   if (!EFI_ERROR (Status)) {\r
     //\r
     // Restore atttributes\r

diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
index 540069a59b2e470e255dc20de774ae9d8d5fded4..6aa970bc0514e6a73f4aee08a4885980f6a90d7d 100644 (file)
--- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
+++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
@@ -3,6 +3,7 @@
 *\r
 *  Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
 *  Copyright (c) 2016, Linaro Limited. All rights reserved.\r
 *\r
 *  Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
 *  Copyright (c) 2016, Linaro Limited. All rights reserved.\r

+*  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r

 *\r
 *  This program and the accompanying materials\r
 *  are licensed and made available under the terms and conditions of the BSD License\r
 *\r
 *  This program and the accompanying materials\r
 *  are licensed and made available under the terms and conditions of the BSD License\r


@@ -89,7 +90,7 @@ PageAttributeToGcdAttribute (
   // Determine protection attributes\r
   if (((PageAttributes & TT_AP_MASK) == TT_AP_NO_RO) || ((PageAttributes & TT_AP_MASK) == TT_AP_RO_RO)) {\r
     // Read only cases map to write-protect\r
   // Determine protection attributes\r
   if (((PageAttributes & TT_AP_MASK) == TT_AP_NO_RO) || ((PageAttributes & TT_AP_MASK) == TT_AP_RO_RO)) {\r
     // Read only cases map to write-protect\r

-    GcdAttributes |= EFI_MEMORY_WP;\r
+    GcdAttributes |= EFI_MEMORY_RO;\r

   }\r
 \r
   // Process eXecute Never attribute\r
   }\r
 \r
   // Process eXecute Never attribute\r