UefiCpuPkg/ResetVector:Add Option to reserve 4K region at 4GB

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4140

Some implementations may need to keep the initial Reset code to be
separated out from rest of the code.This request is to add padding at
lower 4K region below 4 GB which will result having only few jmp
instructions and data at that region.

Reviewed-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Duggapu Chinni B <chinni.b.duggapu@intel.com>

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm
index 7538192876c8dedc9fa9f647750c128d48f40f1c..fe5bbea8033aa419f6e9fd1b7c57abcd9aff2d18 100644 (file)
--- a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm
+++ b/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm
@@ -21,7 +21,15 @@ ALIGN   16
 ; located just below 0x100000000 (4GB) in the firmware device.\r
 ;\r
 %ifdef ALIGN_TOP_TO_4K_FOR_PAGING\r
-    TIMES (0x1000 - ($ - EndOfPageTables) - 0x20) DB 0\r
+    TIMES (0x1000 - ($ - EndOfPageTables)) DB 0\r
+;\r
+; Pad the VTF0 Reset code for Bsp & Ap to 4k aligned block.\r
+; Some implementations may need to keep the initial Reset code\r
+; to be separated out from rest of the code.\r
+; This padding will make sure lower 4K region below 4 GB may\r
+; only contains few jmp instructions and data.\r
+;\r
+    TIMES (0x1000 - 0x20) DB 0\r
 %endif\r
 \r
 applicationProcessorEntryPoint:\r