IntelFspPkg: correct comments and rename a label

Corrects a word typo and a comment error.
Rename a label to match its function name.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Yao Jiewen <Jiewen.Yao@intel.com>
Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17553 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
index d0e56b2360b9e21013e0790511b27e3021ca8070..71e3e5a1e2e92e73c3d8eb70da125ee78ed4a087 100644 (file)
--- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
+++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
@@ -368,15 +368,15 @@ TempRamInitApi   PROC    NEAR    PUBLIC
   mov       eax, dword ptr [esp + 4]\r
   cmp       eax, 0\r
   mov       eax, 80000002h\r
-  jz        NemInitExit\r
+  jz        TempRamInitExit\r
 \r
   ;\r
   ; Sec Platform Init\r
   ;\r
   CALL_MMX  SecPlatformInit\r
   cmp       eax, 0\r
-  jnz       NemInitExit\r
-  \r
+  jnz       TempRamInitExit\r
+\r
   ; Load microcode\r
   LOAD_ESP\r
   CALL_MMX  LoadMicrocode\r
@@ -387,14 +387,14 @@ TempRamInitApi   PROC    NEAR    PUBLIC
   LOAD_ESP\r
   CALL_MMX  SecCarInit\r
   cmp       eax, 0\r
-  jnz       NemInitExit\r
+  jnz       TempRamInitExit\r
 \r
   LOAD_ESP\r
   CALL_MMX  EstablishStackFsp\r
 \r
   LXMMN      xmm6, eax, 3  ;Restore microcode status if no CAR init error from ECX-SLOT 3 in xmm6.\r
 \r
-NemInitExit:\r
+TempRamInitExit:\r
   ;\r
   ; Load EBP, EBX, ESI, EDI & ESP from XMM7 & XMM6\r
   ;\r

diff --git a/IntelFspPkg/FspSecCore/SecMain.c b/IntelFspPkg/FspSecCore/SecMain.c
index 63376e9b6ed9e053a87af6de72913a8d6f3c411c..99acefaefa20cb8dc2a258e77da9a41748d047a4 100644 (file)
--- a/IntelFspPkg/FspSecCore/SecMain.c
+++ b/IntelFspPkg/FspSecCore/SecMain.c
@@ -104,7 +104,7 @@ SecStartup (
   AsmWriteIdtr (&IdtDescriptor);\r
 \r
   //\r
-  // Iniitalize the global FSP data region\r
+  // Initialize the global FSP data region\r
   //\r
   FspGlobalDataInit (&PeiFspData, BootLoaderStack, (UINT8)ApiIdx);\r
 \r

diff --git a/IntelFspPkg/Library/BaseCacheLib/CacheLib.c b/IntelFspPkg/Library/BaseCacheLib/CacheLib.c
index 1a089185974f6d7811a6f7a273394cbb55eeeba9..b38dce32a8fff85ffd7e57118fc670b8ebb94ac5 100644 (file)
--- a/IntelFspPkg/Library/BaseCacheLib/CacheLib.c
+++ b/IntelFspPkg/Library/BaseCacheLib/CacheLib.c
@@ -45,7 +45,7 @@ SearchForExactMtrr (
   @param[in] MemoryCacheType  input cache type to be checked.\r
 \r
   @retval TRUE MemoryCacheType is default MTRR setting.\r
-  @retval TRUE MemoryCacheType is NOT default MTRR setting.\r
+  @retval FALSE MemoryCacheType is NOT default MTRR setting.\r
 **/\r
 BOOLEAN\r
 IsDefaultType (\r