Add AsmEnableCache() and AsmDisableCache() as the IA32 & x64 specific BaseLib API.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6807 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index 4ffddfd5f695e16754364334ede8512c91fe6f2f..3cb2cdb154e53aae685c2505b296fd8534e66ef8 100644 (file)
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -5212,6 +5212,34 @@ AsmCpuidEx (
   );\r
 \r
 \r
+/**\r
+  Set CD bit and clear NW bit of CR0 followed by a WBINVD.\r
+\r
+  Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,\r
+  and executing a WBINVD instruction.  This function is only available on IA-32 and x64.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmDisableCache (\r
+  VOID\r
+  );\r
+\r
+\r
+/**\r
+  Perform a WBINVD and clear both the CD and NW bits of CR0.\r
+\r
+  Enables the caches by executing a WBINVD instruction and then clear both the CD and NW\r
+  bits of CR0 to 0.  This function is only available on IA-32 and x64.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmEnableCache (\r
+  VOID\r
+  );\r
+\r
+\r
 /**\r
   Returns the lower 32-bits of a Machine Specific Register(MSR).\r
 \r

diff --git a/MdePkg/Library/BaseLib/Ia32/DisableCache.c b/MdePkg/Library/BaseLib/Ia32/DisableCache.c
index d2d028a93d0dc0a03bfe75a01be67b34428a1767..4ee3b88fdc231c027a43c7b6c38e6f6d450fe0c3 100644 (file)
--- a/MdePkg/Library/BaseLib/Ia32/DisableCache.c
+++ b/MdePkg/Library/BaseLib/Ia32/DisableCache.c
@@ -13,10 +13,10 @@
 **/\r
 \r
 /**\r
-  Disables caches.\r
+  Set CD bit and clear NW bit of CR0 followed by a WBINVD.\r
 \r
-  Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a\r
-  WBINVD instruction.\r
+  Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,\r
+  and executing a WBINVD instruction.  This function is only available on IA-32 and x64.\r
 \r
 **/\r
 VOID\r

diff --git a/MdePkg/Library/BaseLib/Ia32/EnableCache.c b/MdePkg/Library/BaseLib/Ia32/EnableCache.c
index 59e2b43213b94ac2b9cb67ae4077b04d7c2e6d84..dab89039f0d58ac63fc664c644cf8887ca1f53d3 100644 (file)
--- a/MdePkg/Library/BaseLib/Ia32/EnableCache.c
+++ b/MdePkg/Library/BaseLib/Ia32/EnableCache.c
@@ -13,10 +13,10 @@
 **/\r
 \r
 /**\r
-  Enabled caches.\r
+  Perform a WBINVD and clear both the CD and NW bits of CR0.\r
 \r
-  Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear \r
-  the NW bit of CR0 to 0\r
+  Enables the caches by executing a WBINVD instruction and then clear both the CD and NW\r
+  bits of CR0 to 0.  This function is only available on IA-32 and x64.\r
 \r
 **/\r
 VOID\r