Move the internal PL061 GPIO header file into the driver directory.
It shouldn't be referenced directly by other modules anyway.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
#include <Library/UefiRuntimeServicesTableLib.h>\r
\r
#include <Protocol/EmbeddedGpio.h>\r
-#include <Drivers/PL061Gpio.h>\r
+\r
+#include "PL061Gpio.h"\r
\r
PLATFORM_GPIO_CONTROLLER *mPL061PlatformGpio;\r
\r
--- /dev/null
+/** @file\r
+*\r
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+*\r
+* This program and the accompanying materials\r
+* are licensed and made available under the terms and conditions of the BSD License\r
+* which accompanies this distribution. The full text of the license may be found at\r
+* http://opensource.org/licenses/bsd-license.php\r
+*\r
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+*\r
+**/\r
+\r
+\r
+#ifndef __PL061_GPIO_H__\r
+#define __PL061_GPIO_H__\r
+\r
+#include <Protocol/EmbeddedGpio.h>\r
+\r
+// PL061 GPIO Registers\r
+#define PL061_GPIO_DATA_REG_OFFSET ((UINTN) 0x000)\r
+#define PL061_GPIO_DATA_REG 0x000\r
+#define PL061_GPIO_DIR_REG 0x400\r
+#define PL061_GPIO_IS_REG 0x404\r
+#define PL061_GPIO_IBE_REG 0x408\r
+#define PL061_GPIO_IEV_REG 0x40C\r
+#define PL061_GPIO_IE_REG 0x410\r
+#define PL061_GPIO_RIS_REG 0x414\r
+#define PL061_GPIO_MIS_REG 0x410\r
+#define PL061_GPIO_IC_REG 0x41C\r
+#define PL061_GPIO_AFSEL_REG 0x420\r
+\r
+#define PL061_GPIO_PERIPH_ID0 0xFE0\r
+#define PL061_GPIO_PERIPH_ID1 0xFE4\r
+#define PL061_GPIO_PERIPH_ID2 0xFE8\r
+#define PL061_GPIO_PERIPH_ID3 0xFEC\r
+\r
+#define PL061_GPIO_PCELL_ID0 0xFF0\r
+#define PL061_GPIO_PCELL_ID1 0xFF4\r
+#define PL061_GPIO_PCELL_ID2 0xFF8\r
+#define PL061_GPIO_PCELL_ID3 0xFFC\r
+\r
+#define PL061_GPIO_PINS 8\r
+\r
+// All bits low except one bit high, native bit length\r
+#define GPIO_PIN_MASK(Pin) (1UL << ((UINTN)(Pin)))\r
+\r
+#endif // __PL061_GPIO_H__\r
+++ /dev/null
-/** @file\r
-*\r
-* Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
-*\r
-* This program and the accompanying materials\r
-* are licensed and made available under the terms and conditions of the BSD License\r
-* which accompanies this distribution. The full text of the license may be found at\r
-* http://opensource.org/licenses/bsd-license.php\r
-*\r
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-*\r
-**/\r
-\r
-\r
-#ifndef __PL061_GPIO_H__\r
-#define __PL061_GPIO_H__\r
-\r
-#include <Protocol/EmbeddedGpio.h>\r
-\r
-// PL061 GPIO Registers\r
-#define PL061_GPIO_DATA_REG_OFFSET ((UINTN) 0x000)\r
-#define PL061_GPIO_DATA_REG 0x000\r
-#define PL061_GPIO_DIR_REG 0x400\r
-#define PL061_GPIO_IS_REG 0x404\r
-#define PL061_GPIO_IBE_REG 0x408\r
-#define PL061_GPIO_IEV_REG 0x40C\r
-#define PL061_GPIO_IE_REG 0x410\r
-#define PL061_GPIO_RIS_REG 0x414\r
-#define PL061_GPIO_MIS_REG 0x410\r
-#define PL061_GPIO_IC_REG 0x41C\r
-#define PL061_GPIO_AFSEL_REG 0x420\r
-\r
-#define PL061_GPIO_PERIPH_ID0 0xFE0\r
-#define PL061_GPIO_PERIPH_ID1 0xFE4\r
-#define PL061_GPIO_PERIPH_ID2 0xFE8\r
-#define PL061_GPIO_PERIPH_ID3 0xFEC\r
-\r
-#define PL061_GPIO_PCELL_ID0 0xFF0\r
-#define PL061_GPIO_PCELL_ID1 0xFF4\r
-#define PL061_GPIO_PCELL_ID2 0xFF8\r
-#define PL061_GPIO_PCELL_ID3 0xFFC\r
-\r
-#define PL061_GPIO_PINS 8\r
-\r
-// All bits low except one bit high, native bit length\r
-#define GPIO_PIN_MASK(Pin) (1UL << ((UINTN)(Pin)))\r
-\r
-#endif // __PL061_GPIO_H__\r