]> git.proxmox.com Git - mirror_edk2.git/commitdiff
MdePkg BaseLib: Convert Ia32/LRotU64.asm to NASM
authorJordan Justen <jordan.l.justen@intel.com>
Tue, 31 May 2016 01:51:58 +0000 (18:51 -0700)
committerLiming Gao <liming.gao@intel.com>
Tue, 28 Jun 2016 01:49:13 +0000 (09:49 +0800)
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/LRotU64.asm to Ia32/LRotU64.nasm

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
MdePkg/Library/BaseLib/BaseLib.inf
MdePkg/Library/BaseLib/Ia32/LRotU64.nasm [new file with mode: 0644]

index 8838b9dc469d3a29ebf078e77a1dc3e7025da551..35d61cc5d844c0c4ccd3fa30eb2c6e139499361b 100644 (file)
   Ia32/MultU64x32.asm | INTEL \r
   Ia32/LShiftU64.nasm| INTEL\r
   Ia32/LShiftU64.asm | INTEL \r
+  Ia32/LRotU64.nasm| INTEL\r
   Ia32/LRotU64.asm | INTEL \r
   Ia32/LongJump.asm | INTEL \r
   Ia32/Invd.asm | INTEL \r
   Ia32/MultU64x32.S | GCC \r
   Ia32/RRotU64.nasm| GCC\r
   Ia32/RRotU64.S | GCC \r
+  Ia32/LRotU64.nasm| GCC\r
   Ia32/LRotU64.S | GCC \r
   Ia32/ARShiftU64.S | GCC \r
   Ia32/RShiftU64.nasm| GCC\r
diff --git a/MdePkg/Library/BaseLib/Ia32/LRotU64.nasm b/MdePkg/Library/BaseLib/Ia32/LRotU64.nasm
new file mode 100644 (file)
index 0000000..f0d53db
--- /dev/null
@@ -0,0 +1,50 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   LRotU64.nasm\r
+;\r
+; Abstract:\r
+;\r
+;   64-bit left rotation for Ia32\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    SECTION .text\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; InternalMathLRotU64 (\r
+;   IN      UINT64                    Operand,\r
+;   IN      UINTN                     Count\r
+;   );\r
+;------------------------------------------------------------------------------\r
+global ASM_PFX(InternalMathLRotU64)\r
+ASM_PFX(InternalMathLRotU64):\r
+    push    ebx\r
+    mov     cl, [esp + 16]\r
+    mov     edx, [esp + 12]\r
+    mov     eax, [esp + 8]\r
+    shld    ebx, edx, cl\r
+    shld    edx, eax, cl\r
+    ror     ebx, cl\r
+    shld    eax, ebx, cl\r
+    test    cl, 32                      ; Count >= 32?\r
+    jz      .0\r
+    mov     ecx, eax\r
+    mov     eax, edx\r
+    mov     edx, ecx\r
+.0:\r
+    pop     ebx\r
+    ret\r
+\r