UefiCpuPkg/CpuDxe: clean up PAGE_TABLE_LIB_PAGING_CONTEXT usage.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1039

Current implementation not checks system mode before using
PAGE_TABLE_LIB_PAGING_CONTEXT.ContextData.X64 or
PAGE_TABLE_LIB_PAGING_CONTEXT.ContextData.Ia32. This patch check the
mode before using the correct one.

Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf
index 57381dbc8588d1e52c1f679a9617f7d15380f303..d87fe503d152f294c2a287d85dd4001b3680f0c3 100644 (file)
--- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
@@ -1,7 +1,7 @@
 ## @file\r
 #  CPU driver installs CPU Architecture Protocol and CPU MP protocol.\r
 #\r
-#  Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>\r
+#  Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>\r
 #  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
 #\r
 #  SPDX-License-Identifier: BSD-2-Clause-Patent\r
@@ -54,9 +54,11 @@
 \r
 [Sources.IA32]\r
   Ia32/CpuAsm.nasm\r
+  Ia32/PagingAttribute.c\r
 \r
 [Sources.X64]\r
   X64/CpuAsm.nasm\r
+  X64/PagingAttribute.c\r
 \r
 [Protocols]\r
   gEfiCpuArchProtocolGuid                       ## PRODUCES\r

diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTable.c
index ec5cd424fca2e979842e578040a32e4c6577bf94..cb121771425ac147d9433441c8e7471d37579a78 100644 (file)
--- a/UefiCpuPkg/CpuDxe/CpuPageTable.c
+++ b/UefiCpuPkg/CpuDxe/CpuPageTable.c
@@ -155,6 +155,8 @@ GetCurrentPagingContext (
   MSR_IA32_EFER_REGISTER          MsrEfer;\r
   IA32_CR4                        Cr4;\r
   IA32_CR0                        Cr0;\r
+  UINT32                          *Attributes;\r
+  UINTN                           *PageTableBase;\r
 \r
   //\r
   // Don't retrieve current paging context from processor if in SMM mode.\r
@@ -167,25 +169,27 @@ GetCurrentPagingContext (
       mPagingContext.MachineType = IMAGE_FILE_MACHINE_I386;\r
     }\r
 \r
+    GetPagingDetails (&mPagingContext.ContextData, &PageTableBase, &Attributes);\r
+\r
     Cr0.UintN = AsmReadCr0 ();\r
     Cr4.UintN = AsmReadCr4 ();\r
 \r
     if (Cr0.Bits.PG != 0) {\r
-      mPagingContext.ContextData.X64.PageTableBase = (AsmReadCr3 () & PAGING_4K_ADDRESS_MASK_64);\r
+      *PageTableBase = (AsmReadCr3 () & PAGING_4K_ADDRESS_MASK_64);\r
     } else {\r
-      mPagingContext.ContextData.X64.PageTableBase = 0;\r
+      *PageTableBase = 0;\r
     }\r
     if (Cr0.Bits.WP  != 0) {\r
-      mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_WP_ENABLE;\r
+      *Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_WP_ENABLE;\r
     }\r
     if (Cr4.Bits.PSE != 0) {\r
-      mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PSE;\r
+      *Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PSE;\r
     }\r
     if (Cr4.Bits.PAE != 0) {\r
-      mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE;\r
+      *Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE;\r
     }\r
     if (Cr4.Bits.LA57 != 0) {\r
-      mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_5_LEVEL;\r
+      *Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_5_LEVEL;\r
     }\r
 \r
     AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);\r
@@ -197,12 +201,12 @@ GetCurrentPagingContext (
         MsrEfer.Uint64 = AsmReadMsr64(MSR_CORE_IA32_EFER);\r
         if (MsrEfer.Bits.NXE != 0) {\r
           // XD activated\r
-          mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;\r
+          *Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;\r
         }\r
       }\r
 \r
       if (RegEdx.Bits.Page1GB != 0) {\r
-        mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAGE_1G_SUPPORT;\r
+        *Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAGE_1G_SUPPORT;\r
       }\r
     }\r
   }\r
@@ -395,6 +399,7 @@ ConvertPageEntryAttribute (
 {\r
   UINT64  CurrentPageEntry;\r
   UINT64  NewPageEntry;\r
+  UINT32  *PageAttributes;\r
 \r
   CurrentPageEntry = *PageEntry;\r
   NewPageEntry = CurrentPageEntry;\r
@@ -438,7 +443,10 @@ ConvertPageEntryAttribute (
       break;\r
     }\r
   }\r
-  if ((PagingContext->ContextData.Ia32.Attributes & PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED) != 0) {\r
+\r
+  GetPagingDetails (&PagingContext->ContextData, NULL, &PageAttributes);\r
+\r
+  if ((*PageAttributes & PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED) != 0) {\r
     if ((Attributes & EFI_MEMORY_XP) != 0) {\r
       switch (PageAction) {\r
       case PageActionAssign:\r
@@ -1338,15 +1346,18 @@ InitializePageTableLib (
   )\r
 {\r
   PAGE_TABLE_LIB_PAGING_CONTEXT     CurrentPagingContext;\r
+  UINT32                            *Attributes;\r
+  UINTN                             *PageTableBase;\r
 \r
   GetCurrentPagingContext (&CurrentPagingContext);\r
 \r
+  GetPagingDetails (&CurrentPagingContext.ContextData, &PageTableBase, &Attributes);\r
+\r
   //\r
   // Reserve memory of page tables for future uses, if paging is enabled.\r
   //\r
-  if (CurrentPagingContext.ContextData.X64.PageTableBase != 0 &&\r
-      (CurrentPagingContext.ContextData.Ia32.Attributes &\r
-       PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE) != 0) {\r
+  if ((*PageTableBase != 0) &&\r
+      (*Attributes & PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE) != 0) {\r
     DisableReadOnlyPageWriteProtect ();\r
     InitializePageTablePool (1);\r
     EnableReadOnlyPageWriteProtect ();\r
@@ -1361,10 +1372,10 @@ InitializePageTableLib (
     ASSERT (mLastPFEntryPointer != NULL);\r
   }\r
 \r
-  DEBUG ((DEBUG_INFO, "CurrentPagingContext:\n", CurrentPagingContext.MachineType));\r
+  DEBUG ((DEBUG_INFO, "CurrentPagingContext:\n"));\r
   DEBUG ((DEBUG_INFO, "  MachineType   - 0x%x\n", CurrentPagingContext.MachineType));\r
-  DEBUG ((DEBUG_INFO, "  PageTableBase - 0x%x\n", CurrentPagingContext.ContextData.X64.PageTableBase));\r
-  DEBUG ((DEBUG_INFO, "  Attributes    - 0x%x\n", CurrentPagingContext.ContextData.X64.Attributes));\r
+  DEBUG ((DEBUG_INFO, "  PageTableBase - 0x%Lx\n", (UINT64)*PageTableBase));\r
+  DEBUG ((DEBUG_INFO, "  Attributes    - 0x%x\n", *Attributes));\r
 \r
   return ;\r
 }\r

diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.h b/UefiCpuPkg/CpuDxe/CpuPageTable.h
index f845956f73c5b8500b0d3b763f5c9e38ab32e05e..bad6784bcb51caae35dd188375c2f8af51b45492 100644 (file)
--- a/UefiCpuPkg/CpuDxe/CpuPageTable.h
+++ b/UefiCpuPkg/CpuDxe/CpuPageTable.h
@@ -139,4 +139,19 @@ AllocatePageTableMemory (
   IN UINTN           Pages\r
   );\r
 \r
+/**\r
+  Get paging details.\r
+\r
+  @param  PagingContextData      The paging context.\r
+  @param  PageTableBase          Return PageTableBase field.\r
+  @param  Attributes             Return Attributes field.\r
+\r
+**/\r
+VOID\r
+GetPagingDetails (\r
+  IN  PAGE_TABLE_LIB_PAGING_CONTEXT_DATA *PagingContextData,\r
+  OUT UINTN                              **PageTableBase     OPTIONAL,\r
+  OUT UINT32                             **Attributes        OPTIONAL\r
+  );\r
+\r
 #endif\r

diff --git a/UefiCpuPkg/CpuDxe/Ia32/PagingAttribute.c b/UefiCpuPkg/CpuDxe/Ia32/PagingAttribute.c
new file mode 100644 (file)
index 0000000..3325a42
--- /dev/null
+++ b/UefiCpuPkg/CpuDxe/Ia32/PagingAttribute.c
@@ -0,0 +1,34 @@
+/** @file\r
+  Return Paging attribute.\r
+\r
+  Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#include "CpuPageTable.h"\r
+\r
+\r
+/**\r
+  Get paging details.\r
+\r
+  @param  PagingContextData      The paging context.\r
+  @param  PageTableBase          Return PageTableBase field.\r
+  @param  Attributes             Return Attributes field.\r
+\r
+**/\r
+VOID\r
+GetPagingDetails (\r
+  IN  PAGE_TABLE_LIB_PAGING_CONTEXT_DATA *PagingContextData,\r
+  OUT UINTN                              **PageTableBase     OPTIONAL,\r
+  OUT UINT32                             **Attributes        OPTIONAL\r
+  )\r
+{\r
+  if (PageTableBase != NULL) {\r
+    *PageTableBase = &PagingContextData->Ia32.PageTableBase;\r
+  }\r
+  if (Attributes != NULL) {\r
+    *Attributes = &PagingContextData->Ia32.Attributes;\r
+  }\r
+}\r
+\r

diff --git a/UefiCpuPkg/CpuDxe/X64/PagingAttribute.c b/UefiCpuPkg/CpuDxe/X64/PagingAttribute.c
new file mode 100644 (file)
index 0000000..7967935
--- /dev/null
+++ b/UefiCpuPkg/CpuDxe/X64/PagingAttribute.c
@@ -0,0 +1,34 @@
+/** @file\r
+  Return Paging attribute.\r
+\r
+  Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#include "CpuPageTable.h"\r
+\r
+\r
+/**\r
+  Get paging details.\r
+\r
+  @param  PagingContextData      The paging context.\r
+  @param  PageTableBase          Return PageTableBase field.\r
+  @param  Attributes             Return Attributes field.\r
+\r
+**/\r
+VOID\r
+GetPagingDetails (\r
+  IN  PAGE_TABLE_LIB_PAGING_CONTEXT_DATA *PagingContextData,\r
+  OUT UINTN                              **PageTableBase     OPTIONAL,\r
+  OUT UINT32                             **Attributes        OPTIONAL\r
+  )\r
+{\r
+  if (PageTableBase != NULL) {\r
+    *PageTableBase = &PagingContextData->X64.PageTableBase;\r
+  }\r
+  if (Attributes != NULL) {\r
+    *Attributes = &PagingContextData->X64.Attributes;\r
+  }\r
+}\r
+\r