ArmPlatformPkg/ArmVExpress-FVP-AArch64: Fixed number of cores and cluster for Base...

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15430 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.dsc b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.dsc
index dce5a389acb4abdea6e3d7c4d23035000540b7c1..4bab6d62f0dde25781f768cac66feba221b132b3 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.dsc
+++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.dsc
@@ -1,5 +1,5 @@
 #\r
-#  Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
+#  Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
 #\r
 #  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
@@ -80,8 +80,14 @@
   gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Fixed Virtual Platform"\r
   gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ARM-FVP"\r
 \r
+!ifndef ARM_FOUNDATION_FVP\r
   # Up to 8 cores on Base models. This works fine if model happens to have less.\r
   gArmPlatformTokenSpaceGuid.PcdCoreCount|8\r
+  gArmPlatformTokenSpaceGuid.PcdClusterCount|2\r
+!else\r
+  # Up to 4 cores on Foundation models. This works fine if model happens to have less.\r
+  gArmPlatformTokenSpaceGuid.PcdCoreCount|4\r
+!endif\r
 \r
   #\r
   # NV Storage PCDs. Use base of 0x0C000000 for NOR1\r