OvmfPkg/PlatformPei: honor extended TSEG in PcdQ35TsegMbytes if available

Recognize an extended TSEG when available in
Q35TsegMbytesInitialization(), and set both PcdQ35TsegMbytes (for
OvmfPkg/SmmAccess) and "mQ35TsegMbytes" (for PlatformPei's own use)
accordingly. The new logic interfaces with the QEMU feature added in QEMU
commit 2f295167e0c4 ("q35/mch: implement extended TSEG sizes",
2017-06-08).

At this point we have to explicitly restrict Q35TsegMbytesInitialization()
to the Q35 board, but that's OK, because Q35TsegMbytesInitialization() is
only called when PcdSmmSmramRequire is set, and for that Q35 is already an
enforced requirement.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Suggested-by: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index 886d236226650ebfaf2aba09879b6ba948d4c1d8..97f3fa5afcf5178585c89127336fad50d3576799 100644 (file)
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -19,16 +19,19 @@ Module Name:
 //\r
 // The package level header files this module uses\r
 //\r
+#include <IndustryStandard/Q35MchIch9.h>\r
 #include <PiPei.h>\r
 \r
 //\r
 // The Library classes this module consumes\r
 //\r
+#include <Library/BaseLib.h>\r
 #include <Library/BaseMemoryLib.h>\r
 #include <Library/DebugLib.h>\r
 #include <Library/HobLib.h>\r
 #include <Library/IoLib.h>\r
 #include <Library/PcdLib.h>\r
+#include <Library/PciLib.h>\r
 #include <Library/PeimEntryPoint.h>\r
 #include <Library/ResourcePublicationLib.h>\r
 #include <Library/MtrrLib.h>\r
@@ -49,7 +52,54 @@ Q35TsegMbytesInitialization (
   VOID\r
   )\r
 {\r
-  mQ35TsegMbytes = PcdGet16 (PcdQ35TsegMbytes);\r
+  UINT16        ExtendedTsegMbytes;\r
+  RETURN_STATUS PcdStatus;\r
+\r
+  if (mHostBridgeDevId != INTEL_Q35_MCH_DEVICE_ID) {\r
+    DEBUG ((\r
+      DEBUG_ERROR,\r
+      "%a: no TSEG (SMRAM) on host bridge DID=0x%04x; "\r
+      "only DID=0x%04x (Q35) is supported\n",\r
+      __FUNCTION__,\r
+      mHostBridgeDevId,\r
+      INTEL_Q35_MCH_DEVICE_ID\r
+      ));\r
+    ASSERT (FALSE);\r
+    CpuDeadLoop ();\r
+  }\r
+\r
+  //\r
+  // Check if QEMU offers an extended TSEG.\r
+  //\r
+  // This can be seen from writing MCH_EXT_TSEG_MB_QUERY to the MCH_EXT_TSEG_MB\r
+  // register, and reading back the register.\r
+  //\r
+  // On a QEMU machine type that does not offer an extended TSEG, the initial\r
+  // write overwrites whatever value a malicious guest OS may have placed in\r
+  // the (unimplemented) register, before entering S3 or rebooting.\r
+  // Subsequently, the read returns MCH_EXT_TSEG_MB_QUERY unchanged.\r
+  //\r
+  // On a QEMU machine type that offers an extended TSEG, the initial write\r
+  // triggers an update to the register. Subsequently, the value read back\r
+  // (which is guaranteed to differ from MCH_EXT_TSEG_MB_QUERY) tells us the\r
+  // number of megabytes.\r
+  //\r
+  PciWrite16 (DRAMC_REGISTER_Q35 (MCH_EXT_TSEG_MB), MCH_EXT_TSEG_MB_QUERY);\r
+  ExtendedTsegMbytes = PciRead16 (DRAMC_REGISTER_Q35 (MCH_EXT_TSEG_MB));\r
+  if (ExtendedTsegMbytes == MCH_EXT_TSEG_MB_QUERY) {\r
+    mQ35TsegMbytes = PcdGet16 (PcdQ35TsegMbytes);\r
+    return;\r
+  }\r
+\r
+  DEBUG ((\r
+    DEBUG_INFO,\r
+    "%a: QEMU offers an extended TSEG (%d MB)\n",\r
+    __FUNCTION__,\r
+    ExtendedTsegMbytes\r
+    ));\r
+  PcdStatus = PcdSet16S (PcdQ35TsegMbytes, ExtendedTsegMbytes);\r
+  ASSERT_RETURN_ERROR (PcdStatus);\r
+  mQ35TsegMbytes = ExtendedTsegMbytes;\r
 }\r
 \r
 \r

diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index b8a28450d6c54ab39356c04fdb6c24d2bde21ba8..98cfaaa28ed149086a57d7e144a790c059e55e6b 100644 (file)
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -645,6 +645,11 @@ InitializePlatform (
   AddressWidthInitialization ();\r
   MaxCpuCountInitialization ();\r
 \r
+  //\r
+  // Query Host Bridge DID\r
+  //\r
+  mHostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);\r
+\r
   if (FeaturePcdGet (PcdSmmSmramRequire)) {\r
     Q35TsegMbytesInitialization ();\r
   }\r
@@ -658,11 +663,6 @@ InitializePlatform (
     InitializeXen ();\r
   }\r
 \r
-  //\r
-  // Query Host Bridge DID\r
-  //\r
-  mHostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);\r
-\r
   if (mBootMode != BOOT_ON_S3_RESUME) {\r
     if (!FeaturePcdGet (PcdSmmSmramRequire)) {\r
       ReserveEmuVariableNvStore ();\r

diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h
index d2d627b221c44178006d1162512a4cc3c29f8611..ae855531c1b7adfa69b9851e187d010c6e1db41e 100644 (file)
--- a/OvmfPkg/PlatformPei/Platform.h
+++ b/OvmfPkg/PlatformPei/Platform.h
@@ -108,4 +108,6 @@ extern UINT8 mPhysMemAddressWidth;
 \r
 extern UINT32 mMaxCpuCount;\r
 \r
+extern UINT16 mHostBridgeDevId;\r
+\r
 #endif // _PLATFORM_PEI_H_INCLUDED_\r