UefiCpuPkg: Rollback field name changes

Roll back commit 56649f43013703e95f54c293d708152b765cc49b.
The original names follows the spec definition.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
index 4e89b0470ff58937ea549574103caf31afa0db2f..6ac8549839cebb2f7f0a8e4cfd36ceb92d932bfd 100644 (file)
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
@@ -216,7 +216,7 @@ ArchSetupExcpetionStack (
   TssDesc->Bits.BaseLow    = (UINT16)TssBase;\r
   TssDesc->Bits.BaseMid    = (UINT8)(TssBase >> 16);\r
   TssDesc->Bits.Type       = IA32_GDT_TYPE_TSS;\r
-  TssDesc->Bits.Present    = 1;\r
+  TssDesc->Bits.P          = 1;\r
   TssDesc->Bits.LimitHigh  = 0;\r
   TssDesc->Bits.BaseHigh   = (UINT8)(TssBase >> 24);\r
 \r
@@ -240,7 +240,7 @@ ArchSetupExcpetionStack (
     TssDesc->Bits.BaseLow   = (UINT16)TssBase;\r
     TssDesc->Bits.BaseMid   = (UINT8)(TssBase >> 16);\r
     TssDesc->Bits.Type      = IA32_GDT_TYPE_TSS;\r
-    TssDesc->Bits.Present   = 1;\r
+    TssDesc->Bits.P         = 1;\r
     TssDesc->Bits.LimitHigh = 0;\r
     TssDesc->Bits.BaseHigh  = (UINT8)(TssBase >> 24);\r
 \r
@@ -253,17 +253,17 @@ ArchSetupExcpetionStack (
       continue;\r
     }\r
 \r
-    Tss->Eip    = (UINT32)(TemplateMap.ExceptionStart\r
+    Tss->EIP    = (UINT32)(TemplateMap.ExceptionStart\r
                            + Vector * TemplateMap.ExceptionStubHeaderSize);\r
-    Tss->Eflags = 0x2;\r
-    Tss->Esp    = StackTop;\r
-    Tss->Cr3    = AsmReadCr3 ();\r
-    Tss->Es     = AsmReadEs ();\r
-    Tss->Cs     = AsmReadCs ();\r
-    Tss->Ss     = AsmReadSs ();\r
-    Tss->Ds     = AsmReadDs ();\r
-    Tss->Fs     = AsmReadFs ();\r
-    Tss->Gs     = AsmReadGs ();\r
+    Tss->EFLAGS = 0x2;\r
+    Tss->ESP    = StackTop;\r
+    Tss->CR3    = AsmReadCr3 ();\r
+    Tss->ES     = AsmReadEs ();\r
+    Tss->CS     = AsmReadCs ();\r
+    Tss->SS     = AsmReadSs ();\r
+    Tss->DS     = AsmReadDs ();\r
+    Tss->FS     = AsmReadFs ();\r
+    Tss->GS     = AsmReadGs ();\r
 \r
     StackTop   -= StackSwitchData->Ia32.KnownGoodStackSize;\r
 \r

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
index 4d52b4eb0e028883e349b271f319b4da0e6dedd5..1dcf4277dea9164320f6072cec44afaecdaec914 100644 (file)
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
@@ -186,7 +186,7 @@ ArchSetupExcpetionStack (
   //\r
   TssDesc = StackSwitchData->X64.ExceptionTssDesc;\r
   Tss     = StackSwitchData->X64.ExceptionTss;\r
-  if (StackSwitchData->X64.StackSwitchExceptionNumber > ARRAY_SIZE (Tss->Ist)) {\r
+  if (StackSwitchData->X64.StackSwitchExceptionNumber > ARRAY_SIZE (Tss->IST)) {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
 \r
@@ -221,7 +221,7 @@ ArchSetupExcpetionStack (
   TssDesc->Bits.BaseLow    = (UINT16)TssBase;\r
   TssDesc->Bits.BaseMidl   = (UINT8)(TssBase >> 16);\r
   TssDesc->Bits.Type       = IA32_GDT_TYPE_TSS;\r
-  TssDesc->Bits.Present    = 1;\r
+  TssDesc->Bits.P          = 1;\r
   TssDesc->Bits.LimitHigh  = 0;\r
   TssDesc->Bits.BaseMidh   = (UINT8)(TssBase >> 24);\r
   TssDesc->Bits.BaseHigh   = (UINT32)(TssBase >> 32);\r
@@ -236,7 +236,7 @@ ArchSetupExcpetionStack (
     //\r
     // Fixup IST\r
     //\r
-    Tss->Ist[Index] = StackTop;\r
+    Tss->IST[Index] = StackTop;\r
     StackTop -= StackSwitchData->X64.KnownGoodStackSize;\r
 \r
     //\r

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index da1a43c430ac515139398da5e93c1ec7adf8705c..0c2058a7b0db7e340e2e23a07e844d6fafe444a6 100644 (file)
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -243,7 +243,7 @@ RestoreVolatileRegisters (
       VolatileRegisters->Tr < VolatileRegisters->Gdtr.Limit) {\r
     Tss = (IA32_TSS_DESCRIPTOR *)(VolatileRegisters->Gdtr.Base +\r
                                   VolatileRegisters->Tr);\r
-    if (Tss->Bits.Present == 1) {\r
+    if (Tss->Bits.P == 1) {\r
       Tss->Bits.Type &= 0xD;  // 1101 - Clear busy bit just in case\r
       AsmWriteTr (VolatileRegisters->Tr);\r
     }\r