/// Platform Timer Type\r
///\r
#define EFI_ACPI_6_4_GTDT_GT_BLOCK 0\r
-#define EFI_ACPI_6_4_GTDT_SBSA_GENERIC_WATCHDOG 1\r
+#define EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG 1\r
\r
///\r
/// GT Block Structure\r
#define EFI_ACPI_6_4_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1\r
\r
///\r
-/// SBSA Generic Watchdog Structure\r
+/// Arm Generic Watchdog Structure\r
///\r
typedef struct {\r
UINT8 Type;\r
UINT64 WatchdogControlFramePhysicalAddress;\r
UINT32 WatchdogTimerGSIV;\r
UINT32 WatchdogTimerFlags;\r
-} EFI_ACPI_6_4_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;\r
+} EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_STRUCTURE;\r
\r
///\r
-/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r
+/// Arm Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r
///\r
-#define EFI_ACPI_6_4_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r
-#define EFI_ACPI_6_4_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
-#define EFI_ACPI_6_4_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r
+#define EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r
+#define EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
+#define EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r
\r
//\r
// NVDIMM Firmware Interface Table definition.\r