MdePkg/BaseLib: Introduce new SpeculationBarrier API

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1417

X86 specific BaseLib API AsmLfence() was introduced to address the Spectre
Variant 1 (CVE-2017-5753) issue. The purpose of this API is to insert
barriers to stop speculative execution. However, the API is highly
architecture (X86) specific, and thus should be avoided using across
generic code.

To address this issue, this patch will add a new BaseLib API called
SpeculationBarrier(). Different architectures will have different
implementations for this API.

For IA32 and x64, the implementation of SpeculationBarrier() will
directly call AsmLfence().

For ARM and AARCH64, this patch will add a temporary empty implementation
as a placeholder. We hope experts in ARM can help to contribute the actual
implementation.

For EBC, similar to the ARM and AARCH64 cases, a temporary empty
implementation is added.

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index 8cc086983d5446e1c28e4f1563d85b0247eeb242..1eb842384ee26634cb1b8ea4ed8294cefddd8b98 100644 (file)
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -5111,6 +5111,21 @@ CpuDeadLoop (
   VOID\r
   );\r
 \r
+\r
+/**\r
+  Uses as a barrier to stop speculative execution.\r
+\r
+  Ensures that no later instruction will execute speculatively, until all prior\r
+  instructions have completed.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+SpeculationBarrier (\r
+  VOID\r
+  );\r
+\r
+\r
 #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r
 ///\r
 /// IA32 and x64 Specific Functions.\r

diff --git a/MdePkg/Library/BaseLib/Arm/SpeculationBarrier.c b/MdePkg/Library/BaseLib/Arm/SpeculationBarrier.c
new file mode 100644 (file)
index 0000000..8a6165a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Arm/SpeculationBarrier.c
@@ -0,0 +1,30 @@
+/** @file\r
+  SpeculationBarrier() function for ARM.\r
+\r
+  Copyright (C) 2018, Intel Corporation. All rights reserved.<BR>\r
+\r
+  This program and the accompanying materials are licensed and made available\r
+  under the terms and conditions of the BSD License which accompanies this\r
+  distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php.\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT\r
+  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+\r
+/**\r
+  Uses as a barrier to stop speculative execution.\r
+\r
+  Ensures that no later instruction will execute speculatively, until all prior\r
+  instructions have completed.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+SpeculationBarrier (\r
+  VOID\r
+  )\r
+{\r
+}\r

diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index b84e58324c5291fadcdd72c1300b37ff91a5a97f..d195c5417b2efe9ad1ad2803e453338cfcbf05a1 100644 (file)
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -336,6 +336,7 @@
   X86DisablePaging32.c\r
   X86RdRand.c\r
   X86PatchInstruction.c\r
+  X86SpeculationBarrier.c\r
 \r
 [Sources.X64]\r
   X64/Thunk16.nasm\r
@@ -515,6 +516,7 @@
   X86DisablePaging32.c\r
   X86RdRand.c\r
   X86PatchInstruction.c\r
+  X86SpeculationBarrier.c\r
   X64/GccInline.c | GCC\r
   X64/Thunk16.S | XCODE\r
   X64/SwitchStack.nasm| GCC\r
@@ -543,12 +545,14 @@
   Ebc/CpuBreakpoint.c\r
   Ebc/SetJumpLongJump.c\r
   Ebc/SwitchStack.c\r
+  Ebc/SpeculationBarrier.c\r
   Unaligned.c\r
   Math64.c\r
 \r
 [Sources.ARM]\r
   Arm/InternalSwitchStack.c\r
   Arm/Unaligned.c\r
+  Arm/SpeculationBarrier.c\r
   Math64.c                   | RVCT\r
   Math64.c                   | MSFT\r
 \r
@@ -582,6 +586,7 @@
 [Sources.AARCH64]\r
   Arm/InternalSwitchStack.c\r
   Arm/Unaligned.c\r
+  Arm/SpeculationBarrier.c\r
   Math64.c\r
 \r
   AArch64/MemoryFence.S             | GCC\r

diff --git a/MdePkg/Library/BaseLib/Ebc/SpeculationBarrier.c b/MdePkg/Library/BaseLib/Ebc/SpeculationBarrier.c
new file mode 100644 (file)
index 0000000..8fa4c20
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ebc/SpeculationBarrier.c
@@ -0,0 +1,30 @@
+/** @file\r
+  SpeculationBarrier() function for EBC.\r
+\r
+  Copyright (C) 2018, Intel Corporation. All rights reserved.<BR>\r
+\r
+  This program and the accompanying materials are licensed and made available\r
+  under the terms and conditions of the BSD License which accompanies this\r
+  distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php.\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT\r
+  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+\r
+/**\r
+  Uses as a barrier to stop speculative execution.\r
+\r
+  Ensures that no later instruction will execute speculatively, until all prior\r
+  instructions have completed.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+SpeculationBarrier (\r
+  VOID\r
+  )\r
+{\r
+}\r

diff --git a/MdePkg/Library/BaseLib/X86SpeculationBarrier.c b/MdePkg/Library/BaseLib/X86SpeculationBarrier.c
new file mode 100644 (file)
index 0000000..03deca8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/X86SpeculationBarrier.c
@@ -0,0 +1,32 @@
+/** @file\r
+  SpeculationBarrier() function for IA32 and x64.\r
+\r
+  Copyright (C) 2018, Intel Corporation. All rights reserved.<BR>\r
+\r
+  This program and the accompanying materials are licensed and made available\r
+  under the terms and conditions of the BSD License which accompanies this\r
+  distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php.\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT\r
+  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <Library/BaseLib.h>\r
+\r
+/**\r
+  Uses as a barrier to stop speculative execution.\r
+\r
+  Ensures that no later instruction will execute speculatively, until all prior\r
+  instructions have completed.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+SpeculationBarrier (\r
+  VOID\r
+  )\r
+{\r
+  AsmLfence ();\r
+}\r