]> git.proxmox.com Git - mirror_edk2.git/commitdiff
MdeModulePkg/XhciDxe: Use BaseLib linked list iteration macros
authorMichael Kubacki <michael.kubacki@microsoft.com>
Fri, 10 Apr 2020 20:02:15 +0000 (04:02 +0800)
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Tue, 21 Apr 2020 02:20:51 +0000 (02:20 +0000)
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1959

Replaces usage of the linked list iteration macros defined in Xhci.h
with the common definition in BaseLib.h.

Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c

index 72b4e084f14d491ab5d209db56aa0fe7f0f9cb86..3285eb8798c0788f2a0f08b896cd262995691a23 100644 (file)
@@ -3,6 +3,7 @@
   Provides some data structure definitions used by the XHCI host controller driver.\r
 \r
 Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) Microsoft Corporation.<BR>\r
 SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -82,14 +83,6 @@ typedef struct _USB_DEV_CONTEXT      USB_DEV_CONTEXT;
 #define INT_INTER                    3\r
 #define INT_INTER_ASYNC              4\r
 \r
-//\r
-// Iterate through the double linked list. This is delete-safe.\r
-// Don't touch NextEntry\r
-//\r
-#define EFI_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead) \\r
-  for (Entry = (ListHead)->ForwardLink, NextEntry = Entry->ForwardLink;\\r
-      Entry != (ListHead); Entry = NextEntry, NextEntry = Entry->ForwardLink)\r
-\r
 #define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)\r
 \r
 #define XHC_LOW_32BIT(Addr64)          ((UINT32)(((UINTN)(Addr64)) & 0xFFFFFFFF))\r
index c0c374fc4758179b0c9c79a3649b3e56b1d3a147..ab8957c546ee2f66ddb7dd0eb3cfc653848b18e4 100644 (file)
@@ -3,6 +3,7 @@
   XHCI transfer scheduling routines.\r
 \r
 Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) Microsoft Corporation.<BR>\r
 SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -1051,7 +1052,7 @@ IsAsyncIntTrb (
   LIST_ENTRY              *Next;\r
   URB                     *CheckedUrb;\r
 \r
-  EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {\r
+  BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {\r
     CheckedUrb = EFI_LIST_CONTAINER (Entry, URB, UrbList);\r
     if (IsTransferRingTrb (Xhc, Trb, CheckedUrb)) {\r
       *Urb = CheckedUrb;\r
@@ -1346,7 +1347,7 @@ XhciDelAsyncIntTransfer (
 \r
   Urb = NULL;\r
 \r
-  EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {\r
+  BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {\r
     Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);\r
     if ((Urb->Ep.BusAddr == BusAddr) &&\r
         (Urb->Ep.EpAddr == EpNum) &&\r
@@ -1386,7 +1387,7 @@ XhciDelAllAsyncIntTransfers (
   URB                     *Urb;\r
   EFI_STATUS              Status;\r
 \r
-  EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {\r
+  BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {\r
     Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);\r
 \r
     //\r
@@ -1578,7 +1579,7 @@ XhcMonitorAsyncRequests (
 \r
   Xhc    = (USB_XHCI_INSTANCE*) Context;\r
 \r
-  EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {\r
+  BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {\r
     Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);\r
 \r
     //\r