;------------------------------------------------------------------------------\r
; Include file for IA32 MpFuncs.asm\r
;\r
-; Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>\r
; This program and the accompanying materials\r
; are licensed and made available under the terms and conditions of the BSD License\r
; which accompanies this distribution. The full text of the license may be found at\r
StackSize equ LockLocation + 8h\r
RendezvousProc equ LockLocation + 0Ch\r
GdtrProfile equ LockLocation + 10h\r
-BufferStart equ LockLocation + 18h\r
+IdtrProfile equ LockLocation + 16h\r
+BufferStart equ LockLocation + 1Ch\r
\r
;-------------------------------------------------------------------------------\r
#------------------------------------------------------------------------------\r
# IA32 assembly file for AP startup vector.\r
#\r
-# Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
.byte 0x66 # db 66h\r
.byte 0x2E,0xF,0x1,0x14 # lgdt fword ptr cs:[si]\r
\r
+ .byte 0xBE\r
+ .word IdtrProfile\r
+ .byte 0x66 # db 66h\r
+ .byte 0x2E,0xF,0x1,0x1C # lidt fword ptr cs:[si]\r
+\r
.byte 0x33,0xC0 # xor ax, ax\r
.byte 0x8E,0xD8 # mov ds, ax\r
.byte 0xF,0x20,0xC0 # mov eax, cr0 ; Get control register 0\r
;------------------------------------------------------------------------------\r
; IA32 assembly file for AP startup vector.\r
;\r
-; Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>\r
; This program and the accompanying materials\r
; are licensed and made available under the terms and conditions of the BSD License\r
; which accompanies this distribution. The full text of the license may be found at\r
dw GdtrProfile ; mov si, GdtrProfile\r
db 66h ; db 66h\r
db 2Eh,0Fh, 01h, 14h ; lgdt fword ptr cs:[si]\r
+\r
+ db 0BEh\r
+ dw IdtrProfile ; mov si, IdtrProfile\r
+ db 66h ; db 66h\r
+ db 2Eh,0Fh, 01h, 1Ch ; lidt fword ptr cs:[si]\r
\r
db 33h, 0C0h ; xor ax, ax\r
db 8Eh, 0D8h ; mov ds, ax\r
@retval EFI_SUCCESS Processor information successfully returned.\r
@retval EFI_DEVICE_ERROR Caller processor is AP.\r
@retval EFI_INVALID_PARAMETER ProcessorInfoBuffer is NULL\r
- @retval EFI_NOT_FOUND Processor with the handle specified by ProcessorNumber does not exist. \r
+ @retval EFI_NOT_FOUND Processor with the handle specified by ProcessorNumber does not exist.\r
\r
**/\r
EFI_STATUS\r
ASSERT_EFI_ERROR (Status);\r
\r
ProcessorInfoBuffer->ProcessorId = (UINT64) ProcessorContextBuffer.ApicID;\r
- \r
+\r
//\r
// Get Status Flag of specified processor\r
//\r
@param FailedCpuList The list of processor numbers that fail to finish the function before\r
TimeoutInMicrosecsond expires.\r
\r
- @retval EFI_SUCCESS In blocking mode, all APs have finished before the timeout expired. \r
+ @retval EFI_SUCCESS In blocking mode, all APs have finished before the timeout expired.\r
@retval EFI_SUCCESS In non-blocking mode, function has been dispatched to all enabled APs.\r
@retval EFI_DEVICE_ERROR Caller processor is AP.\r
@retval EFI_NOT_STARTED No enabled AP exists in the system.\r
mStopCheckAPsStatus = FALSE;\r
return EFI_NOT_READY;\r
} else {\r
- // \r
+ //\r
// Mark this processor as responsible for current calling.\r
//\r
mMPSystemData.CpuList[ProcessorNumber] = TRUE;\r
}\r
}\r
}\r
- \r
+\r
//\r
// If no enabled AP exists, return EFI_NOT_STARTED.\r
//\r
@retval EFI_DEVICE_ERROR Caller processor is AP.\r
@retval EFI_NOT_FOUND Processor with the handle specified by ProcessorNumber does not exist.\r
@retval EFI_INVALID_PARAMETERS ProcessorNumber specifies the BSP.\r
- \r
+\r
**/\r
EFI_STATUS\r
EFIAPI\r
ASSERT_EFI_ERROR (Status);\r
\r
ChangeCpuState (ProcessorNumber, EnableAP);\r
- \r
+\r
return EFI_SUCCESS;\r
}\r
\r
UINTN ProcessorNumber;\r
CPU_DATA_BLOCK *CpuData;\r
EFI_STATUS Status;\r
- \r
+\r
//\r
// If CheckAPsStatus() is stopped, then return immediately.\r
//\r
ASSERT (*mMPSystemData.FailedCpuList != NULL);\r
}\r
ListIndex = 0;\r
- \r
+\r
for (ProcessorNumber = 0; ProcessorNumber < mNumberOfProcessors; ProcessorNumber++) {\r
//\r
// Check whether this processor is responsible for StartupAllAPs().\r
AcquireSpinLock (&CpuData->CpuDataLock);\r
CpuData->State = CpuStateIdle;\r
ReleaseSpinLock (&CpuData->CpuDataLock);\r
- \r
+\r
if (CpuData->Finished != NULL) {\r
*(CpuData->Finished) = TRUE;\r
}\r
return EFI_NOT_FOUND;\r
}\r
\r
+/**\r
+ Programs Local APIC registers for virtual wire mode.\r
+\r
+ This function programs Local APIC registers for virtual wire mode.\r
+\r
+ @param Bsp Indicates whether the programmed processor is going to be BSP\r
+\r
+**/\r
+VOID\r
+ProgramVirtualWireMode (\r
+ BOOLEAN Bsp\r
+ )\r
+{\r
+ UINTN ApicBase;\r
+ UINT32 Value;\r
+\r
+ ApicBase = (UINTN)AsmMsrBitFieldRead64 (27, 12, 35) << 12;\r
+\r
+ //\r
+ // Program the Spurious Vector entry\r
+ // Set bit 8 (APIC Software Enable/Disable) to enable local APIC,\r
+ // and set Spurious Vector as 0x0F.\r
+ //\r
+ MmioBitFieldWrite32 (ApicBase + APIC_REGISTER_SPURIOUS_VECTOR_OFFSET, 0, 9, 0x10F);\r
+\r
+ //\r
+ // Program the LINT0 vector entry as ExtInt\r
+ // Set bits 8..10 to 7 as ExtInt Delivery Mode,\r
+ // and clear bits for Delivery Status, Interrupt Input Pin Polarity, Remote IRR,\r
+ // Trigger Mode, and Mask\r
+ //\r
+ if (!Bsp) {\r
+ DisableInterrupts ();\r
+ }\r
+ Value = MmioRead32 (ApicBase + APIC_REGISTER_LINT0_VECTOR_OFFSET);\r
+ Value = BitFieldWrite32 (Value, 8, 10, 7);\r
+ Value = BitFieldWrite32 (Value, 12, 16, 0);\r
+ if (!Bsp) {\r
+ //\r
+ // For APs, LINT0 is masked\r
+ //\r
+ Value = BitFieldWrite32 (Value, 16, 16, 1);\r
+ }\r
+ MmioWrite32 (ApicBase + APIC_REGISTER_LINT0_VECTOR_OFFSET, Value);\r
+\r
+ //\r
+ // Program the LINT1 vector entry as NMI\r
+ // Set bits 8..10 to 4 as NMI Delivery Mode,\r
+ // and clear bits for Delivery Status, Interrupt Input Pin Polarity, Remote IRR,\r
+ // Trigger Mode.\r
+ // For BSP clear Mask bit, and for AP set mask bit.\r
+ //\r
+ Value = MmioRead32 (ApicBase + APIC_REGISTER_LINT1_VECTOR_OFFSET);\r
+ Value = BitFieldWrite32 (Value, 8, 10, 4);\r
+ Value = BitFieldWrite32 (Value, 12, 16, 0);\r
+ if (!Bsp) {\r
+ //\r
+ // For APs, LINT1 is masked\r
+ //\r
+ Value = BitFieldWrite32 (Value, 16, 16, 1);\r
+ }\r
+ MmioWrite32 (ApicBase + APIC_REGISTER_LINT1_VECTOR_OFFSET, Value);\r
+}\r
+\r
+\r
/**\r
Wrapper function for all procedures assigned to AP.\r
\r
UINTN ProcessorNumber;\r
CPU_DATA_BLOCK *CpuData;\r
\r
+ ProgramVirtualWireMode (FALSE);\r
+\r
WhoAmI (&mMpService, &ProcessorNumber);\r
CpuData = &mMPSystemData.CpuData[ProcessorNumber];\r
\r
UINTN ApicBase;\r
UINT32 ICRLow;\r
UINT32 ICRHigh;\r
- \r
+\r
UINT32 VectorNumber;\r
UINT32 DeliveryMode;\r
\r
\r
/**\r
Function to wake up a specified AP and assign procedure to it.\r
- \r
+\r
@param ProcessorNumber Handle number of the specified processor.\r
@param Procedure Procedure to assign.\r
@param ProcArguments Argument for Procedure.\r
\r
/**\r
Terminate AP's task and set it to idle state.\r
- \r
+\r
This function terminates AP's task due to timeout by sending INIT-SIPI,\r
and sends it to idle state.\r
\r
{\r
MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
IA32_DESCRIPTOR GdtrForBSP;\r
+ IA32_DESCRIPTOR IdtrForBSP;\r
EFI_PHYSICAL_ADDRESS GdtForAP;\r
+ EFI_PHYSICAL_ADDRESS IdtForAP;\r
EFI_STATUS Status;\r
\r
//\r
mExchangeInfo->StackSize = AP_STACK_SIZE;\r
\r
AsmReadGdtr (&GdtrForBSP);\r
+ AsmReadIdtr (&IdtrForBSP);\r
\r
//\r
// Allocate memory under 4G to hold GDT for APs\r
Status = gBS->AllocatePages (\r
AllocateMaxAddress,\r
EfiBootServicesData,\r
- EFI_SIZE_TO_PAGES (GdtrForBSP.Limit + 1),\r
+ EFI_SIZE_TO_PAGES ((GdtrForBSP.Limit + 1) + (IdtrForBSP.Limit + 1)),\r
&GdtForAP\r
);\r
ASSERT_EFI_ERROR (Status);\r
\r
+ IdtForAP = (UINTN) GdtForAP + GdtrForBSP.Limit + 1;\r
+\r
CopyMem ((VOID *) (UINTN) GdtForAP, (VOID *) GdtrForBSP.Base, GdtrForBSP.Limit + 1);\r
+ CopyMem ((VOID *) (UINTN) IdtForAP, (VOID *) IdtrForBSP.Base, IdtrForBSP.Limit + 1);\r
\r
mExchangeInfo->GdtrProfile.Base = (UINTN) GdtForAP;\r
mExchangeInfo->GdtrProfile.Limit = GdtrForBSP.Limit;\r
+ mExchangeInfo->IdtrProfile.Base = (UINTN) IdtForAP;\r
+ mExchangeInfo->IdtrProfile.Limit = IdtrForBSP.Limit;\r
\r
mExchangeInfo->BufferStart = (UINT32) mStartupVector;\r
mExchangeInfo->Cr3 = (UINT32) (AsmReadCr3 ());\r
\r
/**\r
Prepares memory region for processor configuration.\r
- \r
+\r
This function prepares memory region for processor configuration.\r
\r
**/\r
for (Index = 0; Index < MAX_CPU_NUMBER; Index++) {\r
InitializeSpinLock (&mMPSystemData.CpuData[Index].CpuDataLock);\r
}\r
- \r
+\r
PrepareAPStartupVector ();\r
}\r
\r
/**\r
Gets the processor number of BSP.\r
- \r
+\r
@return The processor number of BSP.\r
\r
**/\r
&ProcessorContextBuffer\r
);\r
ASSERT_EFI_ERROR (Status);\r
- \r
+\r
if (ProcessorContextBuffer.Designation == EfiCpuBSP) {\r
break;\r
}\r
/**\r
Entrypoint of MP Services Protocol thunk driver.\r
\r
- @param[in] ImageHandle The firmware allocated handle for the EFI image. \r
+ @param[in] ImageHandle The firmware allocated handle for the EFI image.\r
@param[in] SystemTable A pointer to the EFI System Table.\r
- \r
+\r
@retval EFI_SUCCESS The entry point is executed successfully.\r
\r
**/\r
// Locates Framework version MP Services Protocol\r
//\r
Status = gBS->LocateProtocol (\r
- &gFrameworkEfiMpServiceProtocolGuid, \r
- NULL, \r
+ &gFrameworkEfiMpServiceProtocolGuid,\r
+ NULL,\r
(VOID **) &mFrameworkMpService\r
);\r
ASSERT_EFI_ERROR (Status);\r
/** @file\r
Include file for PI MP Services Protocol Thunk.\r
\r
-Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
//\r
// Local APIC register definition for IPI.\r
//\r
+#define APIC_REGISTER_SPURIOUS_VECTOR_OFFSET 0xF0\r
#define APIC_REGISTER_ICR_LOW_OFFSET 0x300\r
#define APIC_REGISTER_ICR_HIGH_OFFSET 0x310\r
+#define APIC_REGISTER_LINT0_VECTOR_OFFSET 0x350\r
+#define APIC_REGISTER_LINT1_VECTOR_OFFSET 0x360\r
\r
typedef struct {\r
UINTN Lock;\r
UINTN StackSize;\r
VOID *ApFunction;\r
IA32_DESCRIPTOR GdtrProfile;\r
+ IA32_DESCRIPTOR IdtrProfile;\r
UINT32 BufferStart;\r
UINT32 Cr3;\r
} MP_CPU_EXCHANGE_INFO;\r
@retval EFI_SUCCESS Processor information successfully returned.\r
@retval EFI_DEVICE_ERROR Caller processor is AP.\r
@retval EFI_INVALID_PARAMETER ProcessorInfoBuffer is NULL\r
- @retval EFI_NOT_FOUND Processor with the handle specified by ProcessorNumber does not exist. \r
+ @retval EFI_NOT_FOUND Processor with the handle specified by ProcessorNumber does not exist.\r
\r
**/\r
EFI_STATUS\r
@param FailedCpuList The list of processor numbers that fail to finish the function before\r
TimeoutInMicrosecsond expires.\r
\r
- @retval EFI_SUCCESS In blocking mode, all APs have finished before the timeout expired. \r
+ @retval EFI_SUCCESS In blocking mode, all APs have finished before the timeout expired.\r
@retval EFI_SUCCESS In non-blocking mode, function has been dispatched to all enabled APs.\r
@retval EFI_DEVICE_ERROR Caller processor is AP.\r
@retval EFI_NOT_STARTED No enabled AP exists in the system.\r
@retval EFI_DEVICE_ERROR Caller processor is AP.\r
@retval EFI_NOT_FOUND Processor with the handle specified by ProcessorNumber does not exist.\r
@retval EFI_INVALID_PARAMETERS ProcessorNumber specifies the BSP.\r
- \r
+\r
**/\r
EFI_STATUS\r
EFIAPI\r
\r
/**\r
Function to wake up a specified AP and assign procedure to it.\r
- \r
+\r
@param ProcessorNumber Handle number of the specified processor.\r
@param Procedure Procedure to assign.\r
@param ProcArguments Argument for Procedure.\r
\r
/**\r
Terminate AP's task and set it to idle state.\r
- \r
+\r
This function terminates AP's task due to timeout by sending INIT-SIPI,\r
and sends it to idle state.\r
\r
\r
/**\r
Gets the processor number of BSP.\r
- \r
+\r
@return The processor number of BSP.\r
\r
**/\r
;------------------------------------------------------------------------------\r
; Include file for X64 MpFuncs.asm\r
;\r
-; Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>\r
; This program and the accompanying materials\r
; are licensed and made available under the terms and conditions of the BSD License\r
; which accompanies this distribution. The full text of the license may be found at\r
StackSizeLocation equ LockLocation + 10h\r
CProcedureLocation equ LockLocation + 18h\r
GdtrLocation equ LockLocation + 20h\r
-BufferStartLocation equ LockLocation + 2Ch\r
-Cr3OffsetLocation equ LockLocation + 30h\r
+IdtrLocation equ LockLocation + 2Ah\r
+BufferStartLocation equ LockLocation + 34h\r
+Cr3OffsetLocation equ LockLocation + 38h\r
\r
;-------------------------------------------------------------------------------\r
#------------------------------------------------------------------------------\r
# X64 assembly file for AP startup vector.\r
#\r
-# Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
.byte 0x66 # db 66h\r
.byte 0x2E,0xF,0x1,0x14 # lgdt fword ptr cs:[si]\r
\r
+ .byte 0xBE\r
+ .word IdtrLocation\r
+ .byte 0x66 # db 66h\r
+ .byte 0x2E,0xF,0x1,0x1C # lidt fword ptr cs:[si]\r
+\r
.byte 0x33,0xC0 # xor ax, ax\r
.byte 0x8E,0xD8 # mov ds, ax\r
\r
;------------------------------------------------------------------------------\r
; X64 assembly file for AP startup vector.\r
;\r
-; Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>\r
; This program and the accompanying materials\r
; are licensed and made available under the terms and conditions of the BSD License\r
; which accompanies this distribution. The full text of the license may be found at\r
\r
.code\r
\r
-include AsmInclude.inc \r
+include AsmInclude.inc\r
;-------------------------------------------------------------------------------------\r
\r
;-------------------------------------------------------------------------------------\r
db 8ch, 0c8h ; mov ax, cs\r
db 8eh, 0d8h ; mov ds, ax\r
db 8eh, 0c0h ; mov es, ax\r
- db 8eh, 0d0h ; mov ss, ax \r
+ db 8eh, 0d0h ; mov ss, ax\r
db 33h, 0c0h ; xor ax, ax\r
db 8eh, 0e0h ; mov fs, ax\r
db 8eh, 0e8h ; mov gs, ax\r
db 0BEh\r
dw Cr3OffsetLocation ; mov si, Cr3Location\r
db 66h, 8Bh, 0Ch ; mov ecx,dword ptr [si] ; ECX is keeping the value of CR3\r
- \r
+\r
db 0BEh\r
dw GdtrLocation ; mov si, GdtrProfile\r
db 66h ; db 66h\r
db 2Eh, 0Fh, 01h, 14h ; lgdt fword ptr cs:[si]\r
\r
+ db 0BEh\r
+ dw IdtrLocation ; mov si, IdtrProfile\r
+ db 66h ; db 66h\r
+ db 2Eh, 0Fh, 01h, 1Ch ; lidt fword ptr cs:[si]\r
+\r
db 33h, 0C0h ; xor ax, ax\r
db 8Eh, 0D8h ; mov ds, ax\r
- \r
+\r
db 0Fh, 20h, 0C0h ; mov eax, cr0 ; Get control register 0\r
db 66h, 83h, 0C8h, 01h ; or eax, 000000001h ; Set PE bit (bit #0)\r
db 0Fh, 22h, 0C0h ; mov cr0, eax\r
db 0Fh, 22h, 0E0h ; mov cr4, eax\r
\r
db 0Fh, 22h, 0D9h ; mov cr3, ecx\r
- \r
+\r
db 8Bh, 0F2h ; mov esi, edx ; Save wakeup buffer address\r
- \r
+\r
db 0B9h\r
dd 0C0000080h ; mov ecx, 0c0000080h ; EFER MSR number.\r
db 0Fh, 32h ; rdmsr ; Read EFER.\r
db 0Fh, 0BAh, 0E8h, 08h ; bts eax, 8 ; Set LME=1.\r
db 0Fh, 30h ; wrmsr ; Write EFER.\r
- \r
+\r
db 0Fh, 20h, 0C0h ; mov eax, cr0 ; Read CR0.\r
db 0Fh, 0BAh, 0E8h, 1Fh ; bts eax, 31 ; Set PG=1.\r
db 0Fh, 22h, 0C0h ; mov cr0, eax ; Write CR0.\r
\r
LONG_JUMP::\r
- \r
+\r
db 67h, 0EAh ; far jump\r
dd 0h ; 32-bit offset\r
dw 38h ; 16-bit selector\r
- \r
+\r
LongModeStart::\r
\r
mov ax, 30h\r
sub rsp, 20h\r
call rax\r
add rsp, 20h\r
- \r
+\r
GoToSleep::\r
\r
cli\r
hlt\r
jmp $-2\r
- \r
+\r
RendezvousFunnelProc ENDP\r
RendezvousFunnelProcEnd::\r
\r
;-------------------------------------------------------------------------------------\r
; AsmGetAddressMap (&AddressMap);\r
;-------------------------------------------------------------------------------------\r
-AsmGetAddressMap PROC \r
+AsmGetAddressMap PROC\r
\r
mov rax, offset RendezvousFunnelProcStart\r
mov qword ptr [rcx], rax\r
mov qword ptr [rcx+18h], LongModeStart - RendezvousFunnelProcStart\r
mov qword ptr [rcx+20h], LONG_JUMP - RendezvousFunnelProcStart\r
mov qword ptr [rcx+28h], RendezvousFunnelProcEnd - RendezvousFunnelProcStart\r
- \r
+\r
ret\r
- \r
+\r
AsmGetAddressMap ENDP\r
\r
END\r
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