]> git.proxmox.com Git - mirror_edk2.git/commitdiff
OvmfPkg/PlatformPei: factor out Q35BoardVerification()
authorLaszlo Ersek <lersek@redhat.com>
Fri, 20 Sep 2019 11:36:56 +0000 (13:36 +0200)
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Wed, 5 Feb 2020 12:59:32 +0000 (12:59 +0000)
Before adding another SMM-related, and therefore Q35-only, dynamically
detectable feature, extract the current board type check from
Q35TsegMbytesInitialization() to a standalone function.

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1512
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Message-Id: <20200129214412.2361-5-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
OvmfPkg/PlatformPei/MemDetect.c
OvmfPkg/PlatformPei/Platform.c

index d451989f31c9b20b2154f8d65be89f6b02e296ce..58b171fba1c8d70f9026e4932948a5ae68eb2fe0 100644 (file)
@@ -53,18 +53,7 @@ Q35TsegMbytesInitialization (
   UINT16        ExtendedTsegMbytes;\r
   RETURN_STATUS PcdStatus;\r
 \r
-  if (mHostBridgeDevId != INTEL_Q35_MCH_DEVICE_ID) {\r
-    DEBUG ((\r
-      DEBUG_ERROR,\r
-      "%a: no TSEG (SMRAM) on host bridge DID=0x%04x; "\r
-      "only DID=0x%04x (Q35) is supported\n",\r
-      __FUNCTION__,\r
-      mHostBridgeDevId,\r
-      INTEL_Q35_MCH_DEVICE_ID\r
-      ));\r
-    ASSERT (FALSE);\r
-    CpuDeadLoop ();\r
-  }\r
+  ASSERT (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID);\r
 \r
   //\r
   // Check if QEMU offers an extended TSEG.\r
index e5e8581752b5a430624f65666b2386e693e5a600..510d6d7477ecbf2a80f33a9a2d1e3d6cf67e5ef2 100644 (file)
@@ -566,6 +566,28 @@ S3Verification (
 }\r
 \r
 \r
+VOID\r
+Q35BoardVerification (\r
+  VOID\r
+  )\r
+{\r
+  if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {\r
+    return;\r
+  }\r
+\r
+  DEBUG ((\r
+    DEBUG_ERROR,\r
+    "%a: no TSEG (SMRAM) on host bridge DID=0x%04x; "\r
+    "only DID=0x%04x (Q35) is supported\n",\r
+    __FUNCTION__,\r
+    mHostBridgeDevId,\r
+    INTEL_Q35_MCH_DEVICE_ID\r
+    ));\r
+  ASSERT (FALSE);\r
+  CpuDeadLoop ();\r
+}\r
+\r
+\r
 /**\r
   Fetch the boot CPU count and the possible CPU count from QEMU, and expose\r
   them to UefiCpuPkg modules. Set the mMaxCpuCount variable.\r
@@ -768,6 +790,7 @@ InitializePlatform (
   MaxCpuCountInitialization ();\r
 \r
   if (FeaturePcdGet (PcdSmmSmramRequire)) {\r
+    Q35BoardVerification ();\r
     Q35TsegMbytesInitialization ();\r
   }\r
 \r