<Arch ArchType="IPF">\r
<Filename>IpfCache.c</Filename>\r
<Filename>Ipf/Cpu.s</Filename>\r
- <Filename>Ipf/CallPalProc.s</Filename>\r
+ <Filename>Ipf/PalCallStatic.s</Filename>\r
</Arch>\r
</SourceFiles>\r
<Includes>\r
+++ /dev/null
-/// @file\r
-/// Contains an implementation of CallPalProcStatic on Itanium-based\r
-/// architecture.\r
-///\r
-/// Copyright (c) 2006, Intel Corporation\r
-/// All rights reserved. This program and the accompanying materials\r
-/// are licensed and made available under the terms and conditions of the BSD License\r
-/// which accompanies this distribution. The full text of the license may be found at\r
-/// http://opensource.org/licenses/bsd-license.php\r
-///\r
-/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-///\r
-/// Module Name: CallPalProc.s\r
-///\r
-///\r
-\r
-.auto\r
-.text\r
-\r
-.proc CallPalProcStatic\r
-.type CallPalProcStatic, @function\r
-CallPalProcStatic::\r
- mov r9 = ar.k5\r
- mov r8 = ip\r
- add r8 = (PalProcReturn - CallPalProcStatic), r8\r
- mov r28 = r32\r
- mov b7 = r9\r
- mov r29 = r33\r
- mov r30 = r34\r
- mov r31 = r35\r
- mov r32 = b0\r
- mov b0 = r8\r
- br.sptk b7\r
-PalProcReturn:\r
- mov b0 = r32\r
- br.ret.sptk.many b0\r
-.endp CallPalProcStatic\r
--- /dev/null
+/// @file\r
+/// Contains an implementation of CallPalProcStatic on Itanium-based\r
+/// architecture.\r
+///\r
+/// Copyright (c) 2006, Intel Corporation\r
+/// All rights reserved. This program and the accompanying materials\r
+/// are licensed and made available under the terms and conditions of the BSD License\r
+/// which accompanies this distribution. The full text of the license may be found at\r
+/// http://opensource.org/licenses/bsd-license.php\r
+///\r
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+///\r
+/// Module Name: PalCallStatic.s\r
+///\r
+///\r
+\r
+.auto\r
+.text\r
+\r
+.proc PalCallStatic\r
+.type PalCallStatic, @function\r
+.regstk 5, 0, 0, 0\r
+PalCallStatic::\r
+ cmp.eq p6 = r0, in0\r
+ mov r31 = in4\r
+ mov r8 = ip\r
+(p6) mov in0 = ar.k5\r
+ add r8 = (PalProcReturn - PalCallStatic), r8\r
+ mov in4 = b0\r
+ mov r30 = in3\r
+ mov r29 = in2\r
+ mov b7 = in0\r
+ mov in3 = psr\r
+ rsm 1 << 14 // Disable interrupts\r
+ mov r28 = in1\r
+ mov in0 = 256\r
+ mov b0 = r8\r
+ br.cond.sptk b7\r
+PalProcReturn:\r
+ mov psr.l = in3\r
+ cmp.eq p6 = in0, in1 // in1 == PAL_COPY_PAL?\r
+(p6) cmp.eq p6 = r0, r8 // Status == Success?\r
+(p6) add in2 = r9, in2\r
+(p6) mov ar.k5 = in2\r
+ mov b0 = in4\r
+ br.ret.sptk.many b0\r
+.endp PalCallStatic\r
} PAL_PROC_RETURN;\r
\r
PAL_PROC_RETURN\r
-CallPalProcStatic (\r
+PalCallStatic (\r
+ IN CONST VOID *PalEntryPoint,\r
IN UINT64 Arg1,\r
IN UINT64 Arg2,\r
IN UINT64 Arg3,\r
VOID\r
)\r
{\r
- CallPalProcStatic (1, 1, 1, 0);\r
-}\r
-\r
-/**\r
- Invalidates a range of instruction cache lines in the cache coherency domain\r
- of the calling CPU.\r
-\r
- Invalidates the instruction cache lines specified by Address and Length. If\r
- Address is not aligned on a cache line boundary, then entire instruction\r
- cache line containing Address is invalidated. If Address + Length is not\r
- aligned on a cache line boundary, then the entire instruction cache line\r
- containing Address + Length -1 is invalidated. This function may choose to\r
- invalidate the entire instruction cache if that is more efficient than\r
- invalidating the specified range. If Length is 0, the no instruction cache\r
- lines are invalidated. Address is returned.\r
-\r
- If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
-\r
- @param Address The base address of the instruction cache lines to\r
- invalidate. If the CPU is in a physical addressing mode, then\r
- Address is a physical address. If the CPU is in a virtual\r
- addressing mode, then Address is a virtual address.\r
-\r
- @param Length The number of bytes to invalidate from the instruction cache.\r
-\r
- @return Address\r
-\r
-**/\r
-VOID*\r
-EFIAPI\r
-InvalidateInstructionCacheRange (\r
- IN VOID *Address,\r
- IN UINTN Length\r
- )\r
-{\r
- ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);\r
-\r
- if (Length > 0) {\r
- InvalidateInstructionCache ();\r
- }\r
- return Address;\r
+ PalCallStatic (NULL, 1, 1, 1, 0);\r
}\r
\r
/**\r
VOID\r
)\r
{\r
- CallPalProcStatic (1, 2, 1, 0);\r
+ PalCallStatic (NULL, 1, 2, 1, 0);\r
}\r
\r
/**\r
VOID\r
)\r
{\r
- CallPalProcStatic (1, 2, 0, 0);\r
+ PalCallStatic (NULL, 1, 2, 0, 0);\r
}\r
\r
/**\r
<Filename>x86TimerLib.c</Filename>\r
</Arch>\r
<Arch ArchType="IPF">\r
- <Filename>Ipf/CallPalProc.s</Filename>\r
+ <Filename>Ipf/PalCallStatic.s</Filename>\r
<Filename>Ipf/ReadItc.s</Filename>\r
<Filename>Ipf/IpfTimerLib.c</Filename>\r
</Arch>\r
+++ /dev/null
-/// @file\r
-/// Contains an implementation of CallPalProcStatic on Itanium-based\r
-/// architecture.\r
-///\r
-/// Copyright (c) 2006, Intel Corporation\r
-/// All rights reserved. This program and the accompanying materials\r
-/// are licensed and made available under the terms and conditions of the BSD License\r
-/// which accompanies this distribution. The full text of the license may be found at\r
-/// http://opensource.org/licenses/bsd-license.php\r
-///\r
-/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-///\r
-/// Module Name: CallPalProc.s\r
-///\r
-///\r
-\r
-.auto\r
-.text\r
-\r
-.proc CallPalProcStatic\r
-.type CallPalProcStatic, @function\r
-CallPalProcStatic::\r
- mov r9 = ar.k5\r
- mov r8 = ip\r
- add r8 = (PalProcReturn - CallPalProcStatic), r8\r
- mov r28 = r32\r
- mov b7 = r9\r
- mov r29 = r33\r
- mov r30 = r34\r
- mov r31 = r35\r
- mov r32 = b0\r
- mov b0 = r8\r
- br.sptk b7\r
-PalProcReturn:\r
- mov b0 = r32\r
- br.ret.sptk.many b0\r
-.endp CallPalProcStatic\r
} PAL_PROC_RETURN;\r
\r
PAL_PROC_RETURN\r
-CallPalProcStatic (\r
+PalCallStatic (\r
+ IN CONST VOID *PalEntryPoint,\r
IN UINT64 Arg1,\r
IN UINT64 Arg2,\r
IN UINT64 Arg3,\r
PAL_PROC_RETURN PalRet;\r
UINT64 BaseFrequence;\r
\r
- PalRet = CallPalProcStatic (13, 0, 0, 0);\r
+ PalRet = PalCallStatic (NULL, 13, 0, 0, 0);\r
ASSERT (PalRet.Status == 0);\r
BaseFrequence = PalRet.r9;\r
\r
- PalRet = CallPalProcStatic (14, 0, 0, 0);\r
+ PalRet = PalCallStatic (NULL, 14, 0, 0, 0);\r
ASSERT (PalRet.Status == 0);\r
\r
*StartValue = 0;\r
--- /dev/null
+/// @file\r
+/// Contains an implementation of CallPalProcStatic on Itanium-based\r
+/// architecture.\r
+///\r
+/// Copyright (c) 2006, Intel Corporation\r
+/// All rights reserved. This program and the accompanying materials\r
+/// are licensed and made available under the terms and conditions of the BSD License\r
+/// which accompanies this distribution. The full text of the license may be found at\r
+/// http://opensource.org/licenses/bsd-license.php\r
+///\r
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+///\r
+/// Module Name: PalCallStatic.s\r
+///\r
+///\r
+\r
+.auto\r
+.text\r
+\r
+.proc PalCallStatic\r
+.type PalCallStatic, @function\r
+.regstk 5, 0, 0, 0\r
+PalCallStatic::\r
+ cmp.eq p6 = r0, in0\r
+ mov r31 = in4\r
+ mov r8 = ip\r
+(p6) mov in0 = ar.k5\r
+ add r8 = (PalProcReturn - PalCallStatic), r8\r
+ mov in4 = b0\r
+ mov r30 = in3\r
+ mov r29 = in2\r
+ mov b7 = in0\r
+ mov in3 = psr\r
+ rsm 1 << 14 // Disable interrupts\r
+ mov r28 = in1\r
+ mov in0 = 256\r
+ mov b0 = r8\r
+ br.cond.sptk b7\r
+PalProcReturn:\r
+ mov psr.l = in3\r
+ cmp.eq p6 = in0, in1 // in1 == PAL_COPY_PAL?\r
+(p6) cmp.eq p6 = r0, r8 // Status == Success?\r
+(p6) add in2 = r9, in2\r
+(p6) mov ar.k5 = in2\r
+ mov b0 = in4\r
+ br.ret.sptk.many b0\r
+.endp PalCallStatic\r
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