[PcdsFeatureFlag.common]
[PcdsFixedAtBuild.common]
- gArmEbTokenSpaceGuid.PcdConsoleUart|0x12345678|UINT32|0x00000202
+ gArmEbTokenSpaceGuid.PcdConsoleUartBase|0x10009000|UINT32|0x00000001
+ gArmEbTokenSpaceGuid.PcdGdbUartBase|0x1000a000|UINT32|0x00000002
SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf
- RealTimeClockLib|EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf
+ RealTimeClockLib|ArmEbPkg/Library/RealTimeClockLib/RealTimeClockLib.inf
IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
+ DebugAgentTimerLib|ArmEbPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf
SerialPortLib|ArmEbPkg/Library/SerialPortLib/SerialPortLib.inf
TimerLib|ArmEbPkg/Library/TimerLib/TimerLib.inf
GdbSerialLib|ArmEbPkg/Library/GdbSerialLib/GdbSerialLib.inf
+
[LibraryClasses.common.SEC]
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
# 1/123 faster than Stm or Vstm version
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+ # Uncomment to turn on GDB stub in SEC.
+ #DebugAgentLib|EmbeddedPkg/Library/GdbDebugAgent/GdbDebugAgent.inf
+
[LibraryClasses.common.DXE_CORE]
HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
#
gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000
+ #
+ # ARM EB PCDS
+ #
+ gArmEbTokenSpaceGuid.PcdConsoleUartBase|0x10009000
+ gArmEbTokenSpaceGuid.PcdGdbUartBase|0x1000a000
+
+
################################################################################
#
# Components Section - list of all EDK II Modules needed by this Platform
--- /dev/null
+/** @file\r
+ Template for ArmEb DebugAgentLib. \r
+\r
+ For ARM we reserve FIQ for the Debug Agent Timer. We don't care about \r
+ laytency as we only really need the timer to run a few times a second \r
+ (how fast can some one type a ctrl-c?), but it works much better if\r
+ the interrupt we are using to break into the debugger is not being\r
+ used, and masked, by the system. \r
+\r
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
+ \r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <Base.h>\r
+\r
+#include <Library/DebugAgentTimerLib.h>\r
+\r
+#include <ArmEb/ArmEb.h>\r
+\r
+\r
+/**\r
+ Setup all the hardware needed for the debug agents timer.\r
+\r
+ This function is used to set up debug enviroment. \r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+DebugAgentTimerIntialize (\r
+ VOID\r
+ )\r
+{\r
+ // Map Timer to FIQ\r
+}\r
+ \r
+ \r
+/**\r
+ Set the period for the debug agent timer. Zero means disable the timer.\r
+\r
+ @param[in] TimerPeriodMilliseconds Frequency of the debug agent timer.\r
+\r
+**/ \r
+VOID\r
+EFIAPI\r
+DebugAgentTimerSetPeriod (\r
+ IN UINT32 TimerPeriodMilliseconds\r
+ )\r
+{\r
+ if (TimerPeriodMilliseconds == 0) {\r
+ // Disable timer and Disable FIQ\r
+ return;\r
+ } \r
+\r
+ // Set timer period and unmask FIQ\r
+}\r
+ \r
+\r
+/**\r
+ Perform End Of Interrupt for the debug agent timer. This is called in the \r
+ interrupt handler after the interrupt has been processed. \r
+\r
+**/ \r
+VOID\r
+EFIAPI\r
+DebugAgentTimerEndOfInterrupt (\r
+ VOID\r
+ )\r
+{\r
+ // EOI Timer interrupt for FIQ\r
+}\r
+ \r
+
\ No newline at end of file
--- /dev/null
+#/** @file\r
+# Component description file for Base PCI Cf8 Library.\r
+#\r
+# PCI CF8 Library that uses I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles.\r
+# Layers on top of an I/O Library instance.\r
+# Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = ArmEbDebugAgentTimerLib\r
+ FILE_GUID = 80949BBB-68EE-4a4c-B434-D5DB5A232F0C\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = DebugAgentTimerLib|SEC BASE DXE_CORE\r
+\r
+\r
+[Sources.common]\r
+ DebugAgentTimerLib.c\r
+\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+ ArmEbPkg/ArmEbPkg.dec\r
+\r
+[LibraryClasses]\r
+ IoLib\r
+\r
#include <Library/GdbSerialLib.h>
#include <Library/PcdLib.h>
#include <Library/IoLib.h>
-#include <Library/DebugLib.h>
+
#include <ArmEb/ArmEb.h>
RETURN_STATUS
VOID
)
{
- return RETURN_SUCCESS;
+ return GdbSerialInit (115200, 0, 8, 1);
}
RETURN_STATUS
IN UINT8 StopBits
)
{
- return RETURN_SUCCESS;
+ if ((Parity != 0) || (DataBits != 8) || (StopBits != 1)) {
+ return RETURN_UNSUPPORTED;
+ }
+
+ if (BaudRate != 115200) {
+ // Could add support for different Baud rates....
+ return RETURN_UNSUPPORTED;
+ }
+
+ UINT32 Base = PcdGet32 (PcdGdbUartBase);\r
+ \r
+ // initialize baud rate generator to 115200 based on EB clock REFCLK24MHZ\r
+ MmioWrite32 (Base + UARTIBRD, UART_115200_IDIV);\r
+ MmioWrite32 (Base + UARTFBRD, UART_115200_FDIV);\r
+\r
+ // no parity, 1 stop, no fifo, 8 data bits\r
+ MmioWrite32 (Base + UARTLCR_H, 0x60);\r
+\r
+ // clear any pending errors\r
+ MmioWrite32 (Base + UARTECR, 0);\r
+\r
+ // enable tx, rx, and uart overall\r
+ MmioWrite32 (Base + UARTCR, 0x301);\r
+\r
+ return RETURN_SUCCESS;\r
}
BOOLEAN
VOID
)
{
- return FALSE;
+ UINT32 FR = PcdGet32 (PcdGdbUartBase) + UARTFR;\r
+\r
+ if ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0) {\r
+ return TRUE;\r
+ } else {\r
+ return FALSE;\r
+ }\r
}
CHAR8
VOID
)
{
- return (CHAR8)0;
+ UINT32 FR = PcdGet32 (PcdGdbUartBase) + UARTFR;\r
+ UINT32 DR = PcdGet32 (PcdGdbUartBase) + UARTDR;\r
+ \r
+ while ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0);\r
+ return MmioRead8 (DR);\r
}
VOID
IN CHAR8 Char
)
{
+ UINT32 FR = PcdGet32 (PcdGdbUartBase) + UARTFR;\r
+ UINT32 DR = PcdGet32 (PcdGdbUartBase) + UARTDR;\r
+\r
+ while ((MmioRead32 (FR) & UART_TX_EMPTY_FLAG_MASK) != 0);\r
+ MmioWrite8 (DR, Char);\r
return;
}
DebugLib
IoLib
+[FixedPcd]\r
+ gArmEbTokenSpaceGuid.PcdGdbUartBase
\ No newline at end of file
--- /dev/null
+/** @file\r
+ Implement EFI RealTimeClock runtime services via RTC Lib.\r
+ \r
+ Currently this driver does not support runtime virtual calling.\r
+\r
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
+ \r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <PiDxe.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/RealTimeClockLib.h>\r
+\r
+\r
+/**\r
+ Returns the current time and date information, and the time-keeping capabilities\r
+ of the hardware platform.\r
+\r
+ @param Time A pointer to storage to receive a snapshot of the current time.\r
+ @param Capabilities An optional pointer to a buffer to receive the real time clock\r
+ device's capabilities.\r
+\r
+ @retval EFI_SUCCESS The operation completed successfully.\r
+ @retval EFI_INVALID_PARAMETER Time is NULL.\r
+ @retval EFI_DEVICE_ERROR The time could not be retrieved due to hardware error.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+LibGetTime (\r
+ OUT EFI_TIME *Time,\r
+ OUT EFI_TIME_CAPABILITIES *Capabilities\r
+ )\r
+{\r
+ //\r
+ // Fill in Time and Capabilities via data from you RTC\r
+ //\r
+ return EFI_DEVICE_ERROR;\r
+}\r
+\r
+\r
+/**\r
+ Sets the current local time and date information.\r
+\r
+ @param Time A pointer to the current time.\r
+\r
+ @retval EFI_SUCCESS The operation completed successfully.\r
+ @retval EFI_INVALID_PARAMETER A time field is out of range.\r
+ @retval EFI_DEVICE_ERROR The time could not be set due due to hardware error.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+LibSetTime (\r
+ IN EFI_TIME *Time\r
+ )\r
+{\r
+ //\r
+ // Use Time, to set the time in your RTC hardware\r
+ //\r
+ return EFI_DEVICE_ERROR;\r
+}\r
+\r
+\r
+/**\r
+ Returns the current wakeup alarm clock setting.\r
+\r
+ @param Enabled Indicates if the alarm is currently enabled or disabled.\r
+ @param Pending Indicates if the alarm signal is pending and requires acknowledgement.\r
+ @param Time The current alarm setting.\r
+\r
+ @retval EFI_SUCCESS The alarm settings were returned.\r
+ @retval EFI_INVALID_PARAMETER Any parameter is NULL.\r
+ @retval EFI_DEVICE_ERROR The wakeup time could not be retrieved due to a hardware error.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+LibGetWakeupTime (\r
+ OUT BOOLEAN *Enabled,\r
+ OUT BOOLEAN *Pending,\r
+ OUT EFI_TIME *Time\r
+ )\r
+{\r
+ // Not a required feature\r
+ return EFI_UNSUPPORTED;\r
+}\r
+\r
+\r
+/**\r
+ Sets the system wakeup alarm clock time.\r
+\r
+ @param Enabled Enable or disable the wakeup alarm.\r
+ @param Time If Enable is TRUE, the time to set the wakeup alarm for.\r
+\r
+ @retval EFI_SUCCESS If Enable is TRUE, then the wakeup alarm was enabled. If\r
+ Enable is FALSE, then the wakeup alarm was disabled.\r
+ @retval EFI_INVALID_PARAMETER A time field is out of range.\r
+ @retval EFI_DEVICE_ERROR The wakeup time could not be set due to a hardware error.\r
+ @retval EFI_UNSUPPORTED A wakeup timer is not supported on this platform.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+LibSetWakeupTime (\r
+ IN BOOLEAN Enabled,\r
+ OUT EFI_TIME *Time\r
+ )\r
+{\r
+ // Not a required feature\r
+ return EFI_UNSUPPORTED;\r
+}\r
+\r
+\r
+\r
+/**\r
+ This is the declaration of an EFI image entry point. This can be the entry point to an application\r
+ written to this specification, an EFI boot service driver, or an EFI runtime driver.\r
+\r
+ @param ImageHandle Handle that identifies the loaded image.\r
+ @param SystemTable System Table for this image.\r
+\r
+ @retval EFI_SUCCESS The operation completed successfully.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+LibRtcInitialize (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ )\r
+{\r
+ //\r
+ // Do some initialization if reqruied to turn on the RTC\r
+ //\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+\r
+/**\r
+ Fixup internal data so that EFI can be call in virtual mode.\r
+ Call the passed in Child Notify event and convert any pointers in\r
+ lib to virtual mode.\r
+\r
+ @param[in] Event The Event that is being processed\r
+ @param[in] Context Event Context\r
+**/\r
+VOID\r
+EFIAPI\r
+LibRtcVirtualNotifyEvent (\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
+ )\r
+{\r
+ //\r
+ // Only needed if you are going to support the OS calling RTC functions in virtual mode.\r
+ // You will need to call EfiConvertPointer (). To convert any stored physical addresses \r
+ // to virtual address. After the OS transistions to calling in virtual mode, all future\r
+ // runtime calls will be made in virtual mode.\r
+ //\r
+ return;\r
+}\r
+\r
+\r
+\r
--- /dev/null
+#/** @file\r
+# Memory Status Code Library for UEFI drivers\r
+#\r
+# Lib to provide memory journal status code reporting Routines\r
+# Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = ArmEbRealTimeClockLib\r
+ FILE_GUID = 470DFB96-E205-4515-A75E-2E60F853E79D\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = RealTimeClockLib\r
+\r
+\r
+[Sources.common]\r
+ RealTimeClockLib.c\r
+\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+\r
+[LibraryClasses]\r
+ IoLib\r
+ DebugLib\r
+
\ No newline at end of file
case EfiResetCold:\r
case EfiResetShutdown:\r
default:\r
+ CpuDeadLoop ();\r
break;\r
}\r
\r
**/\r
\r
#include <Base.h>\r
-#include <Library/DebugLib.h>\r
#include <Library/SerialPortLib.h>\r
#include <Library/PcdLib.h>\r
#include <Library/IoLib.h>\r
VOID\r
)\r
{\r
- UINT32 Base = PcdGet32 (PcdConsoleUart);\r
+ UINT32 Base = PcdGet32 (PcdConsoleUartBase);\r
\r
// initialize baud rate generator to 115200 based on EB clock REFCLK24MHZ\r
MmioWrite32 (Base + UARTIBRD, UART_115200_IDIV);\r
IN UINTN NumberOfBytes\r
)\r
{\r
- UINT32 FR = PcdGet32(PcdConsoleUart) + UARTFR;\r
- UINT32 DR = PcdGet32(PcdConsoleUart) + UARTDR;\r
+ UINT32 FR = PcdGet32 (PcdConsoleUartBase) + UARTFR;\r
+ UINT32 DR = PcdGet32 (PcdConsoleUartBase) + UARTDR;\r
UINTN Count;\r
\r
for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {\r
IN UINTN NumberOfBytes\r
)\r
{\r
- UINT32 FR = PcdGet32(PcdConsoleUart) + UARTFR;\r
- UINT32 DR = PcdGet32(PcdConsoleUart) + UARTDR;\r
+ UINT32 FR = PcdGet32 (PcdConsoleUartBase) + UARTFR;\r
+ UINT32 DR = PcdGet32 (PcdConsoleUartBase) + UARTDR;\r
UINTN Count;\r
\r
for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {\r
VOID\r
)\r
{\r
- UINT32 FR = PcdGet32(PcdConsoleUart) + UARTFR;\r
+ UINT32 FR = PcdGet32 (PcdConsoleUartBase) + UARTFR;\r
\r
if ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0) {\r
return TRUE;\r
SerialPortLib.c\r
\r
[LibraryClasses]\r
- DebugLib\r
IoLib\r
\r
[Packages]\r
ArmEbPkg/ArmEbPkg.dec\r
\r
[FixedPcd]\r
- gArmEbTokenSpaceGuid.PcdConsoleUart\r
+ gArmEbTokenSpaceGuid.PcdConsoleUartBase\r
\r
/** @file\r
+ TimerLib for ARM EB. Hardcoded to 100ns period\r
+\r
+ This library assume the following initialization, usually done in SEC. \r
+\r
+ // configure SP810 to use 1MHz clock and disable\r
+ MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);\r
+ // Enable\r
+ MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER2_EN);\r
+\r
+ // configure timer 2 for one shot operation, 32 bits, no prescaler, and interrupt disabled\r
+ MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ONESHOT | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);\r
+\r
+ // preload the timer count register\r
+ MmioWrite32 (EB_SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, 1);\r
+\r
+ // enable the timer\r
+ MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);\r
+\r
\r
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
\r
#include <Library/PcdLib.h>\r
#include <Library/IoLib.h>\r
\r
+#include <ArmEb/ArmEb.h>\r
+\r
+\r
+/**\r
+ Stalls the CPU for at least the given number of microseconds.\r
\r
+ Stalls the CPU for the number of microseconds specified by MicroSeconds.\r
+\r
+ @param MicroSeconds The minimum number of microseconds to delay.\r
+\r
+ @return The value of MicroSeconds inputted.\r
+\r
+**/\r
UINTN\r
EFIAPI\r
MicroSecondDelay (\r
return MicroSeconds;\r
}\r
\r
+/**\r
+ Stalls the CPU for at least the given number of nanoseconds.\r
+\r
+ Stalls the CPU for the number of nanoseconds specified by NanoSeconds.\r
+\r
+ @param NanoSeconds The minimum number of nanoseconds to delay.\r
+\r
+ @return The value of NanoSeconds inputted.\r
+\r
+**/\r
UINTN\r
EFIAPI\r
NanoSecondDelay (\r
IN UINTN NanoSeconds\r
)\r
{\r
- UINT32 Delay;\r
- UINT32 StartTime;\r
- UINT32 CurrentTime;\r
- UINT32 ElapsedTime;\r
+ UINT32 TickNumber;\r
\r
- \r
- Delay = (NanoSeconds / PcdGet32(PcdEmbeddedPerformanceCounterPeriodInNanoseconds)) + 1;\r
+ if (NanoSeconds == 0) {\r
+ return NanoSeconds;\r
+ }\r
\r
- StartTime = MmioRead32 (0);\r
- do \r
- {\r
- CurrentTime = 0ULL;\r
- ElapsedTime = CurrentTime - StartTime;\r
- } while (ElapsedTime < Delay);\r
+ // Round up to 100ns Tick Number\r
+ TickNumber = (UINT32)NanoSeconds / 100;\r
+ TickNumber += ((UINT32)NanoSeconds % 100) == 0 ? 0 : 1;\r
\r
- NanoSeconds = ElapsedTime * PcdGet32 (PcdEmbeddedPerformanceCounterPeriodInNanoseconds);\r
+ // load the timer count register\r
+ MmioWrite32 (EB_SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, TickNumber);\r
\r
+ while (MmioRead32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CURRENT_REG) > 0) {\r
+ ;\r
+ } \r
+ \r
return NanoSeconds;\r
}\r
\r
+/**\r
+ Retrieves the current value of a 64-bit free running performance counter.\r
+\r
+ The counter can either count up by 1 or count down by 1. If the physical\r
+ performance counter counts by a larger increment, then the counter values\r
+ must be translated. The properties of the counter can be retrieved from\r
+ GetPerformanceCounterProperties().\r
+\r
+ @return The current value of the free running performance counter.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
GetPerformanceCounter (\r
VOID\r
)\r
{ \r
+ // Free running 64-bit/32-bit counter is needed here.\r
+ // Don't think we need this to boot, just to do performance profile\r
+ ASSERT (FALSE);\r
return (UINT64)0ULL;\r
}\r
\r
+\r
+/**\r
+ Retrieves the 64-bit frequency in Hz and the range of performance counter\r
+ values.\r
+\r
+ If StartValue is not NULL, then the value that the performance counter starts\r
+ with immediately after is it rolls over is returned in StartValue. If\r
+ EndValue is not NULL, then the value that the performance counter end with\r
+ immediately before it rolls over is returned in EndValue. The 64-bit\r
+ frequency of the performance counter in Hz is always returned. If StartValue\r
+ is less than EndValue, then the performance counter counts up. If StartValue\r
+ is greater than EndValue, then the performance counter counts down. For\r
+ example, a 64-bit free running counter that counts up would have a StartValue\r
+ of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter\r
+ that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.\r
+\r
+ @param StartValue The value the performance counter starts with when it\r
+ rolls over.\r
+ @param EndValue The value that the performance counter ends with before\r
+ it rolls over.\r
+\r
+ @return The frequency in Hz.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
GetPerformanceCounterProperties (\r
*EndValue = 0xFFFFFFFF;\r
}\r
\r
- return PcdGet64(PcdEmbeddedPerformanceCounterFrequencyInHz);\r
+ return 100;\r
}\r
+\r
+\r
#include <Library/IoLib.h>\r
#include <Library/ArmLib.h>\r
#include <Library/PeCoffGetEntryPointLib.h>\r
+#include <Library/DebugAgentLib.h>\r
\r
#include <Ppi/GuidedSectionExtraction.h>\r
#include <Guid/LzmaDecompress.h>\r
\r
+#include <ArmEb/ArmEb.h>\r
+\r
#include "LzmaDecompress.h"\r
\r
VOID\r
SerialPortInitialize ();\r
}\r
\r
+VOID\r
+TimerInit (\r
+ VOID\r
+ )\r
+{\r
+ // configure SP810 to use 1MHz clock and disable\r
+ MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);\r
+ // Enable\r
+ MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER2_EN);\r
+\r
+ // configure timer 2 for one shot operation, 32 bits, no prescaler, and interrupt disabled\r
+ MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ONESHOT | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);\r
+\r
+ // preload the timer count register\r
+ MmioWrite32 (EB_SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, 1);\r
+\r
+ // enable the timer\r
+ MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);\r
+}\r
+\r
+\r
VOID\r
InitCache (\r
IN UINT32 MemoryBase,\r
VOID\r
);\r
\r
-/**\r
- If the build is done on cygwin the paths are cygpaths. \r
- /cygdrive/c/tmp.txt vs c:\tmp.txt so we need to convert\r
- them to work with RVD commands\r
-\r
- This is just code to help print out RVD symbol load command.\r
- If you build with cygwin paths aren't compatible with RVD.\r
-\r
- @param Name Path to convert if needed\r
-\r
-**/\r
-CHAR8 *\r
-SecDeCygwinPathIfNeeded (\r
- IN CHAR8 *Name\r
- )\r
-{\r
- CHAR8 *Ptr;\r
- UINTN Index;\r
- UINTN Len;\r
- \r
- Ptr = AsciiStrStr (Name, "/cygdrive/");\r
- if (Ptr == NULL) {\r
- return Name;\r
- }\r
- \r
- Len = AsciiStrLen (Ptr);\r
- \r
- // convert "/cygdrive" to spaces\r
- for (Index = 0; Index < 9; Index++) {\r
- Ptr[Index] = ' ';\r
- }\r
-\r
- // convert /c to c:\r
- Ptr[9] = Ptr[10];\r
- Ptr[10] = ':';\r
- \r
- // switch path seperators\r
- for (Index = 11; Index < Len; Index++) {\r
- if (Ptr[Index] == '/') {\r
- Ptr[Index] = '\\' ;\r
- }\r
- }\r
-\r
- return Name;\r
-}\r
-\r
\r
VOID\r
CEntryPoint (\r
\r
// Start talking\r
UartInit ();\r
- DEBUG ((EFI_D_ERROR, "UART Enabled\n"));\r
\r
- DEBUG_CODE_BEGIN ();\r
- //\r
- // On a debug build print out information about the SEC. This is really info about\r
- // the PE/COFF file we are currently running from. Useful for loading symbols in a\r
- // debugger. Remember our image is really part of the FV.\r
- //\r
- RETURN_STATUS Status;\r
- EFI_PEI_FV_HANDLE VolumeHandle;\r
- EFI_PEI_FILE_HANDLE FileHandle;\r
- VOID *PeCoffImage;\r
- UINT32 Offset;\r
- CHAR8 *FilePath;\r
- FfsAnyFvFindFirstFile (EFI_FV_FILETYPE_SECURITY_CORE, &VolumeHandle, &FileHandle);\r
- Status = FfsFindSectionData (EFI_SECTION_TE, FileHandle, &PeCoffImage);\r
- if (EFI_ERROR (Status)) {\r
- // Usually is a TE (PI striped down PE/COFF), but could be a full PE/COFF\r
- Status = FfsFindSectionData (EFI_SECTION_PE32, FileHandle, &PeCoffImage);\r
- }\r
- if (!EFI_ERROR (Status)) {\r
- Offset = PeCoffGetSizeOfHeaders (PeCoffImage);\r
- FilePath = PeCoffLoaderGetPdbPointer (PeCoffImage);\r
- if (FilePath != NULL) {\r
- \r
- // \r
- // In general you should never have to use #ifdef __CC_ARM in the code. It\r
- // is hidden in the away in the MdePkg. But here we would like to print differnt things\r
- // for different toolchains. \r
- //\r
-#ifdef __CC_ARM\r
- // Print out the command for the RVD debugger to load symbols for this image\r
- DEBUG ((EFI_D_ERROR, "load /a /ni /np %a &0x%08x\n", SecDeCygwinPathIfNeeded (FilePath), (CHAR8 *)PeCoffImage + Offset));\r
-#elif __GNUC__\r
- // This may not work correctly if you generate PE/COFF directlyas then the Offset would not be required\r
- DEBUG ((EFI_D_ERROR, "add-symbol-file %a 0x%08x\n", FilePath, PeCoffImage + Offset));\r
-#else\r
- DEBUG ((EFI_D_ERROR, "SEC starts at 0x%08x with an entry point at 0x%08x %a\n", PeCoffImage, _ModuleEntryPoint, FilePath));\r
-#endif\r
- }\r
- }\r
-\r
- \r
- DEBUG_CODE_END ();\r
+ InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL);\r
+ SaveAndSetDebugTimerInterrupt (TRUE);\r
+\r
+ DEBUG ((EFI_D_ERROR, "UART Enabled\n"));\r
\r
+ // Start up a free running timer so that the timer lib will work\r
+ TimerInit ();\r
\r
// SEC phase needs to run library constructors by hand.\r
ExtractGuidedSectionLibConstructor ();\r
EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
+ ArmEbPkg/ArmEbPkg.dec
+
[LibraryClasses]
BaseLib
ExtractGuidedSectionLib
LzmaDecompressLib
PeCoffGetEntryPointLib
+ DebugAgentLib
+
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
projects / mirror_edk2.git / commitdiff