Prior to this change if Metronome timer was already initialized the initialization of the
Performance timer was skipped.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15577
6f19259b-4bc3-4df7-8a09-
765794883524
/** @file\r
\r
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
/** @file\r
\r
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
- Copyright (c) 2011, ARM Limited. All rights reserved.\r
- \r
+ Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.\r
+\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
)\r
{\r
// Check if the Metronome Timer is already initialized\r
)\r
{\r
// Check if the Metronome Timer is already initialized\r
- if (MmioRead32(SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {\r
- return RETURN_SUCCESS;\r
- } else {\r
+ if ((MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) == 0) {\r
// Configure the Metronome Timer for free running operation, 32 bits, no prescaler, and interrupt disabled\r
MmioWrite32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);\r
\r
// Configure the Metronome Timer for free running operation, 32 bits, no prescaler, and interrupt disabled\r
MmioWrite32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);\r
\r
}\r
\r
// Check if the Performance Timer is already initialized\r
}\r
\r
// Check if the Performance Timer is already initialized\r
- if (MmioRead32(SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {\r
- return RETURN_SUCCESS;\r
- } else {\r
+ if ((MmioRead32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) == 0) {\r
// Configure the Performance timer for free running operation, 32 bits, no prescaler, interrupt disabled\r
MmioWrite32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);\r
\r
// Configure the Performance timer for free running operation, 32 bits, no prescaler, interrupt disabled\r
MmioWrite32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);\r
\r