Add GCC assember for DxeIpl module

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7395 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/DuetPkg/DxeIpl/Ia32/CpuIoAccessGnu.c b/DuetPkg/DxeIpl/Ia32/CpuIoAccessGnu.c
new file mode 100644 (file)
index 0000000..8e9ee2a
--- /dev/null
+++ b/DuetPkg/DxeIpl/Ia32/CpuIoAccessGnu.c
@@ -0,0 +1,27 @@
+UINT8\r
+EFIAPI\r
+CpuIoRead8 (\r
+  IN  UINT16  Port\r
+  )\r
+{\r
+  UINT8     Data;\r
+  asm ( "inb %1, %0"\r
+      : "=a"(Data)\r
+      : "d"(Port)\r
+      );\r
+  return Data;\r
+}\r
+\r
+VOID\r
+EFIAPI\r
+CpuIoWrite8 (\r
+  IN  UINT16  Port,\r
+  IN  UINT32  Data\r
+  )\r
+{\r
+  asm ( "outb %1, %0"\r
+      : /* No outputs */\r
+      : "d"(Port)\r
+      , "a"((UINT8)Data)\r
+      );\r
+}
\ No newline at end of file

diff --git a/DuetPkg/DxeIpl/Ia32/EnterDxeCoreGnu.c b/DuetPkg/DxeIpl/Ia32/EnterDxeCoreGnu.c
new file mode 100644 (file)
index 0000000..c502f84
--- /dev/null
+++ b/DuetPkg/DxeIpl/Ia32/EnterDxeCoreGnu.c
@@ -0,0 +1,16 @@
+VOID\r
+EnterDxeMain (\r
+  IN VOID *StackTop,\r
+  IN VOID *DxeCoreEntryPoint,\r
+  IN VOID *Hob,\r
+  IN VOID *PageTable\r
+  )\r
+{\r
+  __asm__ ( "movl  %0, %%esp \n\t"\r
+            "pushl %2 \n\t"\r
+            "pushl $0 \n\t"\r
+            "movl  %1, %%ecx \n\t"\r
+            "jmp  %%ecx"\r
+            ::"q"(StackTop), "q"(DxeCoreEntryPoint), "q"(Hob)\r
+          );\r
+}  
\ No newline at end of file