/** @file\r
Main file for Pci shell Debug1 function.\r
\r
- Copyright (c) 2013 Hewlett-Packard Development Company, L.P.\r
+ (C) Copyright 2013-2014 Hewlett-Packard Development Company, L.P.\r
Copyright (c) 2005 - 2014, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
#include <IndustryStandard/Acpi.h>\r
#include "Pci.h"\r
\r
-#define PCI_CLASS_STRING_LIMIT 54\r
//\r
// Printable strings for Pci class code\r
//\r
PCI_CLASS_ENTRY PCISubClass_0f[];\r
PCI_CLASS_ENTRY PCISubClass_10[];\r
PCI_CLASS_ENTRY PCISubClass_11[];\r
+PCI_CLASS_ENTRY PCISubClass_12[];\r
+PCI_CLASS_ENTRY PCISubClass_13[];\r
+PCI_CLASS_ENTRY PCIPIFClass_0100[];\r
PCI_CLASS_ENTRY PCIPIFClass_0101[];\r
+PCI_CLASS_ENTRY PCIPIFClass_0105[];\r
+PCI_CLASS_ENTRY PCIPIFClass_0106[];\r
+PCI_CLASS_ENTRY PCIPIFClass_0107[];\r
+PCI_CLASS_ENTRY PCIPIFClass_0108[];\r
+PCI_CLASS_ENTRY PCIPIFClass_0109[];\r
PCI_CLASS_ENTRY PCIPIFClass_0300[];\r
PCI_CLASS_ENTRY PCIPIFClass_0604[];\r
+PCI_CLASS_ENTRY PCIPIFClass_0609[];\r
+PCI_CLASS_ENTRY PCIPIFClass_060b[];\r
PCI_CLASS_ENTRY PCIPIFClass_0700[];\r
PCI_CLASS_ENTRY PCIPIFClass_0701[];\r
PCI_CLASS_ENTRY PCIPIFClass_0703[];\r
PCI_CLASS_ENTRY PCIPIFClass_0904[];\r
PCI_CLASS_ENTRY PCIPIFClass_0c00[];\r
PCI_CLASS_ENTRY PCIPIFClass_0c03[];\r
+PCI_CLASS_ENTRY PCIPIFClass_0c07[];\r
+PCI_CLASS_ENTRY PCIPIFClass_0d01[];\r
PCI_CLASS_ENTRY PCIPIFClass_0e00[];\r
\r
//\r
L"Data Acquisition & Signal Processing Controllers",\r
PCISubClass_11\r
},\r
+ {\r
+ 0x12,\r
+ L"Processing Accelerators",\r
+ PCISubClass_12\r
+ },\r
+ {\r
+ 0x13,\r
+ L"Non-Essential Instrumentation",\r
+ PCISubClass_13\r
+ },\r
{\r
0xff,\r
L"Device does not fit in any defined classes",\r
PCI_CLASS_ENTRY PCISubClass_01[] = {\r
{\r
0x00,\r
- L"SCSI controller",\r
- PCIBlankEntry\r
+ L"SCSI",\r
+ PCIPIFClass_0100\r
},\r
{\r
0x01,\r
L"RAID controller",\r
PCIBlankEntry\r
},\r
+ {\r
+ 0x05,\r
+ L"ATA controller with ADMA interface",\r
+ PCIPIFClass_0105\r
+ },\r
+ {\r
+ 0x06,\r
+ L"Serial ATA controller",\r
+ PCIPIFClass_0106\r
+ },\r
+ {\r
+ 0x07,\r
+ L"Serial Attached SCSI (SAS) controller ",\r
+ PCIPIFClass_0107\r
+ },\r
+ {\r
+ 0x08,\r
+ L"Non-volatile memory subsystem",\r
+ PCIPIFClass_0108\r
+ },\r
+ {\r
+ 0x09,\r
+ L"Universal Flash Storage (UFS) controller ",\r
+ PCIPIFClass_0109\r
+ },\r
{\r
0x80,\r
L"Other mass storage controller",\r
L"ISDN controller",\r
PCIBlankEntry\r
},\r
+ {\r
+ 0x05,\r
+ L"WorldFip controller",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x06,\r
+ L"PICMG 2.14 Multi Computing",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x07,\r
+ L"InfiniBand controller",\r
+ PCIBlankEntry\r
+ },\r
{\r
0x80,\r
L"Other network controller",\r
L"Computer Telephony device",\r
PCIBlankEntry\r
},\r
+ {\r
+ 0x03,\r
+ L"Mixed mode device",\r
+ PCIBlankEntry\r
+ },\r
{\r
0x80,\r
L"Other multimedia device",\r
L"RACEway bridge",\r
PCIBlankEntry\r
},\r
+ {\r
+ 0x09,\r
+ L"Semi-transparent PCI-to-PCI bridge",\r
+ PCIPIFClass_0609\r
+ },\r
+ {\r
+ 0x0A,\r
+ L"InfiniBand-to-PCI host bridge",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x0B,\r
+ L"Advanced Switching to PCI host bridge",\r
+ PCIPIFClass_060b\r
+ },\r
{\r
0x80,\r
L"Other bridge type",\r
L"Modem",\r
PCIPIFClass_0703\r
},\r
+ {\r
+ 0x04,\r
+ L"GPIB (IEEE 488.1/2) controller",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x05,\r
+ L"Smart Card",\r
+ PCIBlankEntry\r
+ },\r
{\r
0x80,\r
L"Other communication device",\r
L"Generic PCI Hot-Plug controller",\r
PCIBlankEntry\r
},\r
+ {\r
+ 0x05,\r
+ L"SD Host controller",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x06,\r
+ L"IOMMU",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x07,\r
+ L"Root Complex Event Collector",\r
+ PCIBlankEntry\r
+ },\r
{\r
0x80,\r
L"Other system peripheral",\r
PCI_CLASS_ENTRY PCISubClass_0c[] = {\r
{\r
0x00,\r
- L"Firewire(IEEE 1394)",\r
- PCIPIFClass_0c03\r
+ L"IEEE 1394",\r
+ PCIPIFClass_0c00\r
},\r
{\r
0x01,\r
{\r
0x03,\r
L"USB",\r
- PCIPIFClass_0c00\r
+ PCIPIFClass_0c03\r
},\r
{\r
0x04,\r
L"System Management Bus",\r
PCIBlankEntry\r
},\r
+ {\r
+ 0x06,\r
+ L"InfiniBand",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x07,\r
+ L"IPMI",\r
+ PCIPIFClass_0c07\r
+ },\r
+ {\r
+ 0x08,\r
+ L"SERCOS Interface Standard (IEC 61491)",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x09,\r
+ L"CANbus",\r
+ PCIBlankEntry\r
+ },\r
{\r
0x80,\r
L"Other bus type",\r
},\r
{\r
0x01,\r
- L"Consumer IR controller",\r
- PCIBlankEntry\r
+ L"",\r
+ PCIPIFClass_0d01\r
},\r
{\r
0x10,\r
L"RF controller",\r
PCIBlankEntry\r
},\r
+ {\r
+ 0x11,\r
+ L"Bluetooth",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x12,\r
+ L"Broadband",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x20,\r
+ L"Ethernet (802.11a \96 5 GHz)",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x21,\r
+ L"Ethernet (802.11b \96 2.4 GHz)",\r
+ PCIBlankEntry\r
+ },\r
{\r
0x80,\r
L"Other type of wireless controller",\r
\r
PCI_CLASS_ENTRY PCISubClass_0f[] = {\r
{\r
- 0x00,\r
+ 0x01,\r
L"TV",\r
PCIBlankEntry\r
},\r
{\r
- 0x01,\r
+ 0x02,\r
L"Audio",\r
PCIBlankEntry\r
},\r
{\r
- 0x02,\r
+ 0x03,\r
L"Voice",\r
PCIBlankEntry\r
},\r
{\r
- 0x03,\r
+ 0x04,\r
L"Data",\r
PCIBlankEntry\r
},\r
+ {\r
+ 0x80,\r
+ L"Other satellite communication controller",\r
+ PCIBlankEntry\r
+ },\r
{\r
0x00,\r
NULL,\r
L"DPIO modules",\r
PCIBlankEntry\r
},\r
+ {\r
+ 0x01,\r
+ L"Performance Counters",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x10,\r
+ L"Communications synchronization plus time and frequency test/measurement ",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x20,\r
+ L"Management card",\r
+ PCIBlankEntry\r
+ },\r
{\r
0x80,\r
L"Other DAQ & SP controllers",\r
}\r
};\r
\r
+PCI_CLASS_ENTRY PCISubClass_12[] = {\r
+ {\r
+ 0x00,\r
+ L"Processing Accelerator",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x00,\r
+ NULL,\r
+ /* null string ends the list */NULL\r
+ }\r
+};\r
+\r
+PCI_CLASS_ENTRY PCISubClass_13[] = {\r
+ {\r
+ 0x00,\r
+ L"Non-Essential Instrumentation Function",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x00,\r
+ NULL,\r
+ /* null string ends the list */NULL\r
+ }\r
+};\r
+\r
//\r
// Programming Interface entries\r
//\r
+PCI_CLASS_ENTRY PCIPIFClass_0100[] = {\r
+ {\r
+ 0x00,\r
+ L"SCSI controller",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x11,\r
+ L"SCSI storage device SOP using PQI",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x12,\r
+ L"SCSI controller SOP using PQI",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x13,\r
+ L"SCSI storage device and controller SOP using PQI",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x21,\r
+ L"SCSI storage device SOP using NVMe",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x00,\r
+ NULL,\r
+ /* null string ends the list */NULL\r
+ }\r
+};\r
+\r
PCI_CLASS_ENTRY PCIPIFClass_0101[] = {\r
{\r
0x00,\r
}\r
};\r
\r
+PCI_CLASS_ENTRY PCIPIFClass_0105[] = {\r
+ {\r
+ 0x20,\r
+ L"Single stepping",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x30,\r
+ L"Continuous operation",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x00,\r
+ NULL,\r
+ /* null string ends the list */NULL\r
+ }\r
+};\r
+\r
+PCI_CLASS_ENTRY PCIPIFClass_0106[] = {\r
+ {\r
+ 0x00,\r
+ L"",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x01,\r
+ L"AHCI",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x02,\r
+ L"Serial Storage Bus",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x00,\r
+ NULL,\r
+ /* null string ends the list */NULL\r
+ }\r
+};\r
+\r
+PCI_CLASS_ENTRY PCIPIFClass_0107[] = {\r
+ {\r
+ 0x00,\r
+ L"",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x01,\r
+ L"Obsolete",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x00,\r
+ NULL,\r
+ /* null string ends the list */NULL\r
+ }\r
+};\r
+\r
+PCI_CLASS_ENTRY PCIPIFClass_0108[] = {\r
+ {\r
+ 0x00,\r
+ L"",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x01,\r
+ L"NVMHCI",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x02,\r
+ L"NVM Express",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x00,\r
+ NULL,\r
+ /* null string ends the list */NULL\r
+ }\r
+};\r
+\r
+PCI_CLASS_ENTRY PCIPIFClass_0109[] = {\r
+ {\r
+ 0x00,\r
+ L"",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x01,\r
+ L"UFSHCI",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x00,\r
+ NULL,\r
+ /* null string ends the list */NULL\r
+ }\r
+};\r
+\r
PCI_CLASS_ENTRY PCIPIFClass_0300[] = {\r
{\r
0x00,\r
}\r
};\r
\r
+PCI_CLASS_ENTRY PCIPIFClass_0609[] = {\r
+ {\r
+ 0x40,\r
+ L"Primary PCI bus side facing the system host processor",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x80,\r
+ L"Secondary PCI bus side facing the system host processor",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x00,\r
+ NULL,\r
+ /* null string ends the list */NULL\r
+ }\r
+};\r
+\r
+PCI_CLASS_ENTRY PCIPIFClass_060b[] = {\r
+ {\r
+ 0x00,\r
+ L"Custom",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x01,\r
+ L"ASI-SIG Defined Portal",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x00,\r
+ NULL,\r
+ /* null string ends the list */NULL\r
+ }\r
+};\r
+\r
PCI_CLASS_ENTRY PCIPIFClass_0700[] = {\r
{\r
0x00,\r
PCI_CLASS_ENTRY PCIPIFClass_0c00[] = {\r
{\r
0x00,\r
- L"Universal Host Controller spec",\r
+ L"",\r
PCIBlankEntry\r
},\r
{\r
0x10,\r
- L"Open Host Controller spec",\r
+ L"Using 1394 OpenHCI spec",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x00,\r
+ NULL,\r
+ /* null string ends the list */NULL\r
+ }\r
+};\r
+\r
+PCI_CLASS_ENTRY PCIPIFClass_0c03[] = {\r
+ {\r
+ 0x00,\r
+ L"UHCI",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x10,\r
+ L"OHCI",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x20,\r
+ L"EHCI",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x30,\r
+ L"xHCI",\r
PCIBlankEntry\r
},\r
{\r
}\r
};\r
\r
-PCI_CLASS_ENTRY PCIPIFClass_0c03[] = {\r
+PCI_CLASS_ENTRY PCIPIFClass_0c07[] = {\r
{\r
0x00,\r
- L"",\r
+ L"SMIC",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x01,\r
+ L"Keyboard Controller Style",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x02,\r
+ L"Block Transfer",\r
+ PCIBlankEntry\r
+ },\r
+ {\r
+ 0x00,\r
+ NULL,\r
+ /* null string ends the list */NULL\r
+ }\r
+};\r
+\r
+PCI_CLASS_ENTRY PCIPIFClass_0d01[] = {\r
+ {\r
+ 0x00,\r
+ L"Consumer IR controller",\r
PCIBlankEntry\r
},\r
{\r
0x10,\r
- L"Using 1394 OpenHCI spec",\r
+ L"UWB Radio controller",\r
PCIBlankEntry\r
},\r
{\r