MdePkg/Include: Update to support SmBios 3.3.0

Update SmBios.h to support SMBIOS 3.3.0 spec.

Bugzilla link,
https://bugzilla.tianocore.org/show_bug.cgi?id=2202

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>

diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/IndustryStandard/SmBios.h
index f3b6f18701001ef71819cbf4d3f6ad6e6d5e782e..f504cc84e70ea480eb76ed6256ac924958fd416b 100644 (file)
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1,8 +1,9 @@
 /** @file\r
-  Industry Standard Definitions of SMBIOS Table Specification v3.2.0.\r
+  Industry Standard Definitions of SMBIOS Table Specification v3.3.0.\r
 \r
 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
 (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>\r
+(C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP<BR>\r
 SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -46,7 +47,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF\r
 \r
 //\r
-// SMBIOS type macros which is according to SMBIOS 2.7 specification.\r
+// SMBIOS type macros which is according to SMBIOS 3.3.0 specification.\r
 //\r
 #define SMBIOS_TYPE_BIOS_INFORMATION                     0\r
 #define SMBIOS_TYPE_SYSTEM_INFORMATION                   1\r
@@ -92,6 +93,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41\r
 #define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42\r
 #define SMBIOS_TYPE_TPM_DEVICE                           43\r
+#define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION     44\r
 \r
 ///\r
 /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r
@@ -727,7 +729,10 @@ typedef enum {
   ProcessorFamilyMII                   = 0x012E,\r
   ProcessorFamilyWinChip               = 0x0140,\r
   ProcessorFamilyDSP                   = 0x015E,\r
-  ProcessorFamilyVideoProcessor        = 0x01F4\r
+  ProcessorFamilyVideoProcessor        = 0x01F4,\r
+  ProcessorFamilyRiscvRV32             = 0x0200,\r
+  ProcessorFamilyRiscVRV64             = 0x0201,\r
+  ProcessorFamilyRiscVRV128            = 0x0202\r
 } PROCESSOR_FAMILY2_DATA;\r
 \r
 ///\r
@@ -856,6 +861,19 @@ typedef struct {
   UINT32  ProcessorReserved4 :2;\r
 } PROCESSOR_FEATURE_FLAGS;\r
 \r
+typedef struct {\r
+  UINT32  ProcessorReserved1             :1;\r
+  UINT32  ProcessorUnknown               :1;\r
+  UINT32  Processor64BitCapble           :1;\r
+  UINT32  ProcessorMultiCore             :1;\r
+  UINT32  ProcessorHardwareThread        :1;\r
+  UINT32  ProcessorExecuteProtection     :1;\r
+  UINT32  ProcessorEnhancedVirtulization :1;\r
+  UINT32  ProcessorPowerPerformanceCtrl  :1;\r
+  UINT32  Processor128bitCapble          :1;\r
+  UINT32  ProcessorReserved2             :7;\r
+} PROCESSOR_CHARACTERISTIC_FLAGS;\r
+\r
 typedef struct {\r
   PROCESSOR_SIGNATURE     Signature;\r
   PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
@@ -2508,6 +2526,57 @@ typedef struct {
   UINT8                             InterfaceTypeSpecificData[4];   ///< This field has a minimum of four bytes\r
 } SMBIOS_TABLE_TYPE42;\r
 \r
+\r
+///\r
+/// Processor Specific Block - Processor Architecture Type\r
+///\r
+typedef enum{\r
+  ProcessorSpecificBlockArchTypeReserved   = 0x00,\r
+  ProcessorSpecificBlockArchTypeIa32       = 0x01,\r
+  ProcessorSpecificBlockArchTypeX64        = 0x02,\r
+  ProcessorSpecificBlockArchTypeItanium    = 0x03,\r
+  ProcessorSpecificBlockArchTypeAarch32    = 0x04,\r
+  ProcessorSpecificBlockArchTypeAarch64    = 0x05,\r
+  ProcessorSpecificBlockArchTypeRiscVRV32  = 0x06,\r
+  ProcessorSpecificBlockArchTypeRiscVRV64  = 0x07,\r
+  ProcessorSpecificBlockArchTypeRiscVRV128 = 0x08\r
+} PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE;\r
+\r
+///\r
+/// Processor Specific Block is the standard container of processor-specific data.\r
+///\r
+typedef struct {\r
+  UINT8                              Length;\r
+  UINT8                              ProcessorArchType;\r
+  ///\r
+  /// Below followed by Processor-specific data\r
+  ///\r
+  ///\r
+} PROCESSOR_SPECIFIC_BLOCK;\r
+\r
+///\r
+/// Processor Additional Information(Type 44).\r
+///\r
+/// The information in this structure defines the processor additional information in case\r
+/// SMBIOS type 4 is not sufficient to describe processor characteristics.\r
+/// The SMBIOS type 44 structure has a reference handle field to link back to the related\r
+/// SMBIOS type 4 structure. There may be multiple SMBIOS type 44 structures linked to the\r
+/// same SMBIOS type 4 structure. For example, when cores are not identical in a processor,\r
+/// SMBIOS type 44 structures describe different core-specific information.\r
+///\r
+/// SMBIOS type 44 defines the standard header for the processor-specific block, while the\r
+/// contents of processor-specific data are maintained by processor\r
+/// architecture workgroups or vendors in separate documents.\r
+///\r
+typedef struct {\r
+  SMBIOS_STRUCTURE                  Hdr;\r
+  SMBIOS_HANDLE                     RefHandle;                 ///< This field refer to associated SMBIOS type 4\r
+  ///\r
+  /// Below followed by Processor-specific block\r
+  ///\r
+  PROCESSOR_SPECIFIC_BLOCK          ProcessorSpecificBlock;\r
+} SMBIOS_TABLE_TYPE44;\r
+\r
 ///\r
 /// TPM Device (Type 43).\r
 ///\r
@@ -2586,6 +2655,7 @@ typedef union {
   SMBIOS_TABLE_TYPE41   *Type41;\r
   SMBIOS_TABLE_TYPE42   *Type42;\r
   SMBIOS_TABLE_TYPE43   *Type43;\r
+  SMBIOS_TABLE_TYPE44   *Type44;\r
   SMBIOS_TABLE_TYPE126  *Type126;\r
   SMBIOS_TABLE_TYPE127  *Type127;\r
   UINT8                 *Raw;\r