Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
Portions Copyright (c) 2016 - 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
+Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>\r
\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
#define IMAGE_FILE_MACHINE_RISCV32 0x5032\r
#define IMAGE_FILE_MACHINE_RISCV64 0x5064\r
#define IMAGE_FILE_MACHINE_RISCV128 0x5128\r
+#define IMAGE_FILE_MACHINE_LOONGARCH32 0x6232\r
+#define IMAGE_FILE_MACHINE_LOONGARCH64 0x6264\r
\r
//\r
// EXE file formats\r
#define EFI_IMAGE_REL_BASED_RISCV_LOW12I 7\r
#define EFI_IMAGE_REL_BASED_RISCV_LOW12S 8\r
\r
+//\r
+// Relocation types of LoongArch processor.\r
+//\r
+#define EFI_IMAGE_REL_BASED_LOONGARCH32_MARK_LA 8\r
+#define EFI_IMAGE_REL_BASED_LOONGARCH64_MARK_LA 8\r
+\r
///\r
/// Line number format.\r
///\r
UINT64 X31;\r
} EFI_SYSTEM_CONTEXT_RISCV64;\r
\r
+//\r
+// LoongArch processor exception types.\r
+//\r
+#define EXCEPT_LOONGARCH_INT 0\r
+#define EXCEPT_LOONGARCH_PIL 1\r
+#define EXCEPT_LOONGARCH_PIS 2\r
+#define EXCEPT_LOONGARCH_PIF 3\r
+#define EXCEPT_LOONGARCH_PME 4\r
+#define EXCEPT_LOONGARCH_PNR 5\r
+#define EXCEPT_LOONGARCH_PNX 6\r
+#define EXCEPT_LOONGARCH_PPI 7\r
+#define EXCEPT_LOONGARCH_ADE 8\r
+#define EXCEPT_LOONGARCH_ALE 9\r
+#define EXCEPT_LOONGARCH_BCE 10\r
+#define EXCEPT_LOONGARCH_SYS 11\r
+#define EXCEPT_LOONGARCH_BRK 12\r
+#define EXCEPT_LOONGARCH_INE 13\r
+#define EXCEPT_LOONGARCH_IPE 14\r
+#define EXCEPT_LOONGARCH_FPD 15\r
+#define EXCEPT_LOONGARCH_SXD 16\r
+#define EXCEPT_LOONGARCH_ASXD 17\r
+#define EXCEPT_LOONGARCH_FPE 18\r
+#define EXCEPT_LOONGARCH_TBR 64 // For code only, there is no such type in the ISA spec, the TLB refill is defined for an independent exception.\r
+\r
+//\r
+// LoongArch processor Interrupt types.\r
+//\r
+#define EXCEPT_LOONGARCH_INT_SIP0 0\r
+#define EXCEPT_LOONGARCH_INT_SIP1 1\r
+#define EXCEPT_LOONGARCH_INT_IP0 2\r
+#define EXCEPT_LOONGARCH_INT_IP1 3\r
+#define EXCEPT_LOONGARCH_INT_IP2 4\r
+#define EXCEPT_LOONGARCH_INT_IP3 5\r
+#define EXCEPT_LOONGARCH_INT_IP4 6\r
+#define EXCEPT_LOONGARCH_INT_IP5 7\r
+#define EXCEPT_LOONGARCH_INT_IP6 8\r
+#define EXCEPT_LOONGARCH_INT_IP7 9\r
+#define EXCEPT_LOONGARCH_INT_PMC 10\r
+#define EXCEPT_LOONGARCH_INT_TIMER 11\r
+#define EXCEPT_LOONGARCH_INT_IPI 12\r
+\r
+//\r
+// For coding convenience, define the maximum valid\r
+// LoongArch interrupt.\r
+//\r
+#define MAX_LOONGARCH_INTERRUPT 14\r
+\r
+typedef struct {\r
+ UINT64 R0;\r
+ UINT64 R1;\r
+ UINT64 R2;\r
+ UINT64 R3;\r
+ UINT64 R4;\r
+ UINT64 R5;\r
+ UINT64 R6;\r
+ UINT64 R7;\r
+ UINT64 R8;\r
+ UINT64 R9;\r
+ UINT64 R10;\r
+ UINT64 R11;\r
+ UINT64 R12;\r
+ UINT64 R13;\r
+ UINT64 R14;\r
+ UINT64 R15;\r
+ UINT64 R16;\r
+ UINT64 R17;\r
+ UINT64 R18;\r
+ UINT64 R19;\r
+ UINT64 R20;\r
+ UINT64 R21;\r
+ UINT64 R22;\r
+ UINT64 R23;\r
+ UINT64 R24;\r
+ UINT64 R25;\r
+ UINT64 R26;\r
+ UINT64 R27;\r
+ UINT64 R28;\r
+ UINT64 R29;\r
+ UINT64 R30;\r
+ UINT64 R31;\r
+\r
+ UINT64 CRMD; // CuRrent MoDe information\r
+ UINT64 PRMD; // PRe-exception MoDe information\r
+ UINT64 EUEN; // Extended component Unit ENable\r
+ UINT64 MISC; // MISCellaneous controller\r
+ UINT64 ECFG; // Exception ConFiGuration\r
+ UINT64 ESTAT; // Exception STATus\r
+ UINT64 ERA; // Exception Return Address\r
+ UINT64 BADV; // BAD Virtual address\r
+ UINT64 BADI; // BAD Instruction\r
+} EFI_SYSTEM_CONTEXT_LOONGARCH64;\r
+\r
///\r
/// Universal EFI_SYSTEM_CONTEXT definition.\r
///\r
typedef union {\r
- EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc;\r
- EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32;\r
- EFI_SYSTEM_CONTEXT_X64 *SystemContextX64;\r
- EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf;\r
- EFI_SYSTEM_CONTEXT_ARM *SystemContextArm;\r
- EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64;\r
- EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRiscV64;\r
+ EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc;\r
+ EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32;\r
+ EFI_SYSTEM_CONTEXT_X64 *SystemContextX64;\r
+ EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf;\r
+ EFI_SYSTEM_CONTEXT_ARM *SystemContextArm;\r
+ EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64;\r
+ EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRiscV64;\r
+ EFI_SYSTEM_CONTEXT_LOONGARCH64 *SystemContextLoongArch64;\r
} EFI_SYSTEM_CONTEXT;\r
\r
//\r
\r
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
+Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>\r
\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000B\r
#elif defined (MDE_CPU_RISCV64)\r
#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x001B\r
+#elif defined (MDE_CPU_LOONGARCH64)\r
+#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x0027\r
#endif\r
\r
///\r
Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>\r
Portions copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.<BR>\r
Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
+Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>\r
\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
#define EFI_IMAGE_MACHINE_RISCV64 0x5064\r
#define EFI_IMAGE_MACHINE_RISCV128 0x5128\r
\r
+///\r
+/// PE32+ Machine type for LoongArch 32/64 images.\r
+///\r
+#define EFI_IMAGE_MACHINE_LOONGARCH32 0x6232\r
+#define EFI_IMAGE_MACHINE_LOONGARCH64 0x6264\r
+\r
#if !defined (EFI_IMAGE_MACHINE_TYPE_VALUE) && !defined (EFI_IMAGE_MACHINE_CROSS_TYPE_VALUE)\r
#if defined (MDE_CPU_IA32)\r
\r
#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \\r
((Machine) == EFI_IMAGE_MACHINE_RISCV64)\r
\r
+#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE)\r
+\r
+ #elif defined (MDE_CPU_LOONGARCH64)\r
+\r
+#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \\r
+ ((Machine) == EFI_IMAGE_MACHINE_LOONGARCH64)\r
+\r
#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE)\r
\r
#elif defined (MDE_CPU_EBC)\r
\r
Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>\r
Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
+Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>\r
\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
//\r
// EFI File location to boot from on removable media devices\r
//\r
-#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA32 L"\\EFI\\BOOT\\BOOTIA32.EFI"\r
-#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA64 L"\\EFI\\BOOT\\BOOTIA64.EFI"\r
-#define EFI_REMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\BOOT\\BOOTX64.EFI"\r
-#define EFI_REMOVABLE_MEDIA_FILE_NAME_ARM L"\\EFI\\BOOT\\BOOTARM.EFI"\r
-#define EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64 L"\\EFI\\BOOT\\BOOTAA64.EFI"\r
-#define EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64 L"\\EFI\\BOOT\\BOOTRISCV64.EFI"\r
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA32 L"\\EFI\\BOOT\\BOOTIA32.EFI"\r
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA64 L"\\EFI\\BOOT\\BOOTIA64.EFI"\r
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\BOOT\\BOOTX64.EFI"\r
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_ARM L"\\EFI\\BOOT\\BOOTARM.EFI"\r
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64 L"\\EFI\\BOOT\\BOOTAA64.EFI"\r
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64 L"\\EFI\\BOOT\\BOOTRISCV64.EFI"\r
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_LOONGARCH64 L"\\EFI\\BOOT\\BOOTLOONGARCH64.EFI"\r
\r
#if !defined (EFI_REMOVABLE_MEDIA_FILE_NAME)\r
#if defined (MDE_CPU_IA32)\r
#define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64\r
#elif defined (MDE_CPU_RISCV64)\r
#define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64\r
+ #elif defined (MDE_CPU_LOONGARCH64)\r
+#define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_LOONGARCH64\r
#else\r
#error Unknown Processor Type\r
#endif\r