ArmPkg/AArch64.h: Added Exception Syndrome Register definitions

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15709 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h
index b63f577accd7894f667932a6e7bbda995ce44b61..04007402479d827c68386cae196854e774e036a7 100644 (file)
--- a/ArmPkg/Include/Chipset/AArch64.h
+++ b/ArmPkg/Include/Chipset/AArch64.h
@@ -62,6 +62,13 @@
 #define ARM_HCR_TSC       BIT19\r
 #define ARM_HCR_TGE       BIT27\r
 \r
+// Exception Syndrome Register\r
+#define AARCH64_ESR_EC(Ecr)    ((0x3F << 26) & (Ecr))\r
+#define AARCH64_ESR_ISS(Ecr)   ((0x1FFFFFF) & (Ecr))\r
+\r
+#define AARCH64_ESR_EC_SMC32   (0x13 << 26)\r
+#define AARCH64_ESR_EC_SMC64   (0x17 << 26)\r
+\r
 // AArch64 Exception Level\r
 #define AARCH64_EL3       0xC\r
 #define AARCH64_EL2       0x8\r