]> git.proxmox.com Git - mirror_edk2.git/commitdiff
OvmfPkg/Csm/CsmSupportLib: fix "missing braces around initializer"
authorLaszlo Ersek <lersek@redhat.com>
Thu, 31 Jul 2014 15:44:52 +0000 (15:44 +0000)
committerjljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524>
Thu, 31 Jul 2014 15:44:52 +0000 (15:44 +0000)
Recent BaseTools changes trigger this gcc warning.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15726 6f19259b-4bc3-4df7-8a09-765794883524

OvmfPkg/Csm/CsmSupportLib/LegacyPlatform.c

index af8896ae90de087024d6ec19978890d907f56c33..0ccfa975851829b1b3b9e746efadf7b0fa0e482f 100644 (file)
@@ -30,10 +30,10 @@ EFI_SETUP_BBS_MAP mSetupBbsMap[] = {
 // Global variables for System ROMs\r
 //\r
 #define SYSTEM_ROM_FILE_GUID \\r
-{ 0x1547B4F3, 0x3E8A, 0x4FEF, 0x81, 0xC8, 0x32, 0x8E, 0xD6, 0x47, 0xAB, 0x1A }\r
+{ 0x1547B4F3, 0x3E8A, 0x4FEF, { 0x81, 0xC8, 0x32, 0x8E, 0xD6, 0x47, 0xAB, 0x1A } }\r
 \r
 #define NULL_ROM_FILE_GUID \\r
-{ 0x00000000, 0x0000, 0x0000, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }\r
+{ 0x00000000, 0x0000, 0x0000, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }\r
 \r
 SYSTEM_ROM_TABLE mSystemRomTable[] = {\r
   { SYSTEM_ROM_FILE_GUID,  1 },\r
@@ -79,15 +79,15 @@ EFI_LEGACY_PIRQ_TABLE PirqTableHead = {
     0x00,             // UINT8   Checksum\r
   },\r
   {\r
-    //          -- Pin 1 -- -- Pin 2 -- -- Pin 3 -- -- Pin 4 --\r
-    // Bus  Dev  Reg   Map   Reg   Map   Reg   Map   Reg   Map\r
-\r
-    0x00,0x08,0x60,0xDEB8,0x61,0xDEB8,0x62,0xDEB8,0x63,0xDEB8,0x00,0x00,\r
-    0x00,0x10,0x61,0xDEB8,0x62,0xDEB8,0x63,0xDEB8,0x60,0xDEB8,0x01,0x00,\r
-    0x00,0x18,0x62,0xDEB8,0x63,0xDEB8,0x60,0xDEB8,0x61,0xDEB8,0x02,0x00,\r
-    0x00,0x20,0x63,0xDEB8,0x60,0xDEB8,0x61,0xDEB8,0x62,0xDEB8,0x03,0x00,\r
-    0x00,0x28,0x60,0xDEB8,0x61,0xDEB8,0x62,0xDEB8,0x63,0xDEB8,0x04,0x00,\r
-    0x00,0x30,0x61,0xDEB8,0x62,0xDEB8,0x63,0xDEB8,0x60,0xDEB8,0x05,0x00,\r
+    //           -- Pin 1 --   -- Pin 2 --   -- Pin 3 --   -- Pin 4 --\r
+    // Bus  Dev   Reg   Map     Reg   Map     Reg   Map     Reg   Map\r
+    //\r
+    {0x00,0x08,{{0x60,0xDEB8},{0x61,0xDEB8},{0x62,0xDEB8},{0x63,0xDEB8}},0x00,0x00},\r
+    {0x00,0x10,{{0x61,0xDEB8},{0x62,0xDEB8},{0x63,0xDEB8},{0x60,0xDEB8}},0x01,0x00},\r
+    {0x00,0x18,{{0x62,0xDEB8},{0x63,0xDEB8},{0x60,0xDEB8},{0x61,0xDEB8}},0x02,0x00},\r
+    {0x00,0x20,{{0x63,0xDEB8},{0x60,0xDEB8},{0x61,0xDEB8},{0x62,0xDEB8}},0x03,0x00},\r
+    {0x00,0x28,{{0x60,0xDEB8},{0x61,0xDEB8},{0x62,0xDEB8},{0x63,0xDEB8}},0x04,0x00},\r
+    {0x00,0x30,{{0x61,0xDEB8},{0x62,0xDEB8},{0x63,0xDEB8},{0x60,0xDEB8}},0x05,0x00},\r
   }\r
 };\r
 \r