+++ /dev/null
-/** @file\r
- This driver will report some MMIO/IO resources to dxe core, extract smbios and acpi\r
- tables from coreboot and install.\r
-\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-#include "CbSupportDxe.h"\r
-\r
-/**\r
- Reserve MMIO/IO resource in GCD\r
-\r
- @param IsMMIO Flag of whether it is mmio resource or io resource.\r
- @param GcdType Type of the space.\r
- @param BaseAddress Base address of the space.\r
- @param Length Length of the space.\r
- @param Alignment Align with 2^Alignment\r
- @param ImageHandle Handle for the image of this driver.\r
-\r
- @retval EFI_SUCCESS Reserve successful\r
-**/\r
-EFI_STATUS\r
-CbReserveResourceInGcd (\r
- IN BOOLEAN IsMMIO,\r
- IN UINTN GcdType,\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length,\r
- IN UINTN Alignment,\r
- IN EFI_HANDLE ImageHandle\r
- )\r
-{\r
- EFI_STATUS Status;\r
-\r
- if (IsMMIO) {\r
- Status = gDS->AddMemorySpace (\r
- GcdType,\r
- BaseAddress,\r
- Length,\r
- EFI_MEMORY_UC\r
- );\r
- if (EFI_ERROR (Status)) {\r
- DEBUG ((\r
- EFI_D_ERROR,\r
- "Failed to add memory space :0x%lx 0x%lx\n",\r
- BaseAddress,\r
- Length\r
- ));\r
- }\r
- ASSERT_EFI_ERROR (Status);\r
- Status = gDS->AllocateMemorySpace (\r
- EfiGcdAllocateAddress,\r
- GcdType,\r
- Alignment,\r
- Length,\r
- &BaseAddress,\r
- ImageHandle,\r
- NULL\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- } else {\r
- Status = gDS->AddIoSpace (\r
- GcdType,\r
- BaseAddress,\r
- Length\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- Status = gDS->AllocateIoSpace (\r
- EfiGcdAllocateAddress,\r
- GcdType,\r
- Alignment,\r
- Length,\r
- &BaseAddress,\r
- ImageHandle,\r
- NULL\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
- return Status;\r
-}\r
-\r
-\r
-/**\r
- Main entry for the Coreboot Support DXE module.\r
-\r
- @param[in] ImageHandle The firmware allocated handle for the EFI image.\r
- @param[in] SystemTable A pointer to the EFI System Table.\r
-\r
- @retval EFI_SUCCESS The entry point is executed successfully.\r
- @retval other Some error occurs when executing this entry point.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-CbDxeEntryPoint (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
- )\r
-{\r
- EFI_STATUS Status;\r
- EFI_HOB_GUID_TYPE *GuidHob;\r
- SYSTEM_TABLE_INFO *pSystemTableInfo;\r
- FRAME_BUFFER_INFO *FbInfo;\r
-\r
- Status = EFI_SUCCESS;\r
- //\r
- // Report MMIO/IO Resources\r
- //\r
- Status = CbReserveResourceInGcd (TRUE, EfiGcdMemoryTypeMemoryMappedIo, 0xFEC00000, SIZE_4KB, 0, SystemTable); // IOAPIC\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- Status = CbReserveResourceInGcd (TRUE, EfiGcdMemoryTypeMemoryMappedIo, 0xFED00000, SIZE_1KB, 0, SystemTable); // HPET\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- //\r
- // Find the system table information guid hob\r
- //\r
- GuidHob = GetFirstGuidHob (&gUefiSystemTableInfoGuid);\r
- ASSERT (GuidHob != NULL);\r
- pSystemTableInfo = (SYSTEM_TABLE_INFO *)GET_GUID_HOB_DATA (GuidHob);\r
-\r
- //\r
- // Install Acpi Table\r
- //\r
- if (pSystemTableInfo->AcpiTableBase != 0 && pSystemTableInfo->AcpiTableSize != 0) {\r
- DEBUG ((EFI_D_ERROR, "Install Acpi Table at 0x%lx, length 0x%x\n", pSystemTableInfo->AcpiTableBase, pSystemTableInfo->AcpiTableSize));\r
- Status = gBS->InstallConfigurationTable (&gEfiAcpiTableGuid, (VOID *)(UINTN)pSystemTableInfo->AcpiTableBase);\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
-\r
- //\r
- // Install Smbios Table\r
- //\r
- if (pSystemTableInfo->SmbiosTableBase != 0 && pSystemTableInfo->SmbiosTableSize != 0) {\r
- DEBUG ((EFI_D_ERROR, "Install Smbios Table at 0x%lx, length 0x%x\n", pSystemTableInfo->SmbiosTableBase, pSystemTableInfo->SmbiosTableSize));\r
- Status = gBS->InstallConfigurationTable (&gEfiSmbiosTableGuid, (VOID *)(UINTN)pSystemTableInfo->SmbiosTableBase);\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
-\r
- //\r
- // Find the frame buffer information and update PCDs\r
- //\r
- GuidHob = GetFirstGuidHob (&gUefiFrameBufferInfoGuid);\r
- if (GuidHob != NULL) {\r
- FbInfo = (FRAME_BUFFER_INFO *)GET_GUID_HOB_DATA (GuidHob);\r
- Status = PcdSet32S (PcdVideoHorizontalResolution, FbInfo->HorizontalResolution);\r
- ASSERT_EFI_ERROR (Status);\r
- Status = PcdSet32S (PcdVideoVerticalResolution, FbInfo->VerticalResolution);\r
- ASSERT_EFI_ERROR (Status);\r
- Status = PcdSet32S (PcdSetupVideoHorizontalResolution, FbInfo->HorizontalResolution);\r
- ASSERT_EFI_ERROR (Status);\r
- Status = PcdSet32S (PcdSetupVideoVerticalResolution, FbInfo->VerticalResolution);\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
+++ /dev/null
-/** @file\r
- The header file of Coreboot Support DXE.\r
-\r
-Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-#ifndef __DXE_COREBOOT_SUPPORT_H__\r
-#define __DXE_COREBOOT_SUPPORT_H__\r
-\r
-#include <PiDxe.h>\r
-\r
-#include <Library/UefiDriverEntryPoint.h>\r
-#include <Library/UefiBootServicesTableLib.h>\r
-#include <Library/DxeServicesTableLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/UefiLib.h>\r
-#include <Library/IoLib.h>\r
-#include <Library/HobLib.h>\r
-\r
-#include <Guid/Acpi.h>\r
-#include <Guid/SmBios.h>\r
-#include <Guid/SystemTableInfoGuid.h>\r
-#include <Guid/AcpiBoardInfoGuid.h>\r
-#include <Guid/FrameBufferInfoGuid.h>\r
-\r
-#include <IndustryStandard/Acpi.h>\r
-\r
-#endif\r
+++ /dev/null
-## @file\r
-# Coreboot Support DXE Module\r
-#\r
-# Report some MMIO/IO resources to dxe core, extract smbios and acpi tables from coreboot and install.\r
-#\r
-# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
-#\r
-# SPDX-License-Identifier: BSD-2-Clause-Patent\r
-#\r
-##\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = CbSupportDxe\r
- FILE_GUID = C68DAA4E-7AB5-41e8-A91D-5954421053F3\r
- MODULE_TYPE = DXE_DRIVER\r
- VERSION_STRING = 1.0\r
- ENTRY_POINT = CbDxeEntryPoint\r
-\r
-#\r
-# The following information is for reference only and not required by the build tools.\r
-#\r
-# VALID_ARCHITECTURES = IA32 X64 EBC\r
-#\r
-\r
-[Sources]\r
- CbSupportDxe.c\r
- CbSupportDxe.h\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- IntelFrameworkPkg/IntelFrameworkPkg.dec\r
- IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec\r
- CorebootModulePkg/CorebootModulePkg.dec\r
-\r
-[LibraryClasses]\r
- UefiDriverEntryPoint\r
- UefiBootServicesTableLib\r
- DxeServicesTableLib\r
- DebugLib\r
- BaseMemoryLib\r
- UefiLib\r
- HobLib\r
-\r
-[Guids]\r
- gEfiAcpiTableGuid\r
- gEfiSmbiosTableGuid\r
- gUefiSystemTableInfoGuid\r
- gUefiAcpiBoardInfoGuid\r
- gUefiFrameBufferInfoGuid\r
-\r
-[Pcd]\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution\r
-\r
-[Depex]\r
- TRUE\r
+++ /dev/null
-/** @file\r
- This PEIM will parse coreboot table in memory and report resource information into pei core.\r
- This file contains the main entrypoint of the PEIM.\r
-\r
-Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-#include "CbSupportPei.h"\r
-\r
-#define LEGACY_8259_MASK_REGISTER_MASTER 0x21\r
-#define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1\r
-\r
-EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {\r
- { EfiACPIReclaimMemory, FixedPcdGet32 (PcdMemoryTypeEfiACPIReclaimMemory) },\r
- { EfiACPIMemoryNVS, FixedPcdGet32 (PcdMemoryTypeEfiACPIMemoryNVS) },\r
- { EfiReservedMemoryType, FixedPcdGet32 (PcdMemoryTypeEfiReservedMemoryType) },\r
- { EfiRuntimeServicesData, FixedPcdGet32 (PcdMemoryTypeEfiRuntimeServicesData) },\r
- { EfiRuntimeServicesCode, FixedPcdGet32 (PcdMemoryTypeEfiRuntimeServicesCode) },\r
- { EfiMaxMemoryType, 0 }\r
-};\r
-\r
-EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {\r
- {\r
- EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,\r
- &gEfiPeiMasterBootModePpiGuid,\r
- NULL\r
- }\r
-};\r
-\r
-/**\r
- Create memory mapped io resource hob.\r
-\r
- @param MmioBase Base address of the memory mapped io range\r
- @param MmioSize Length of the memory mapped io range\r
-\r
-**/\r
-VOID\r
-BuildMemoryMappedIoRangeHob (\r
- EFI_PHYSICAL_ADDRESS MmioBase,\r
- UINT64 MmioSize\r
- )\r
-{\r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_MEMORY_MAPPED_IO,\r
- (EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_TESTED),\r
- MmioBase,\r
- MmioSize\r
- );\r
-\r
- BuildMemoryAllocationHob (\r
- MmioBase,\r
- MmioSize,\r
- EfiMemoryMappedIO\r
- );\r
-}\r
-\r
-/**\r
- Check the integrity of firmware volume header\r
-\r
- @param[in] FwVolHeader A pointer to a firmware volume header\r
-\r
- @retval TRUE The firmware volume is consistent\r
- @retval FALSE The firmware volume has corrupted.\r
-\r
-**/\r
-STATIC\r
-BOOLEAN\r
-IsFvHeaderValid (\r
- IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader\r
- )\r
-{\r
- UINT16 Checksum;\r
-\r
- // Skip nv storage fv\r
- if (CompareMem (&FwVolHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {\r
- return FALSE;\r
- }\r
-\r
- if ( (FwVolHeader->Revision != EFI_FVH_REVISION) ||\r
- (FwVolHeader->Signature != EFI_FVH_SIGNATURE) ||\r
- (FwVolHeader->FvLength == ((UINTN) -1)) ||\r
- ((FwVolHeader->HeaderLength & 0x01 ) !=0) ) {\r
- return FALSE;\r
- }\r
-\r
- Checksum = CalculateCheckSum16 ((UINT16 *) FwVolHeader, FwVolHeader->HeaderLength);\r
- if (Checksum != 0) {\r
- DEBUG (( DEBUG_ERROR,\r
- "ERROR - Invalid Firmware Volume Header Checksum, change 0x%04x to 0x%04x\r\n",\r
- FwVolHeader->Checksum,\r
- (UINT16)( Checksum + FwVolHeader->Checksum )));\r
- return FALSE;\r
- }\r
-\r
- return TRUE;\r
-}\r
-\r
-/**\r
- Install FvInfo PPI and create fv hobs for remained fvs\r
-\r
-**/\r
-VOID\r
-CbPeiReportRemainedFvs (\r
- VOID\r
- )\r
-{\r
- UINT8* TempPtr;\r
- UINT8* EndPtr;\r
-\r
- TempPtr = (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase);\r
- EndPtr = (UINT8* )(UINTN) (PcdGet32 (PcdPayloadFdMemBase) + PcdGet32 (PcdPayloadFdMemSize));\r
-\r
- for (;TempPtr < EndPtr;) {\r
- if (IsFvHeaderValid ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)) {\r
- if (TempPtr != (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase)) {\r
- // Skip the PEI FV\r
- DEBUG((EFI_D_ERROR, "Found one valid fv : 0x%lx.\n", TempPtr, ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength));\r
-\r
- PeiServicesInstallFvInfoPpi (\r
- NULL,\r
- (VOID *) (UINTN) TempPtr,\r
- (UINT32) (UINTN) ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength,\r
- NULL,\r
- NULL\r
- );\r
- BuildFvHob ((EFI_PHYSICAL_ADDRESS)(UINTN) TempPtr, ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength);\r
- }\r
- }\r
- TempPtr += ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength;\r
- }\r
-}\r
-\r
-/**\r
- Based on memory base, size and type, build resource descripter HOB.\r
-\r
- @param Base Memory base address.\r
- @param Size Memory size.\r
- @param Type Memory type.\r
- @param Param A pointer to CB_MEM_INFO.\r
-\r
- @retval EFI_SUCCESS if it completed successfully.\r
-**/\r
-EFI_STATUS\r
-CbMemInfoCallback (\r
- UINT64 Base,\r
- UINT64 Size,\r
- UINT32 Type,\r
- VOID *Param\r
- )\r
-{\r
- CB_MEM_INFO *MemInfo;\r
- UINTN Attribue;\r
-\r
- Attribue = EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
- EFI_RESOURCE_ATTRIBUTE_TESTED |\r
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;\r
-\r
- if ((Base < 0x100000) && ((Base + Size) > 0x100000)) {\r
- Size -= (0x100000 - Base);\r
- Base = 0x100000;\r
- }\r
-\r
- MemInfo = (CB_MEM_INFO *)Param;\r
- if (Base >= 0x100000) {\r
- if (Type == CB_MEM_RAM) {\r
- if (Base < 0x100000000ULL) {\r
- MemInfo->UsableLowMemTop = (UINT32)(Base + Size);\r
- } else {\r
- Attribue &= ~EFI_RESOURCE_ATTRIBUTE_TESTED;\r
- }\r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_SYSTEM_MEMORY,\r
- Attribue,\r
- (EFI_PHYSICAL_ADDRESS)Base,\r
- Size\r
- );\r
- } else if (Type == CB_MEM_TABLE) {\r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_MEMORY_RESERVED,\r
- Attribue,\r
- (EFI_PHYSICAL_ADDRESS)Base,\r
- Size\r
- );\r
- MemInfo->SystemLowMemTop = ((UINT32)(Base + Size) + 0x0FFFFFFF) & 0xF0000000;\r
- } else if (Type == CB_MEM_RESERVED) {\r
- if ((MemInfo->SystemLowMemTop == 0) || (Base < MemInfo->SystemLowMemTop)) {\r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_MEMORY_RESERVED,\r
- Attribue,\r
- (EFI_PHYSICAL_ADDRESS)Base,\r
- Size\r
- ); \r
- }\r
- }\r
- }\r
- \r
- return EFI_SUCCESS;\r
-}\r
-\r
-/**\r
- This is the entrypoint of PEIM\r
-\r
- @param FileHandle Handle of the file being invoked.\r
- @param PeiServices Describes the list of possible PEI Services.\r
-\r
- @retval EFI_SUCCESS if it completed successfully.\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-CbPeiEntryPoint (\r
- IN EFI_PEI_FILE_HANDLE FileHandle,\r
- IN CONST EFI_PEI_SERVICES **PeiServices\r
- )\r
-{\r
- EFI_STATUS Status;\r
- UINT64 LowMemorySize;\r
- UINT64 PeiMemSize = SIZE_64MB; // 64 MB\r
- EFI_PHYSICAL_ADDRESS PeiMemBase = 0;\r
- UINT32 RegEax;\r
- UINT8 PhysicalAddressBits;\r
- VOID* pCbHeader;\r
- VOID* pAcpiTable;\r
- UINT32 AcpiTableSize;\r
- VOID* pSmbiosTable;\r
- UINT32 SmbiosTableSize;\r
- SYSTEM_TABLE_INFO* pSystemTableInfo;\r
- FRAME_BUFFER_INFO FbInfo;\r
- FRAME_BUFFER_INFO* pFbInfo;\r
- ACPI_BOARD_INFO* pAcpiBoardInfo;\r
- UINTN PmCtrlRegBase, PmTimerRegBase, ResetRegAddress, ResetValue;\r
- UINTN PmEvtBase;\r
- UINTN PmGpeEnBase;\r
- CB_MEM_INFO CbMemInfo;\r
-\r
- //\r
- // Report lower 640KB of RAM. Attribute EFI_RESOURCE_ATTRIBUTE_TESTED \r
- // is intentionally omitted to prevent erasing of the coreboot header \r
- // record before it is processed by CbParseMemoryInfo.\r
- //\r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_SYSTEM_MEMORY,\r
- (\r
- EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE\r
- ),\r
- (EFI_PHYSICAL_ADDRESS)(0),\r
- (UINT64)(0xA0000)\r
- );\r
-\r
-\r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_MEMORY_RESERVED,\r
- (\r
- EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
- EFI_RESOURCE_ATTRIBUTE_TESTED |\r
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE\r
- ),\r
- (EFI_PHYSICAL_ADDRESS)(0xA0000),\r
- (UINT64)(0x60000)\r
- );\r
-\r
- ZeroMem (&CbMemInfo, sizeof(CbMemInfo));\r
- Status = CbParseMemoryInfo (CbMemInfoCallback, (VOID *)&CbMemInfo);\r
- if (EFI_ERROR(Status)) {\r
- return Status;\r
- }\r
-\r
- LowMemorySize = CbMemInfo.UsableLowMemTop;\r
- DEBUG ((EFI_D_INFO, "Low memory 0x%lx\n", LowMemorySize));\r
- DEBUG ((EFI_D_INFO, "SystemLowMemTop 0x%x\n", CbMemInfo.SystemLowMemTop));\r
-\r
- //\r
- // Should be 64k aligned\r
- //\r
- PeiMemBase = (LowMemorySize - PeiMemSize) & (~(BASE_64KB - 1));\r
-\r
- DEBUG((EFI_D_ERROR, "PeiMemBase: 0x%lx.\n", PeiMemBase));\r
- DEBUG((EFI_D_ERROR, "PeiMemSize: 0x%lx.\n", PeiMemSize));\r
-\r
- Status = PeiServicesInstallPeiMemory (\r
- PeiMemBase,\r
- PeiMemSize\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- //\r
- // Set cache on the physical memory\r
- //\r
- MtrrSetMemoryAttribute (BASE_1MB, LowMemorySize - BASE_1MB, CacheWriteBack);\r
- MtrrSetMemoryAttribute (0, 0xA0000, CacheWriteBack);\r
-\r
- //\r
- // Create Memory Type Information HOB\r
- //\r
- BuildGuidDataHob (\r
- &gEfiMemoryTypeInformationGuid,\r
- mDefaultMemoryTypeInformation,\r
- sizeof(mDefaultMemoryTypeInformation)\r
- );\r
-\r
- //\r
- // Create Fv hob\r
- //\r
- CbPeiReportRemainedFvs ();\r
-\r
- BuildMemoryAllocationHob (\r
- PcdGet32 (PcdPayloadFdMemBase),\r
- PcdGet32 (PcdPayloadFdMemSize),\r
- EfiBootServicesData\r
- );\r
-\r
- //\r
- // Build CPU memory space and IO space hob\r
- //\r
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
- if (RegEax >= 0x80000008) {\r
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);\r
- PhysicalAddressBits = (UINT8) RegEax;\r
- } else {\r
- PhysicalAddressBits = 36;\r
- }\r
- //\r
- // Create a CPU hand-off information\r
- //\r
- BuildCpuHob (PhysicalAddressBits, 16);\r
-\r
- //\r
- // Report Local APIC range\r
- //\r
- BuildMemoryMappedIoRangeHob (0xFEC80000, SIZE_512KB);\r
-\r
- //\r
- // Boot mode\r
- //\r
- Status = PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION);\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- Status = PeiServicesInstallPpi (mPpiBootMode);\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- //\r
- // Set pcd to save the upper coreboot header in case the dxecore will\r
- // erase 0~4k memory\r
- //\r
- pCbHeader = NULL;\r
- if ((CbParseGetCbHeader (1, &pCbHeader) == RETURN_SUCCESS)\r
- && ((UINTN)pCbHeader > BASE_4KB)) {\r
- DEBUG((EFI_D_ERROR, "Actual Coreboot header: %p.\n", pCbHeader));\r
- Status = PcdSet32S (PcdCbHeaderPointer, (UINT32)(UINTN)pCbHeader);\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
-\r
- //\r
- // Create guid hob for system tables like acpi table and smbios table\r
- //\r
- pAcpiTable = NULL;\r
- AcpiTableSize = 0;\r
- pSmbiosTable = NULL;\r
- SmbiosTableSize = 0;\r
- Status = CbParseAcpiTable (&pAcpiTable, &AcpiTableSize);\r
- if (EFI_ERROR (Status)) {\r
- // ACPI table is oblidgible\r
- DEBUG ((EFI_D_ERROR, "Failed to find the required acpi table\n"));\r
- ASSERT (FALSE);\r
- }\r
- CbParseSmbiosTable (&pSmbiosTable, &SmbiosTableSize);\r
-\r
- pSystemTableInfo = NULL;\r
- pSystemTableInfo = BuildGuidHob (&gUefiSystemTableInfoGuid, sizeof (SYSTEM_TABLE_INFO));\r
- ASSERT (pSystemTableInfo != NULL);\r
- pSystemTableInfo->AcpiTableBase = (UINT64) (UINTN)pAcpiTable;\r
- pSystemTableInfo->AcpiTableSize = AcpiTableSize;\r
- pSystemTableInfo->SmbiosTableBase = (UINT64) (UINTN)pSmbiosTable;\r
- pSystemTableInfo->SmbiosTableSize = SmbiosTableSize;\r
- DEBUG ((EFI_D_ERROR, "Detected Acpi Table at 0x%lx, length 0x%x\n", pSystemTableInfo->AcpiTableBase, pSystemTableInfo->AcpiTableSize));\r
- DEBUG ((EFI_D_ERROR, "Detected Smbios Table at 0x%lx, length 0x%x\n", pSystemTableInfo->SmbiosTableBase, pSystemTableInfo->SmbiosTableSize));\r
- DEBUG ((EFI_D_ERROR, "Create system table info guid hob\n"));\r
-\r
- //\r
- // Create guid hob for acpi board information\r
- //\r
- Status = CbParseFadtInfo (&PmCtrlRegBase, &PmTimerRegBase, &ResetRegAddress, &ResetValue, &PmEvtBase, &PmGpeEnBase);\r
- ASSERT_EFI_ERROR (Status);\r
- pAcpiBoardInfo = NULL;\r
- pAcpiBoardInfo = BuildGuidHob (&gUefiAcpiBoardInfoGuid, sizeof (ACPI_BOARD_INFO));\r
- ASSERT (pAcpiBoardInfo != NULL);\r
- pAcpiBoardInfo->PmCtrlRegBase = (UINT64)PmCtrlRegBase;\r
- pAcpiBoardInfo->PmTimerRegBase = (UINT64)PmTimerRegBase;\r
- pAcpiBoardInfo->ResetRegAddress = (UINT64)ResetRegAddress;\r
- pAcpiBoardInfo->ResetValue = (UINT8)ResetValue;\r
- pAcpiBoardInfo->PmEvtBase = (UINT64)PmEvtBase;\r
- pAcpiBoardInfo->PmGpeEnBase = (UINT64)PmGpeEnBase;\r
- DEBUG ((EFI_D_ERROR, "Create acpi board info guid hob\n"));\r
-\r
- //\r
- // Create guid hob for frame buffer information\r
- //\r
- ZeroMem (&FbInfo, sizeof (FRAME_BUFFER_INFO));\r
- Status = CbParseFbInfo (&FbInfo);\r
- if (!EFI_ERROR (Status)) {\r
- pFbInfo = BuildGuidHob (&gUefiFrameBufferInfoGuid, sizeof (FRAME_BUFFER_INFO));\r
- ASSERT (pSystemTableInfo != NULL);\r
- CopyMem (pFbInfo, &FbInfo, sizeof (FRAME_BUFFER_INFO));\r
- DEBUG ((EFI_D_ERROR, "Create frame buffer info guid hob\n"));\r
- }\r
-\r
- //\r
- // Parse platform specific information from coreboot. \r
- //\r
- Status = CbParsePlatformInfo ();\r
- if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "Error when parsing platform info, Status = %r\n", Status));\r
- return Status;\r
- }\r
-\r
- //\r
- // Mask off all legacy 8259 interrupt sources\r
- //\r
- IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);\r
- IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
+++ /dev/null
-/** @file\r
- The header file of Coreboot Support PEIM.\r
-\r
-Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-\r
-#ifndef __PEI_COREBOOT_SUPPORT_H__\r
-#define __PEI_COREBOOT_SUPPORT_H__\r
-\r
-#include <PiPei.h>\r
-\r
-#include <Library/PeimEntryPoint.h>\r
-#include <Library/PeiServicesLib.h>\r
-#include <Library/BaseLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/HobLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/CbParseLib.h>\r
-#include <Library/MtrrLib.h>\r
-#include <Library/IoLib.h>\r
-#include <Library/CbPlatformSupportLib.h>\r
-\r
-#include <Guid/SmramMemoryReserve.h>\r
-#include <Guid/MemoryTypeInformation.h>\r
-#include <Guid/FirmwareFileSystem2.h>\r
-#include <Guid/FrameBufferInfoGuid.h>\r
-#include <Guid/SystemTableInfoGuid.h>\r
-#include <Guid/AcpiBoardInfoGuid.h>\r
-\r
-#include <Ppi/MasterBootMode.h>\r
-#include "Coreboot.h"\r
-\r
-typedef struct {\r
- UINT32 UsableLowMemTop;\r
- UINT32 SystemLowMemTop;\r
-} CB_MEM_INFO;\r
-\r
-#endif\r
+++ /dev/null
-## @file\r
-# Coreboot Support PEI Module\r
-#\r
-# Parses coreboot table in memory and report resource information into pei core. It will install\r
-# the memory as required.\r
-#\r
-# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
-#\r
-# SPDX-License-Identifier: BSD-2-Clause-Patent\r
-#\r
-##\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = CbSupportPeim\r
- FILE_GUID = 352C6AF8-315B-4bd6-B04F-31D4ED1EBE57\r
- MODULE_TYPE = PEIM\r
- VERSION_STRING = 1.0\r
- ENTRY_POINT = CbPeiEntryPoint\r
-\r
-#\r
-# The following information is for reference only and not required by the build tools.\r
-#\r
-# VALID_ARCHITECTURES = IA32 X64\r
-#\r
-\r
-[Sources]\r
- CbSupportPei.c\r
- CbSupportPei.h\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- IntelFrameworkPkg/IntelFrameworkPkg.dec\r
- IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec\r
- CorebootModulePkg/CorebootModulePkg.dec\r
- UefiCpuPkg/UefiCpuPkg.dec\r
-\r
-[LibraryClasses]\r
- PeimEntryPoint\r
- PeiServicesLib\r
- BaseLib\r
- BaseMemoryLib\r
- DebugLib\r
- HobLib\r
- PcdLib\r
- CbParseLib\r
- MtrrLib\r
- IoLib\r
- CbPlatformSupportLib\r
-\r
-[Guids]\r
- gEfiSmmPeiSmramMemoryReserveGuid\r
- gEfiMemoryTypeInformationGuid\r
- gEfiFirmwareFileSystem2Guid\r
- gUefiSystemTableInfoGuid\r
- gUefiFrameBufferInfoGuid\r
- gUefiAcpiBoardInfoGuid\r
-\r
-[Ppis]\r
- gEfiPeiMasterBootModePpiGuid\r
-\r
-[Pcd]\r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemBase\r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemSize\r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdCbHeaderPointer\r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory\r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS\r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType\r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData\r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode\r
-\r
-[Depex]\r
- TRUE
\ No newline at end of file
+++ /dev/null
-## @file\r
-# Coreboot Support Package\r
-#\r
-# Provides drivers and definitions to support coreboot in EDKII bios.\r
-#\r
-# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
-# SPDX-License-Identifier: BSD-2-Clause-Patent\r
-#\r
-##\r
-\r
-[Defines]\r
- DEC_SPECIFICATION = 0x00010005\r
- PACKAGE_NAME = CorebootModulePkg\r
- PACKAGE_GUID = DE1750CE-FEE7-4dd1-8E9C-B7B8BAEBCF4F\r
- PACKAGE_VERSION = 0.1\r
-\r
-[Includes]\r
- Include\r
-\r
-[LibraryClasses]\r
- CbParseLib|Include/Library/CbParseLib.h\r
-\r
-[Guids]\r
- #\r
- ## Defines the token space for the Coreboot Module Package PCDs.\r
- #\r
- gUefiCorebootModulePkgTokenSpaceGuid = {0xe6ff49a0, 0x15df, 0x48fd, {0x9a, 0xcf, 0xd7, 0xdc, 0x27, 0x1b, 0x39, 0xd5}}\r
- gUefiSystemTableInfoGuid = {0x16c8a6d0, 0xfe8a, 0x4082, {0xa2, 0x8, 0xcf, 0x89, 0xc4, 0x29, 0x4, 0x33}}\r
- gUefiFrameBufferInfoGuid = {0xdc2cd8bd, 0x402c, 0x4dc4, {0x9b, 0xe0, 0xc, 0x43, 0x2b, 0x7, 0xfa, 0x34}}\r
- gUefiAcpiBoardInfoGuid = {0xad3d31b, 0xb3d8, 0x4506, {0xae, 0x71, 0x2e, 0xf1, 0x10, 0x6, 0xd9, 0xf}}\r
-\r
-\r
-[Ppis]\r
-\r
-[Protocols]\r
-\r
-\r
-################################################################################\r
-#\r
-# PCD Declarations section - list of all PCDs Declared by this Package\r
-# Only this package should be providing the\r
-# declaration, other packages should not.\r
-#\r
-################################################################################\r
-[PcdsFixedAtBuild, PcdsPatchableInModule]\r
-## Indicates the base address of the payload binary in memory\r
-gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemBase|0|UINT32|0x10000001\r
-## Provides the size of the payload binary in memory\r
-gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemSize|0|UINT32|0x10000002\r
-## Used to help reduce fragmentation in the EFI memory map\r
-gUefiCorebootModulePkgTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0x08|UINT32|0x10000012\r
-gUefiCorebootModulePkgTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0x04|UINT32|0x10000013\r
-gUefiCorebootModulePkgTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0x04|UINT32|0x00000014\r
-gUefiCorebootModulePkgTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|0xC0|UINT32|0x00000015\r
-gUefiCorebootModulePkgTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|0x80|UINT32|0x00000016\r
-\r
-[PcdsDynamicEx]\r
-gUefiCorebootModulePkgTokenSpaceGuid.PcdCbHeaderPointer|0|UINT32|0x10000003\r
-\r
+++ /dev/null
-/** @file\r
- Coreboot PEI module include file.\r
-\r
- Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-/*\r
- * This file is part of the libpayload project.\r
- *\r
- * Copyright (C) 2008 Advanced Micro Devices, Inc.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. The name of the author may not be used to endorse or promote products\r
- * derived from this software without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND\r
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE\r
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
- * SUCH DAMAGE.\r
- */\r
-\r
-\r
-#ifndef _COREBOOT_PEI_H_INCLUDED_\r
-#define _COREBOOT_PEI_H_INCLUDED_\r
-\r
-#if defined(_MSC_VER)\r
-#pragma warning( disable : 4200 )\r
-#endif\r
-\r
-#define DYN_CBMEM_ALIGN_SIZE (4096)\r
-\r
-#define IMD_ENTRY_MAGIC (~0xC0389481)\r
-#define CBMEM_ENTRY_MAGIC (~0xC0389479)\r
-\r
-struct cbmem_entry {\r
- UINT32 magic;\r
- UINT32 start;\r
- UINT32 size;\r
- UINT32 id;\r
-};\r
-\r
-struct cbmem_root {\r
- UINT32 max_entries;\r
- UINT32 num_entries;\r
- UINT32 locked;\r
- UINT32 size;\r
- struct cbmem_entry entries[0];\r
-};\r
-\r
-struct imd_entry {\r
- UINT32 magic;\r
- UINT32 start_offset;\r
- UINT32 size;\r
- UINT32 id;\r
-};\r
-\r
-struct imd_root {\r
- UINT32 max_entries;\r
- UINT32 num_entries;\r
- UINT32 flags;\r
- UINT32 entry_align;
- UINT32 max_offset;\r
- struct imd_entry entries[0];\r
-};\r
-\r
-struct cbuint64 {\r
- UINT32 lo;\r
- UINT32 hi;\r
-};\r
-\r
-#define CB_HEADER_SIGNATURE 0x4F49424C\r
-\r
-struct cb_header {\r
- UINT32 signature;\r
- UINT32 header_bytes;\r
- UINT32 header_checksum;\r
- UINT32 table_bytes;\r
- UINT32 table_checksum;\r
- UINT32 table_entries;\r
-};\r
-\r
-struct cb_record {\r
- UINT32 tag;\r
- UINT32 size;\r
-};\r
-\r
-#define CB_TAG_UNUSED 0x0000\r
-#define CB_TAG_MEMORY 0x0001\r
-\r
-struct cb_memory_range {\r
- struct cbuint64 start;\r
- struct cbuint64 size;\r
- UINT32 type;\r
-};\r
-\r
-#define CB_MEM_RAM 1\r
-#define CB_MEM_RESERVED 2\r
-#define CB_MEM_ACPI 3\r
-#define CB_MEM_NVS 4\r
-#define CB_MEM_UNUSABLE 5\r
-#define CB_MEM_VENDOR_RSVD 6\r
-#define CB_MEM_TABLE 16\r
-\r
-struct cb_memory {\r
- UINT32 tag;\r
- UINT32 size;\r
- struct cb_memory_range map[0];\r
-};\r
-\r
-#define CB_TAG_MAINBOARD 0x0003\r
-\r
-struct cb_mainboard {\r
- UINT32 tag;\r
- UINT32 size;\r
- UINT8 vendor_idx;\r
- UINT8 part_number_idx;\r
- UINT8 strings[0];\r
-};\r
-#define CB_TAG_VERSION 0x0004\r
-#define CB_TAG_EXTRA_VERSION 0x0005\r
-#define CB_TAG_BUILD 0x0006\r
-#define CB_TAG_COMPILE_TIME 0x0007\r
-#define CB_TAG_COMPILE_BY 0x0008\r
-#define CB_TAG_COMPILE_HOST 0x0009\r
-#define CB_TAG_COMPILE_DOMAIN 0x000a\r
-#define CB_TAG_COMPILER 0x000b\r
-#define CB_TAG_LINKER 0x000c\r
-#define CB_TAG_ASSEMBLER 0x000d\r
-\r
-struct cb_string {\r
- UINT32 tag;\r
- UINT32 size;\r
- UINT8 string[0];\r
-};\r
-\r
-#define CB_TAG_SERIAL 0x000f\r
-\r
-struct cb_serial {\r
- UINT32 tag;\r
- UINT32 size;\r
-#define CB_SERIAL_TYPE_IO_MAPPED 1\r
-#define CB_SERIAL_TYPE_MEMORY_MAPPED 2\r
- UINT32 type;\r
- UINT32 baseaddr;\r
- UINT32 baud;\r
- UINT32 regwidth;
-
- // Crystal or input frequency to the chip containing the UART.
- // Provide the board specific details to allow the payload to
- // initialize the chip containing the UART and make independent
- // decisions as to which dividers to select and their values
- // to eventually arrive at the desired console baud-rate.
- UINT32 input_hertz;
-
- // UART PCI address: bus, device, function
- // 1 << 31 - Valid bit, PCI UART in use
- // Bus << 20
- // Device << 15
- // Function << 12
- UINT32 uart_pci_addr;
-};\r
-\r
-#define CB_TAG_CONSOLE 0x00010\r
-\r
-struct cb_console {\r
- UINT32 tag;\r
- UINT32 size;\r
- UINT16 type;\r
-};\r
-\r
-#define CB_TAG_CONSOLE_SERIAL8250 0\r
-#define CB_TAG_CONSOLE_VGA 1 // OBSOLETE\r
-#define CB_TAG_CONSOLE_BTEXT 2 // OBSOLETE\r
-#define CB_TAG_CONSOLE_LOGBUF 3\r
-#define CB_TAG_CONSOLE_SROM 4 // OBSOLETE\r
-#define CB_TAG_CONSOLE_EHCI 5\r
-\r
-#define CB_TAG_FORWARD 0x00011\r
-\r
-struct cb_forward {\r
- UINT32 tag;\r
- UINT32 size;\r
- UINT64 forward;\r
-};\r
-\r
-#define CB_TAG_FRAMEBUFFER 0x0012\r
-struct cb_framebuffer {\r
- UINT32 tag;\r
- UINT32 size;\r
-\r
- UINT64 physical_address;\r
- UINT32 x_resolution;\r
- UINT32 y_resolution;\r
- UINT32 bytes_per_line;\r
- UINT8 bits_per_pixel;\r
- UINT8 red_mask_pos;\r
- UINT8 red_mask_size;\r
- UINT8 green_mask_pos;\r
- UINT8 green_mask_size;\r
- UINT8 blue_mask_pos;\r
- UINT8 blue_mask_size;\r
- UINT8 reserved_mask_pos;\r
- UINT8 reserved_mask_size;\r
-};\r
-\r
-#define CB_TAG_VDAT 0x0015\r
-struct cb_vdat {\r
- UINT32 tag;\r
- UINT32 size; /* size of the entire entry */\r
- UINT64 vdat_addr;\r
- UINT32 vdat_size;\r
-};\r
-\r
-#define CB_TAG_TIMESTAMPS 0x0016\r
-#define CB_TAG_CBMEM_CONSOLE 0x0017\r
-#define CB_TAG_MRC_CACHE 0x0018\r
-struct cb_cbmem_tab {\r
- UINT32 tag;\r
- UINT32 size;\r
- UINT64 cbmem_tab;\r
-};\r
-\r
-/* Helpful macros */\r
-\r
-#define MEM_RANGE_COUNT(_rec) \\r
- (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0]))\r
-\r
-#define MEM_RANGE_PTR(_rec, _idx) \\r
- (void *)(((UINT8 *) (_rec)) + sizeof(*(_rec)) \\r
- + (sizeof((_rec)->map[0]) * (_idx)))\r
-\r
-\r
-#endif // _COREBOOT_PEI_H_INCLUDED_\r
+++ /dev/null
-/** @file\r
- This file defines the hob structure for board related information from acpi table\r
- \r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#ifndef __ACPI_BOARD_INFO_GUID_H__\r
-#define __ACPI_BOARD_INFO_GUID_H__\r
-\r
-///\r
-/// Board information GUID\r
-///\r
-extern EFI_GUID gUefiAcpiBoardInfoGuid;\r
-\r
-typedef struct {\r
- UINT64 PmEvtBase;\r
- UINT64 PmGpeEnBase;\r
- UINT64 PmCtrlRegBase;\r
- UINT64 PmTimerRegBase;\r
- UINT64 ResetRegAddress;\r
- UINT8 ResetValue; \r
-} ACPI_BOARD_INFO;\r
- \r
-#endif\r
+++ /dev/null
-/** @file\r
- This file defines the hob structure for frame buffer device.\r
- \r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#ifndef __FRAME_BUFFER_INFO_GUID_H__\r
-#define __FRAME_BUFFER_INFO_GUID_H__\r
-\r
-///\r
-/// Frame Buffer Information GUID\r
-///\r
-extern EFI_GUID gUefiFrameBufferInfoGuid;\r
-\r
-typedef struct {\r
- UINT8 Position; // Position of the color\r
- UINT8 Mask; // The number of bits expressed as a mask\r
-} COLOR_PLACEMENT;\r
-\r
-typedef struct { \r
- UINT64 LinearFrameBuffer; \r
- UINT32 HorizontalResolution;\r
- UINT32 VerticalResolution;\r
- UINT32 BitsPerPixel;\r
- UINT16 BytesPerScanLine;\r
- COLOR_PLACEMENT Red;\r
- COLOR_PLACEMENT Green;\r
- COLOR_PLACEMENT Blue;\r
- COLOR_PLACEMENT Reserved;\r
-} FRAME_BUFFER_INFO; \r
- \r
-#endif\r
+++ /dev/null
-/** @file\r
- This file defines the hob structure for system tables like ACPI, SMBIOS tables.\r
- \r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#ifndef __SYSTEM_TABLE_INFO_GUID_H__\r
-#define __SYSTEM_TABLE_INFO_GUID_H__\r
-\r
-///\r
-/// System Table Information GUID\r
-///\r
-extern EFI_GUID gUefiSystemTableInfoGuid;\r
-\r
-typedef struct { \r
- UINT64 AcpiTableBase;\r
- UINT32 AcpiTableSize; \r
- UINT64 SmbiosTableBase; \r
- UINT32 SmbiosTableSize; \r
-} SYSTEM_TABLE_INFO; \r
- \r
-#endif\r
+++ /dev/null
-/** @file\r
- This library will parse the coreboot table in memory and extract those required\r
- information.\r
-\r
- Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-#include <Guid/FrameBufferInfoGuid.h>\r
-\r
-typedef RETURN_STATUS \\r
- (*CB_MEM_INFO_CALLBACK) (UINT64 Base, UINT64 Size, UINT32 Type, VOID *Param);\r
-\r
-/**\r
- Find coreboot record with given Tag from the memory Start in 4096\r
- bytes range.\r
-\r
- @param Start The start memory to be searched in\r
- @param Tag The tag id to be found\r
-\r
- @retval NULL The Tag is not found.\r
- @retval Others The pointer to the record found.\r
-\r
-**/\r
-VOID *\r
-EFIAPI\r
-FindCbTag (\r
- IN VOID *Start,\r
- IN UINT32 Tag\r
- );\r
-\r
-/**\r
- Acquire the memory information from the coreboot table in memory.\r
-\r
- @param MemInfoCallback The callback routine\r
- @param pParam Pointer to the callback routine parameter\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory information.\r
- @retval RETURN_NOT_FOUND Failed to find the memory information.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-CbParseMemoryInfo (\r
- IN CB_MEM_INFO_CALLBACK MemInfoCallback,\r
- IN VOID *pParam\r
- );\r
-\r
-/**\r
- Acquire the coreboot memory table with the given table id\r
-\r
- @param TableId Table id to be searched\r
- @param pMemTable Pointer to the base address of the memory table\r
- @param pMemTableSize Pointer to the size of the memory table\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory table.\r
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.\r
- @retval RETURN_NOT_FOUND Failed to find the memory table.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-CbParseCbMemTable (\r
- IN UINT32 TableId,\r
- IN VOID** pMemTable,\r
- IN UINT32* pMemTableSize\r
- );\r
-\r
-/**\r
- Acquire the acpi table from coreboot\r
-\r
- @param pMemTable Pointer to the base address of the memory table\r
- @param pMemTableSize Pointer to the size of the memory table\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory table.\r
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.\r
- @retval RETURN_NOT_FOUND Failed to find the memory table.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-CbParseAcpiTable (\r
- IN VOID** pMemTable,\r
- IN UINT32* pMemTableSize\r
- );\r
-\r
-/**\r
- Acquire the smbios table from coreboot\r
-\r
- @param pMemTable Pointer to the base address of the memory table\r
- @param pMemTableSize Pointer to the size of the memory table\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory table.\r
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.\r
- @retval RETURN_NOT_FOUND Failed to find the memory table.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-CbParseSmbiosTable (\r
- IN VOID** pMemTable,\r
- IN UINT32* pMemTableSize\r
- );\r
-\r
-/**\r
- Find the required fadt information\r
-\r
- @param pPmCtrlReg Pointer to the address of power management control register\r
- @param pPmTimerReg Pointer to the address of power management timer register\r
- @param pResetReg Pointer to the address of system reset register\r
- @param pResetValue Pointer to the value to be written to the system reset register\r
- @param pPmEvtReg Pointer to the address of power management event register\r
- @param pPmGpeEnReg Pointer to the address of power management GPE enable register\r
-\r
- @retval RETURN_SUCCESS Successfully find out all the required fadt information.\r
- @retval RETURN_NOT_FOUND Failed to find the fadt table.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-CbParseFadtInfo (\r
- IN UINTN* pPmCtrlReg,\r
- IN UINTN* pPmTimerReg,\r
- IN UINTN* pResetReg,\r
- IN UINTN* pResetValue,\r
- IN UINTN* pPmEvtReg,\r
- IN UINTN* pPmGpeEnReg\r
- );\r
-\r
-/**\r
- Find the serial port information\r
-\r
- @param pRegBase Pointer to the base address of serial port registers\r
- @param pRegAccessType Pointer to the access type of serial port registers\r
- @param pRegWidth Pointer to the register width in bytes\r
- @param pBaudrate Pointer to the serial port baudrate\r
- @param pInputHertz Pointer to the input clock frequency\r
- @param pUartPciAddr Pointer to the UART PCI bus, dev and func address\r
-\r
- @retval RETURN_SUCCESS Successfully find the serial port information.\r
- @retval RETURN_NOT_FOUND Failed to find the serial port information .\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-CbParseSerialInfo (\r
- OUT UINT32 *pRegBase,\r
- OUT UINT32 *pRegAccessType,\r
- OUT UINT32 *pRegWidth,\r
- OUT UINT32 *pBaudrate,\r
- OUT UINT32 *pInputHertz,\r
- OUT UINT32 *pUartPciAddr\r
- );\r
-\r
-/**\r
- Search for the coreboot table header\r
-\r
- @param Level Level of the search depth\r
- @param HeaderPtr Pointer to the pointer of coreboot table header\r
-\r
- @retval RETURN_SUCCESS Successfully find the coreboot table header .\r
- @retval RETURN_NOT_FOUND Failed to find the coreboot table header .\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-CbParseGetCbHeader (\r
- IN UINTN Level,\r
- IN VOID** HeaderPtr\r
- );\r
-\r
-/**\r
- Find the video frame buffer information\r
-\r
- @param pFbInfo Pointer to the FRAME_BUFFER_INFO structure\r
-\r
- @retval RETURN_SUCCESS Successfully find the video frame buffer information.\r
- @retval RETURN_NOT_FOUND Failed to find the video frame buffer information .\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-CbParseFbInfo (\r
- IN FRAME_BUFFER_INFO* pFbInfo\r
- );\r
-\r
+++ /dev/null
-/** @file
- Coreboot Platform Support library. Platform can provide an implementation of this
- library class to provide hooks that may be required for some type of
- platform features.
-
-Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef __CB_PLATFORM_SUPPORT_LIB__
-#define __CB_PLATFORM_SUPPORT_LIB__
-
-/**
- Parse platform specific information from coreboot.
-
- @retval RETURN_SUCCESS The platform specific coreboot support succeeded.
- @retval RETURN_DEVICE_ERROR The platform specific coreboot support could not be completed.
-
-**/
-EFI_STATUS
-EFIAPI
-CbParsePlatformInfo (
- VOID
- );
-
-#endif // __CB_PLATFORM_SUPPORT_LIB__
-
+++ /dev/null
-/** @file
- 16550 UART Serial Port library functions
-
- (C) Copyright 2014 Hewlett-Packard Development Company, L.P.<BR>
- Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include <Base.h>
-#include <IndustryStandard/Pci.h>
-#include <Library/SerialPortLib.h>
-#include <Library/PcdLib.h>
-#include <Library/IoLib.h>
-#include <Library/PciLib.h>
-#include <Library/PlatformHookLib.h>
-#include <Library/BaseLib.h>
-
-//
-// PCI Definitions.\r
-//
-#define PCI_BRIDGE_32_BIT_IO_SPACE 0x01
-
-//
-// 16550 UART register offsets and bitfields
-//
-#define R_UART_RXBUF 0
-#define R_UART_TXBUF 0
-#define R_UART_BAUD_LOW 0
-#define R_UART_BAUD_HIGH 1
-#define R_UART_FCR 2
-#define B_UART_FCR_FIFOE BIT0
-#define B_UART_FCR_FIFO64 BIT5
-#define R_UART_LCR 3
-#define B_UART_LCR_DLAB BIT7
-#define R_UART_MCR 4
-#define B_UART_MCR_DTRC BIT0
-#define B_UART_MCR_RTS BIT1
-#define R_UART_LSR 5
-#define B_UART_LSR_RXRDY BIT0
-#define B_UART_LSR_TXRDY BIT5
-#define B_UART_LSR_TEMT BIT6
-#define R_UART_MSR 6
-#define B_UART_MSR_CTS BIT4
-#define B_UART_MSR_DSR BIT5
-#define B_UART_MSR_RI BIT6
-#define B_UART_MSR_DCD BIT7
-
-//
-// 4-byte structure for each PCI node in PcdSerialPciDeviceInfo
-//
-typedef struct {
- UINT8 Device;
- UINT8 Function;
- UINT16 PowerManagementStatusAndControlRegister;
-} PCI_UART_DEVICE_INFO;
-
-/**
- Read an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is read from
- MMIO space. If PcdSerialUseMmio is FALSE, then the value is read from I/O space. The
- parameter Offset is added to the base address of the 16550 registers that is specified
- by PcdSerialRegisterBase.
-
- @param Base The base address register of UART device.
- @param Offset The offset of the 16550 register to read.
-
- @return The value read from the 16550 register.
-
-**/
-UINT8
-SerialPortReadRegister (
- UINTN Base,
- UINTN Offset
- )
-{
- if (PcdGetBool (PcdSerialUseMmio)) {
- return MmioRead8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride));
- } else {
- return IoRead8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride));
- }
-}
-
-/**
- Write an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is written to
- MMIO space. If PcdSerialUseMmio is FALSE, then the value is written to I/O space. The
- parameter Offset is added to the base address of the 16550 registers that is specified
- by PcdSerialRegisterBase.
-
- @param Base The base address register of UART device.
- @param Offset The offset of the 16550 register to write.
- @param Value The value to write to the 16550 register specified by Offset.
-
- @return The value written to the 16550 register.
-
-**/
-UINT8
-SerialPortWriteRegister (
- UINTN Base,
- UINTN Offset,
- UINT8 Value
- )
-{
- if (PcdGetBool (PcdSerialUseMmio)) {
- return MmioWrite8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), Value);
- } else {
- return IoWrite8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), Value);
- }
-}
-
-/**
- Update the value of an 16-bit PCI configuration register in a PCI device. If the
- PCI Configuration register specified by PciAddress is already programmed with a
- non-zero value, then return the current value. Otherwise update the PCI configuration
- register specified by PciAddress with the value specified by Value and return the
- value programmed into the PCI configuration register. All values must be masked
- using the bitmask specified by Mask.
-
- @param PciAddress PCI Library address of the PCI Configuration register to update.
- @param Value The value to program into the PCI Configuration Register.
- @param Mask Bitmask of the bits to check and update in the PCI configuration register.
-
-**/
-UINT16
-SerialPortLibUpdatePciRegister16 (
- UINTN PciAddress,
- UINT16 Value,
- UINT16 Mask
- )
-{
- UINT16 CurrentValue;
-
- CurrentValue = PciRead16 (PciAddress) & Mask;
- if (CurrentValue != 0) {
- return CurrentValue;
- }
- return PciWrite16 (PciAddress, Value & Mask);
-}
-
-/**
- Update the value of an 32-bit PCI configuration register in a PCI device. If the
- PCI Configuration register specified by PciAddress is already programmed with a
- non-zero value, then return the current value. Otherwise update the PCI configuration
- register specified by PciAddress with the value specified by Value and return the
- value programmed into the PCI configuration register. All values must be masked
- using the bitmask specified by Mask.
-
- @param PciAddress PCI Library address of the PCI Configuration register to update.
- @param Value The value to program into the PCI Configuration Register.
- @param Mask Bitmask of the bits to check and update in the PCI configuration register.
-
- @return The Secondary bus number that is actually programed into the PCI to PCI Bridge device.
-
-**/
-UINT32
-SerialPortLibUpdatePciRegister32 (
- UINTN PciAddress,
- UINT32 Value,
- UINT32 Mask
- )
-{
- UINT32 CurrentValue;
-
- CurrentValue = PciRead32 (PciAddress) & Mask;
- if (CurrentValue != 0) {
- return CurrentValue;
- }
- return PciWrite32 (PciAddress, Value & Mask);
-}
-
-/**
- Retrieve the I/O or MMIO base address register for the PCI UART device.
-
- This function assumes Root Bus Numer is Zero, and enables I/O and MMIO in PCI UART
- Device if they are not already enabled.
-
- @return The base address register of the UART device.
-
-**/
-UINTN
-GetSerialRegisterBase (
- VOID
- )
-{
- UINTN PciLibAddress;
- UINTN BusNumber;
- UINTN SubordinateBusNumber;
- UINT32 ParentIoBase;
- UINT32 ParentIoLimit;
- UINT16 ParentMemoryBase;
- UINT16 ParentMemoryLimit;
- UINT32 IoBase;
- UINT32 IoLimit;
- UINT16 MemoryBase;
- UINT16 MemoryLimit;
- UINTN SerialRegisterBase;
- UINTN BarIndex;
- UINT32 RegisterBaseMask;
- PCI_UART_DEVICE_INFO *DeviceInfo;
-
- //
- // Get PCI Device Info
- //
- DeviceInfo = (PCI_UART_DEVICE_INFO *) PcdGetPtr (PcdSerialPciDeviceInfo);
-
- //
- // If PCI Device Info is empty, then assume fixed address UART and return PcdSerialRegisterBase
- //
- if (DeviceInfo->Device == 0xff) {
- return (UINTN)PcdGet64 (PcdSerialRegisterBase);
- }
-
- //
- // Assume PCI Bus 0 I/O window is 0-64KB and MMIO windows is 0-4GB
- //
- ParentMemoryBase = 0 >> 16;
- ParentMemoryLimit = 0xfff00000 >> 16;
- ParentIoBase = 0 >> 12;
- ParentIoLimit = 0xf000 >> 12;
-
- //
- // Enable I/O and MMIO in PCI Bridge
- // Assume Root Bus Numer is Zero.
- //
- for (BusNumber = 0; (DeviceInfo + 1)->Device != 0xff; DeviceInfo++) {
- //
- // Compute PCI Lib Address to PCI to PCI Bridge
- //
- PciLibAddress = PCI_LIB_ADDRESS (BusNumber, DeviceInfo->Device, DeviceInfo->Function, 0);
-
- //
- // Retrieve and verify the bus numbers in the PCI to PCI Bridge
- //
- BusNumber = PciRead8 (PciLibAddress + PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET);
- SubordinateBusNumber = PciRead8 (PciLibAddress + PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET);
- if (BusNumber == 0 || BusNumber > SubordinateBusNumber) {
- return 0;
- }
-
- //
- // Retrieve and verify the I/O or MMIO decode window in the PCI to PCI Bridge
- //
- if (PcdGetBool (PcdSerialUseMmio)) {
- MemoryLimit = PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.MemoryLimit)) & 0xfff0;
- MemoryBase = PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.MemoryBase)) & 0xfff0;
-
- //
- // If PCI Bridge MMIO window is disabled, then return 0
- //
- if (MemoryLimit < MemoryBase) {
- return 0;
- }
-
- //
- // If PCI Bridge MMIO window is not in the address range decoded by the parent PCI Bridge, then return 0
- //
- if (MemoryBase < ParentMemoryBase || MemoryBase > ParentMemoryLimit || MemoryLimit > ParentMemoryLimit) {
- return 0;
- }
- ParentMemoryBase = MemoryBase;
- ParentMemoryLimit = MemoryLimit;
- } else {
- IoLimit = PciRead8 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoLimit));
- if ((IoLimit & PCI_BRIDGE_32_BIT_IO_SPACE ) == 0) {
- IoLimit = IoLimit >> 4;
- } else {
- IoLimit = (PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoLimitUpper16)) << 4) | (IoLimit >> 4);
- }
- IoBase = PciRead8 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoBase));
- if ((IoBase & PCI_BRIDGE_32_BIT_IO_SPACE ) == 0) {
- IoBase = IoBase >> 4;
- } else {
- IoBase = (PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoBaseUpper16)) << 4) | (IoBase >> 4);
- }
-
- //
- // If PCI Bridge I/O window is disabled, then return 0
- //
- if (IoLimit < IoBase) {
- return 0;
- }
-
- //
- // If PCI Bridge I/O window is not in the address range decoded by the parent PCI Bridge, then return 0
- //
- if (IoBase < ParentIoBase || IoBase > ParentIoLimit || IoLimit > ParentIoLimit) {
- return 0;
- }
- ParentIoBase = IoBase;
- ParentIoLimit = IoLimit;
- }
- }
-
- //
- // Compute PCI Lib Address to PCI UART
- //
- PciLibAddress = PCI_LIB_ADDRESS (BusNumber, DeviceInfo->Device, DeviceInfo->Function, 0);
-
- //
- // Find the first IO or MMIO BAR
- //
- RegisterBaseMask = 0xFFFFFFF0;
- for (BarIndex = 0; BarIndex < PCI_MAX_BAR; BarIndex ++) {
- SerialRegisterBase = PciRead32 (PciLibAddress + PCI_BASE_ADDRESSREG_OFFSET + BarIndex * 4);
- if (PcdGetBool (PcdSerialUseMmio) && ((SerialRegisterBase & BIT0) == 0)) {
- //
- // MMIO BAR is found
- //
- RegisterBaseMask = 0xFFFFFFF0;
- break;
- }
-
- if ((!PcdGetBool (PcdSerialUseMmio)) && ((SerialRegisterBase & BIT0) != 0)) {
- //
- // IO BAR is found
- //
- RegisterBaseMask = 0xFFFFFFF8;
- break;
- }
- }
-
- //
- // MMIO or IO BAR is not found.
- //
- if (BarIndex == PCI_MAX_BAR) {
- return 0;
- }
-
- //
- // Program UART BAR
- //
- SerialRegisterBase = SerialPortLibUpdatePciRegister32 (
- PciLibAddress + PCI_BASE_ADDRESSREG_OFFSET + BarIndex * 4,
- (UINT32)PcdGet64 (PcdSerialRegisterBase),
- RegisterBaseMask
- );
-
- //
- // Verify that the UART BAR is in the address range decoded by the parent PCI Bridge
- //
- if (PcdGetBool (PcdSerialUseMmio)) {
- if (((SerialRegisterBase >> 16) & 0xfff0) < ParentMemoryBase || ((SerialRegisterBase >> 16) & 0xfff0) > ParentMemoryLimit) {
- return 0;
- }
- } else {
- if ((SerialRegisterBase >> 12) < ParentIoBase || (SerialRegisterBase >> 12) > ParentIoLimit) {
- return 0;
- }
- }
-
- //
- // Enable I/O and MMIO in PCI UART Device if they are not already enabled
- //
- PciOr16 (
- PciLibAddress + PCI_COMMAND_OFFSET,
- PcdGetBool (PcdSerialUseMmio) ? EFI_PCI_COMMAND_MEMORY_SPACE : EFI_PCI_COMMAND_IO_SPACE
- );
-
- //
- // Force D0 state if a Power Management and Status Register is specified
- //
- if (DeviceInfo->PowerManagementStatusAndControlRegister != 0x00) {
- if ((PciRead16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister) & (BIT0 | BIT1)) != 0x00) {
- PciAnd16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister, (UINT16)~(BIT0 | BIT1));
- //
- // If PCI UART was not in D0, then make sure FIFOs are enabled, but do not reset FIFOs
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_FCR, (UINT8)(PcdGet8 (PcdSerialFifoControl) & (B_UART_FCR_FIFOE | B_UART_FCR_FIFO64)));
- }
- }
-
- //
- // Get PCI Device Info
- //
- DeviceInfo = (PCI_UART_DEVICE_INFO *) PcdGetPtr (PcdSerialPciDeviceInfo);
-
- //
- // Enable I/O or MMIO in PCI Bridge
- // Assume Root Bus Numer is Zero.
- //
- for (BusNumber = 0; (DeviceInfo + 1)->Device != 0xff; DeviceInfo++) {
- //
- // Compute PCI Lib Address to PCI to PCI Bridge
- //
- PciLibAddress = PCI_LIB_ADDRESS (BusNumber, DeviceInfo->Device, DeviceInfo->Function, 0);
-
- //
- // Enable the I/O or MMIO decode windows in the PCI to PCI Bridge
- //
- PciOr16 (
- PciLibAddress + PCI_COMMAND_OFFSET,
- PcdGetBool (PcdSerialUseMmio) ? EFI_PCI_COMMAND_MEMORY_SPACE : EFI_PCI_COMMAND_IO_SPACE
- );
-
- //
- // Force D0 state if a Power Management and Status Register is specified
- //
- if (DeviceInfo->PowerManagementStatusAndControlRegister != 0x00) {
- if ((PciRead16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister) & (BIT0 | BIT1)) != 0x00) {
- PciAnd16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister, (UINT16)~(BIT0 | BIT1));
- }
- }
-
- BusNumber = PciRead8 (PciLibAddress + PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET);
- }
-
- return SerialRegisterBase;
-}
-
-/**
- Return whether the hardware flow control signal allows writing.
-
- @param SerialRegisterBase The base address register of UART device.
-
- @retval TRUE The serial port is writable.
- @retval FALSE The serial port is not writable.
-**/
-BOOLEAN
-SerialPortWritable (
- UINTN SerialRegisterBase
- )
-{
- if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {
- if (PcdGetBool (PcdSerialDetectCable)) {
- //
- // Wait for both DSR and CTS to be set
- // DSR is set if a cable is connected.
- // CTS is set if it is ok to transmit data
- //
- // DSR CTS Description Action
- // === === ======================================== ========
- // 0 0 No cable connected. Wait
- // 0 1 No cable connected. Wait
- // 1 0 Cable connected, but not clear to send. Wait
- // 1 1 Cable connected, and clear to send. Transmit
- //
- return (BOOLEAN) ((SerialPortReadRegister (SerialRegisterBase, R_UART_MSR) & (B_UART_MSR_DSR | B_UART_MSR_CTS)) == (B_UART_MSR_DSR | B_UART_MSR_CTS));
- } else {
- //
- // Wait for both DSR and CTS to be set OR for DSR to be clear.
- // DSR is set if a cable is connected.
- // CTS is set if it is ok to transmit data
- //
- // DSR CTS Description Action
- // === === ======================================== ========
- // 0 0 No cable connected. Transmit
- // 0 1 No cable connected. Transmit
- // 1 0 Cable connected, but not clear to send. Wait
- // 1 1 Cable connected, and clear to send. Transmit\r
- //
- return (BOOLEAN) ((SerialPortReadRegister (SerialRegisterBase, R_UART_MSR) & (B_UART_MSR_DSR | B_UART_MSR_CTS)) != (B_UART_MSR_DSR));
- }
- }
-
- return TRUE;
-}
-
-/**
- Initialize the serial device hardware.
-
- If no initialization is required, then return RETURN_SUCCESS.
- If the serial device was successfully initialized, then return RETURN_SUCCESS.
- If the serial device could not be initialized, then return RETURN_DEVICE_ERROR.
-
- @retval RETURN_SUCCESS The serial device was initialized.
- @retval RETURN_DEVICE_ERROR The serial device could not be initialized.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortInitialize (
- VOID
- )
-{
- RETURN_STATUS Status;
- UINTN SerialRegisterBase;
- UINT32 Divisor;
- UINT32 CurrentDivisor;
- BOOLEAN Initialized;
-
- //
- // Perform platform specific initialization required to enable use of the 16550 device
- // at the location specified by PcdSerialUseMmio and PcdSerialRegisterBase.
- //
- Status = PlatformHookSerialPortInitialize ();
- if (RETURN_ERROR (Status)) {
- return Status;
- }
-
- //
- // Calculate divisor for baud generator
- // Ref_Clk_Rate / Baud_Rate / 16
- //
- Divisor = PcdGet32 (PcdSerialClockRate) / (PcdGet32 (PcdSerialBaudRate) * 16);
- if ((PcdGet32 (PcdSerialClockRate) % (PcdGet32 (PcdSerialBaudRate) * 16)) >= PcdGet32 (PcdSerialBaudRate) * 8) {
- Divisor++;
- }
-
- //
- // Get the base address of the serial port in either I/O or MMIO space
- //
- SerialRegisterBase = GetSerialRegisterBase ();
- if (SerialRegisterBase ==0) {
- return RETURN_DEVICE_ERROR;
- }
-
- //
- // See if the serial port is already initialized
- //
- Initialized = TRUE;
- if ((SerialPortReadRegister (SerialRegisterBase, R_UART_LCR) & 0x3F) != (PcdGet8 (PcdSerialLineControl) & 0x3F)) {
- Initialized = FALSE;
- }
- SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_LCR) | B_UART_LCR_DLAB));
- CurrentDivisor = SerialPortReadRegister (SerialRegisterBase, R_UART_BAUD_HIGH) << 8;
- CurrentDivisor |= (UINT32) SerialPortReadRegister (SerialRegisterBase, R_UART_BAUD_LOW);
- SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_LCR) & ~B_UART_LCR_DLAB));
- if (CurrentDivisor != Divisor) {
- Initialized = FALSE;
- }
- if (Initialized) {
- return RETURN_SUCCESS;
- }
-
- //
- // Wait for the serial port to be ready.
- // Verify that both the transmit FIFO and the shift register are empty.
- //
- while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) != (B_UART_LSR_TEMT | B_UART_LSR_TXRDY));
-
- //
- // Configure baud rate
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, B_UART_LCR_DLAB);
- SerialPortWriteRegister (SerialRegisterBase, R_UART_BAUD_HIGH, (UINT8) (Divisor >> 8));
- SerialPortWriteRegister (SerialRegisterBase, R_UART_BAUD_LOW, (UINT8) (Divisor & 0xff));
-
- //
- // Clear DLAB and configure Data Bits, Parity, and Stop Bits.
- // Strip reserved bits from PcdSerialLineControl
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, (UINT8)(PcdGet8 (PcdSerialLineControl) & 0x3F));
-
- //
- // Enable and reset FIFOs
- // Strip reserved bits from PcdSerialFifoControl
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_FCR, 0x00);
- SerialPortWriteRegister (SerialRegisterBase, R_UART_FCR, (UINT8)(PcdGet8 (PcdSerialFifoControl) & (B_UART_FCR_FIFOE | B_UART_FCR_FIFO64)));
-
- //
- // Set RTS and DTR in Modem Control Register(MCR)
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR,
- EFI_SERIAL_REQUEST_TO_SEND | EFI_SERIAL_DATA_TERMINAL_READY);
-
- return RETURN_SUCCESS;
-}
-
-/**
- Write data from buffer to serial device.
-
- Writes NumberOfBytes data bytes from Buffer to the serial device.
- The number of bytes actually written to the serial device is returned.
- If the return value is less than NumberOfBytes, then the write operation failed.
-
- If Buffer is NULL, then ASSERT().
-
- If NumberOfBytes is zero, then return 0.
-
- @param Buffer Pointer to the data buffer to be written.
- @param NumberOfBytes Number of bytes to written to the serial device.
-
- @retval 0 NumberOfBytes is 0.
- @retval >0 The number of bytes written to the serial device.
- If this value is less than NumberOfBytes, then the write operation failed.
-
-**/
-UINTN
-EFIAPI
-SerialPortWrite (
- IN UINT8 *Buffer,
- IN UINTN NumberOfBytes
- )
-{
- UINTN SerialRegisterBase;
- UINTN Result;
- UINTN Index;
- UINTN FifoSize;
-
- if (Buffer == NULL) {
- return 0;
- }
-
- SerialRegisterBase = GetSerialRegisterBase ();
- if (SerialRegisterBase ==0) {
- return 0;
- }
-
- if (NumberOfBytes == 0) {
- //
- // Flush the hardware
- //
-
- //
- // Wait for both the transmit FIFO and shift register empty.
- //
- while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) != (B_UART_LSR_TEMT | B_UART_LSR_TXRDY));
-
- //
- // Wait for the hardware flow control signal
- //
- while (!SerialPortWritable (SerialRegisterBase));
- return 0;
- }
-
- //
- // Compute the maximum size of the Tx FIFO
- //
- FifoSize = 1;
- if ((PcdGet8 (PcdSerialFifoControl) & B_UART_FCR_FIFOE) != 0) {
- if ((PcdGet8 (PcdSerialFifoControl) & B_UART_FCR_FIFO64) == 0) {
- FifoSize = 16;
- } else {
- FifoSize = PcdGet32 (PcdSerialExtendedTxFifoSize);
- }
- }
-
- Result = NumberOfBytes;
- while (NumberOfBytes != 0) {
- //
- // Wait for the serial port to be ready, to make sure both the transmit FIFO
- // and shift register empty.
- //
- while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & B_UART_LSR_TEMT) == 0);
-
- //
- // Fill then entire Tx FIFO
- //
- for (Index = 0; Index < FifoSize && NumberOfBytes != 0; Index++, NumberOfBytes--, Buffer++) {
- //
- // Wait for the hardware flow control signal
- //
- while (!SerialPortWritable (SerialRegisterBase));
-
- //
- // Write byte to the transmit buffer.
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_TXBUF, *Buffer);
- }
- }
- return Result;
-}
-
-/**
- Reads data from a serial device into a buffer.
-
- @param Buffer Pointer to the data buffer to store the data read from the serial device.
- @param NumberOfBytes Number of bytes to read from the serial device.
-
- @retval 0 NumberOfBytes is 0.
- @retval >0 The number of bytes read from the serial device.
- If this value is less than NumberOfBytes, then the read operation failed.
-
-**/
-UINTN
-EFIAPI
-SerialPortRead (
- OUT UINT8 *Buffer,
- IN UINTN NumberOfBytes
- )
-{
- UINTN SerialRegisterBase;
- UINTN Result;
- UINT8 Mcr;
-
- if (NULL == Buffer) {
- return 0;
- }
-
- SerialRegisterBase = GetSerialRegisterBase ();
- if (SerialRegisterBase ==0) {
- return 0;
- }
-
- Mcr = (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_MCR) & ~B_UART_MCR_RTS);
-
- for (Result = 0; NumberOfBytes-- != 0; Result++, Buffer++) {
- //
- // Wait for the serial port to have some data.
- //
- while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & B_UART_LSR_RXRDY) == 0) {
- if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {
- //
- // Set RTS to let the peer send some data
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, (UINT8)(Mcr | B_UART_MCR_RTS));
- }
- }
- if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {
- //
- // Clear RTS to prevent peer from sending data
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, Mcr);
- }
-
- //
- // Read byte from the receive buffer.
- //
- *Buffer = SerialPortReadRegister (SerialRegisterBase, R_UART_RXBUF);
- }
-
- return Result;
-}
-
-
-/**
- Polls a serial device to see if there is any data waiting to be read.
-
- Polls a serial device to see if there is any data waiting to be read.\r
- If there is data waiting to be read from the serial device, then TRUE is returned.
- If there is no data waiting to be read from the serial device, then FALSE is returned.
-
- @retval TRUE Data is waiting to be read from the serial device.
- @retval FALSE There is no data waiting to be read from the serial device.
-
-**/
-BOOLEAN
-EFIAPI
-SerialPortPoll (
- VOID
- )
-{
- UINTN SerialRegisterBase;
-
- SerialRegisterBase = GetSerialRegisterBase ();
- if (SerialRegisterBase ==0) {
- return FALSE;
- }
-
- //
- // Read the serial port status
- //
- if ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & B_UART_LSR_RXRDY) != 0) {
- if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {
- //
- // Clear RTS to prevent peer from sending data
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_MCR) & ~B_UART_MCR_RTS));
- }
- return TRUE;
- }
-
- if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {
- //
- // Set RTS to let the peer send some data
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_MCR) | B_UART_MCR_RTS));
- }
-
- return FALSE;
-}
-
-/**
- Sets the control bits on a serial device.
-
- @param Control Sets the bits of Control that are settable.
-
- @retval RETURN_SUCCESS The new control bits were set on the serial device.
- @retval RETURN_UNSUPPORTED The serial device does not support this operation.
- @retval RETURN_DEVICE_ERROR The serial device is not functioning correctly.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortSetControl (
- IN UINT32 Control
- )
-{
- UINTN SerialRegisterBase;
- UINT8 Mcr;
-
- //
- // First determine the parameter is invalid.
- //
- if ((Control & (~(EFI_SERIAL_REQUEST_TO_SEND | EFI_SERIAL_DATA_TERMINAL_READY |
- EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE))) != 0) {
- return RETURN_UNSUPPORTED;
- }
-
- SerialRegisterBase = GetSerialRegisterBase ();
- if (SerialRegisterBase ==0) {
- return RETURN_UNSUPPORTED;
- }
-
- //
- // Read the Modem Control Register.
- //
- Mcr = SerialPortReadRegister (SerialRegisterBase, R_UART_MCR);
- Mcr &= (~(B_UART_MCR_DTRC | B_UART_MCR_RTS));
-
- if ((Control & EFI_SERIAL_DATA_TERMINAL_READY) == EFI_SERIAL_DATA_TERMINAL_READY) {
- Mcr |= B_UART_MCR_DTRC;
- }
-
- if ((Control & EFI_SERIAL_REQUEST_TO_SEND) == EFI_SERIAL_REQUEST_TO_SEND) {
- Mcr |= B_UART_MCR_RTS;
- }
-
- //
- // Write the Modem Control Register.
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, Mcr);
-
- return RETURN_SUCCESS;
-}
-
-/**
- Retrieve the status of the control bits on a serial device.
-
- @param Control A pointer to return the current control signals from the serial device.
-
- @retval RETURN_SUCCESS The control bits were read from the serial device.
- @retval RETURN_UNSUPPORTED The serial device does not support this operation.
- @retval RETURN_DEVICE_ERROR The serial device is not functioning correctly.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortGetControl (
- OUT UINT32 *Control
- )
-{
- UINTN SerialRegisterBase;
- UINT8 Msr;
- UINT8 Mcr;
- UINT8 Lsr;
-
- SerialRegisterBase = GetSerialRegisterBase ();
- if (SerialRegisterBase ==0) {
- return RETURN_UNSUPPORTED;
- }
-
- *Control = 0;
-
- //
- // Read the Modem Status Register.
- //
- Msr = SerialPortReadRegister (SerialRegisterBase, R_UART_MSR);
-
- if ((Msr & B_UART_MSR_CTS) == B_UART_MSR_CTS) {
- *Control |= EFI_SERIAL_CLEAR_TO_SEND;
- }
-
- if ((Msr & B_UART_MSR_DSR) == B_UART_MSR_DSR) {
- *Control |= EFI_SERIAL_DATA_SET_READY;
- }
-
- if ((Msr & B_UART_MSR_RI) == B_UART_MSR_RI) {
- *Control |= EFI_SERIAL_RING_INDICATE;
- }
-
- if ((Msr & B_UART_MSR_DCD) == B_UART_MSR_DCD) {
- *Control |= EFI_SERIAL_CARRIER_DETECT;
- }
-
- //
- // Read the Modem Control Register.
- //
- Mcr = SerialPortReadRegister (SerialRegisterBase, R_UART_MCR);
-
- if ((Mcr & B_UART_MCR_DTRC) == B_UART_MCR_DTRC) {
- *Control |= EFI_SERIAL_DATA_TERMINAL_READY;
- }
-
- if ((Mcr & B_UART_MCR_RTS) == B_UART_MCR_RTS) {
- *Control |= EFI_SERIAL_REQUEST_TO_SEND;
- }
-
- if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {
- *Control |= EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE;
- }
-
- //
- // Read the Line Status Register.
- //
- Lsr = SerialPortReadRegister (SerialRegisterBase, R_UART_LSR);
-
- if ((Lsr & (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) == (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) {
- *Control |= EFI_SERIAL_OUTPUT_BUFFER_EMPTY;
- }
-
- if ((Lsr & B_UART_LSR_RXRDY) == 0) {
- *Control |= EFI_SERIAL_INPUT_BUFFER_EMPTY;
- }
-
- return RETURN_SUCCESS;
-}
-
-/**
- Sets the baud rate, receive FIFO depth, transmit/receive time out, parity,\r
- data bits, and stop bits on a serial device.
-
- @param BaudRate The requested baud rate. A BaudRate value of 0 will use the
- device's default interface speed.
- On output, the value actually set.
- @param ReceiveFifoDepth The requested depth of the FIFO on the receive side of the\r
- serial interface. A ReceiveFifoDepth value of 0 will use
- the device's default FIFO depth.
- On output, the value actually set.
- @param Timeout The requested time out for a single character in microseconds.
- This timeout applies to both the transmit and receive side of the
- interface. A Timeout value of 0 will use the device's default time
- out value.
- On output, the value actually set.
- @param Parity The type of parity to use on this serial device. A Parity value of
- DefaultParity will use the device's default parity value.
- On output, the value actually set.
- @param DataBits The number of data bits to use on the serial device. A DataBits
- value of 0 will use the device's default data bit setting.\r
- On output, the value actually set.
- @param StopBits The number of stop bits to use on this serial device. A StopBits
- value of DefaultStopBits will use the device's default number of
- stop bits.
- On output, the value actually set.
-
- @retval RETURN_SUCCESS The new attributes were set on the serial device.
- @retval RETURN_UNSUPPORTED The serial device does not support this operation.
- @retval RETURN_INVALID_PARAMETER One or more of the attributes has an unsupported value.
- @retval RETURN_DEVICE_ERROR The serial device is not functioning correctly.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortSetAttributes (
- IN OUT UINT64 *BaudRate,
- IN OUT UINT32 *ReceiveFifoDepth,
- IN OUT UINT32 *Timeout,
- IN OUT EFI_PARITY_TYPE *Parity,
- IN OUT UINT8 *DataBits,
- IN OUT EFI_STOP_BITS_TYPE *StopBits
- )
-{
- UINTN SerialRegisterBase;
- UINT32 SerialBaudRate;
- UINTN Divisor;
- UINT8 Lcr;
- UINT8 LcrData;
- UINT8 LcrParity;
- UINT8 LcrStop;
-
- SerialRegisterBase = GetSerialRegisterBase ();
- if (SerialRegisterBase ==0) {
- return RETURN_UNSUPPORTED;
- }
-
- //
- // Check for default settings and fill in actual values.
- //
- if (*BaudRate == 0) {
- *BaudRate = PcdGet32 (PcdSerialBaudRate);
- }
- SerialBaudRate = (UINT32) *BaudRate;
-
- if (*DataBits == 0) {
- LcrData = (UINT8) (PcdGet8 (PcdSerialLineControl) & 0x3);
- *DataBits = LcrData + 5;
- } else {
- if ((*DataBits < 5) || (*DataBits > 8)) {
- return RETURN_INVALID_PARAMETER;
- }
- //
- // Map 5..8 to 0..3
- //
- LcrData = (UINT8) (*DataBits - (UINT8) 5);
- }
-
- if (*Parity == DefaultParity) {
- LcrParity = (UINT8) ((PcdGet8 (PcdSerialLineControl) >> 3) & 0x7);
- switch (LcrParity) {
- case 0:
- *Parity = NoParity;
- break;
-
- case 3:
- *Parity = EvenParity;
- break;
-
- case 1:
- *Parity = OddParity;
- break;
-
- case 7:
- *Parity = SpaceParity;
- break;
-
- case 5:
- *Parity = MarkParity;
- break;
-
- default:
- break;
- }
- } else {
- switch (*Parity) {
- case NoParity:
- LcrParity = 0;
- break;
-
- case EvenParity:
- LcrParity = 3;
- break;
-
- case OddParity:
- LcrParity = 1;
- break;
-
- case SpaceParity:
- LcrParity = 7;
- break;
-
- case MarkParity:
- LcrParity = 5;
- break;
-
- default:
- return RETURN_INVALID_PARAMETER;
- }
- }
-
- if (*StopBits == DefaultStopBits) {
- LcrStop = (UINT8) ((PcdGet8 (PcdSerialLineControl) >> 2) & 0x1);
- switch (LcrStop) {
- case 0:
- *StopBits = OneStopBit;
- break;
-
- case 1:
- if (*DataBits == 5) {
- *StopBits = OneFiveStopBits;
- } else {
- *StopBits = TwoStopBits;
- }
- break;
-
- default:
- break;
- }
- } else {
- switch (*StopBits) {
- case OneStopBit:
- LcrStop = 0;
- break;
-
- case OneFiveStopBits:
- case TwoStopBits:
- LcrStop = 1;
- break;
-
- default:
- return RETURN_INVALID_PARAMETER;
- }
- }
-
- //
- // Calculate divisor for baud generator
- // Ref_Clk_Rate / Baud_Rate / 16
- //
- Divisor = PcdGet32 (PcdSerialClockRate) / (SerialBaudRate * 16);
- if ((PcdGet32 (PcdSerialClockRate) % (SerialBaudRate * 16)) >= SerialBaudRate * 8) {
- Divisor++;
- }
-
- //
- // Configure baud rate
- //
- SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, B_UART_LCR_DLAB);
- SerialPortWriteRegister (SerialRegisterBase, R_UART_BAUD_HIGH, (UINT8) (Divisor >> 8));
- SerialPortWriteRegister (SerialRegisterBase, R_UART_BAUD_LOW, (UINT8) (Divisor & 0xff));
-
- //
- // Clear DLAB and configure Data Bits, Parity, and Stop Bits.
- // Strip reserved bits from line control value
- //
- Lcr = (UINT8) ((LcrParity << 3) | (LcrStop << 2) | LcrData);
- SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, (UINT8) (Lcr & 0x3F));
-
- return RETURN_SUCCESS;
-}
-
+++ /dev/null
-## @file
-# SerialPortLib instance for 16550 UART.
-#
-# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = BaseSerialPortLib16550
- MODULE_UNI_FILE = BaseSerialPortLib16550.uni
- FILE_GUID = 9E7C00CF-355A-4d4e-BF60-0428CFF95540
- MODULE_TYPE = BASE
- VERSION_STRING = 1.1
- LIBRARY_CLASS = SerialPortLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
-
-[LibraryClasses]
- PcdLib
- IoLib
- PlatformHookLib
- PciLib
-
-[Sources]
- BaseSerialPortLib16550.c
-
-[Pcd]
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable ## SOMETIMES_CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride ## CONSUMES
+++ /dev/null
-// /** @file
-// SerialPortLib instance for 16550 UART.
-//
-// SerialPortLib instance for 16550 UART.
-//
-// Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-//
-// SPDX-License-Identifier: BSD-2-Clause-Patent
-//
-// **/
-
-
-#string STR_MODULE_ABSTRACT #language en-US "SerialPortLib instance for 16550 UART"
-
-#string STR_MODULE_DESCRIPTION #language en-US "SerialPortLib instance for 16550 UART."
-
+++ /dev/null
-/** @file\r
- This library will parse the coreboot table in memory and extract those required\r
- information.\r
-\r
- Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#include <Uefi/UefiBaseType.h>\r
-#include <Library/BaseLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/IoLib.h>\r
-#include <Library/CbParseLib.h>\r
-\r
-#include <IndustryStandard/Acpi.h>\r
-\r
-#include "Coreboot.h"\r
-\r
-\r
-/**\r
- Convert a packed value from cbuint64 to a UINT64 value.\r
-\r
- @param val The pointer to packed data.\r
-\r
- @return the UNIT64 value after conversion.\r
-\r
-**/\r
-UINT64\r
-cb_unpack64 (\r
- IN struct cbuint64 val\r
- )\r
-{\r
- return LShiftU64 (val.hi, 32) | val.lo;\r
-}\r
-\r
-\r
-/**\r
- Returns the sum of all elements in a buffer of 16-bit values. During\r
- calculation, the carry bits are also been added.\r
-\r
- @param Buffer The pointer to the buffer to carry out the sum operation.\r
- @param Length The size, in bytes, of Buffer.\r
-\r
- @return Sum The sum of Buffer with carry bits included during additions.\r
-\r
-**/\r
-UINT16\r
-CbCheckSum16 (\r
- IN UINT16 *Buffer,\r
- IN UINTN Length\r
- )\r
-{\r
- UINT32 Sum, TmpValue;\r
- UINTN Idx;\r
- UINT8 *TmpPtr;\r
-\r
- Sum = 0;\r
- TmpPtr = (UINT8 *)Buffer;\r
- for(Idx = 0; Idx < Length; Idx++) {\r
- TmpValue = TmpPtr[Idx];\r
- if (Idx % 2 == 1) {\r
- TmpValue <<= 8;\r
- }\r
-\r
- Sum += TmpValue;\r
-\r
- // Wrap\r
- if (Sum >= 0x10000) {\r
- Sum = (Sum + (Sum >> 16)) & 0xFFFF;\r
- }\r
- }\r
-\r
- return (UINT16)((~Sum) & 0xFFFF);\r
-}\r
-\r
-\r
-/**\r
- Find coreboot record with given Tag from the memory Start in 4096\r
- bytes range.\r
-\r
- @param Start The start memory to be searched in\r
- @param Tag The tag id to be found\r
-\r
- @retval NULL The Tag is not found.\r
- @retval Others The pointer to the record found.\r
-\r
-**/\r
-VOID *\r
-EFIAPI\r
-FindCbTag (\r
- IN VOID *Start,\r
- IN UINT32 Tag\r
- )\r
-{\r
- struct cb_header *Header;\r
- struct cb_record *Record;\r
- UINT8 *TmpPtr;\r
- UINT8 *TagPtr;\r
- UINTN Idx;\r
- UINT16 CheckSum;\r
-\r
- Header = NULL;\r
- TmpPtr = (UINT8 *)Start;\r
- for (Idx = 0; Idx < 4096; Idx += 16, TmpPtr += 16) {\r
- Header = (struct cb_header *)TmpPtr;\r
- if (Header->signature == CB_HEADER_SIGNATURE) {\r
- break;\r
- }\r
- }\r
-\r
- if (Idx >= 4096) {\r
- return NULL;\r
- }\r
-\r
- if ((Header == NULL) || (Header->table_bytes == 0)) {\r
- return NULL;\r
- }\r
-\r
- //\r
- // Check the checksum of the coreboot table header\r
- //\r
- CheckSum = CbCheckSum16 ((UINT16 *)Header, sizeof (*Header));\r
- if (CheckSum != 0) {\r
- DEBUG ((EFI_D_ERROR, "Invalid coreboot table header checksum\n"));\r
- return NULL;\r
- }\r
-\r
- CheckSum = CbCheckSum16 ((UINT16 *)(TmpPtr + sizeof (*Header)), Header->table_bytes);\r
- if (CheckSum != Header->table_checksum) {\r
- DEBUG ((EFI_D_ERROR, "Incorrect checksum of all the coreboot table entries\n"));\r
- return NULL;\r
- }\r
-\r
- TagPtr = NULL;\r
- TmpPtr += Header->header_bytes;\r
- for (Idx = 0; Idx < Header->table_entries; Idx++) {\r
- Record = (struct cb_record *)TmpPtr;\r
- if (Record->tag == CB_TAG_FORWARD) {\r
- TmpPtr = (VOID *)(UINTN)((struct cb_forward *)(UINTN)Record)->forward;\r
- if (Tag == CB_TAG_FORWARD) {\r
- return TmpPtr;\r
- } else {\r
- return FindCbTag (TmpPtr, Tag);\r
- }\r
- }\r
- if (Record->tag == Tag) {\r
- TagPtr = TmpPtr;\r
- break;\r
- }\r
- TmpPtr += Record->size;\r
- }\r
-\r
- return TagPtr;\r
-}\r
-\r
-\r
-/**\r
- Find the given table with TableId from the given coreboot memory Root.\r
-\r
- @param Root The coreboot memory table to be searched in\r
- @param TableId Table id to be found\r
- @param pMemTable To save the base address of the memory table found\r
- @param pMemTableSize To save the size of memory table found\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory table.\r
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.\r
- @retval RETURN_NOT_FOUND Failed to find the memory table.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-FindCbMemTable (\r
- IN struct cbmem_root *Root,\r
- IN UINT32 TableId,\r
- OUT VOID **pMemTable,\r
- OUT UINT32 *pMemTableSize\r
- )\r
-{\r
- UINTN Idx;\r
- BOOLEAN IsImdEntry;\r
- struct cbmem_entry *Entries;\r
-\r
- if ((Root == NULL) || (pMemTable == NULL)) {\r
- return RETURN_INVALID_PARAMETER;\r
- }\r
- //\r
- // Check if the entry is CBMEM or IMD\r
- // and handle them separately\r
- //\r
- Entries = Root->entries;\r
- if (Entries[0].magic == CBMEM_ENTRY_MAGIC) {\r
- IsImdEntry = FALSE;\r
- } else {\r
- Entries = (struct cbmem_entry *)((struct imd_root *)Root)->entries;\r
- if (Entries[0].magic == IMD_ENTRY_MAGIC) {\r
- IsImdEntry = TRUE;\r
- } else {\r
- return RETURN_NOT_FOUND;\r
- }\r
- }\r
-\r
- for (Idx = 0; Idx < Root->num_entries; Idx++) {\r
- if (Entries[Idx].id == TableId) {\r
- if (IsImdEntry) {\r
- *pMemTable = (VOID *) ((UINTN)Entries[Idx].start + (UINTN)Root);\r
- } else {\r
- *pMemTable = (VOID *) (UINTN)Entries[Idx].start;\r
- }\r
- if (pMemTableSize != NULL) {\r
- *pMemTableSize = Entries[Idx].size;\r
- }\r
-\r
- DEBUG ((EFI_D_INFO, "Find CbMemTable Id 0x%x, base %p, size 0x%x\n",\r
- TableId, *pMemTable, Entries[Idx].size));\r
- return RETURN_SUCCESS;\r
- }\r
- }\r
-\r
- return RETURN_NOT_FOUND;\r
-}\r
-\r
-\r
-/**\r
- Acquire the memory information from the coreboot table in memory.\r
-\r
- @param MemInfoCallback The callback routine\r
- @param pParam Pointer to the callback routine parameter\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory information.\r
- @retval RETURN_NOT_FOUND Failed to find the memory information.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-CbParseMemoryInfo (\r
- IN CB_MEM_INFO_CALLBACK MemInfoCallback,\r
- IN VOID *pParam\r
- )\r
-{\r
- struct cb_memory *rec;\r
- struct cb_memory_range *Range;\r
- UINT64 Start;\r
- UINT64 Size;\r
- UINTN Index;\r
-\r
- //\r
- // Get the coreboot memory table\r
- //\r
- rec = (struct cb_memory *)FindCbTag (0, CB_TAG_MEMORY);\r
- if (rec == NULL) {\r
- rec = (struct cb_memory *)FindCbTag ((VOID *)(UINTN)PcdGet32 (PcdCbHeaderPointer), CB_TAG_MEMORY);\r
- }\r
-\r
- if (rec == NULL) {\r
- return RETURN_NOT_FOUND;\r
- }\r
-\r
- for (Index = 0; Index < MEM_RANGE_COUNT(rec); Index++) {\r
- Range = MEM_RANGE_PTR(rec, Index);\r
- Start = cb_unpack64(Range->start);\r
- Size = cb_unpack64(Range->size);\r
- DEBUG ((EFI_D_INFO, "%d. %016lx - %016lx [%02x]\n",\r
- Index, Start, Start + Size - 1, Range->type));\r
-\r
- MemInfoCallback (Start, Size, Range->type, pParam);\r
- }\r
-\r
- return RETURN_SUCCESS;\r
-}\r
-\r
-\r
-/**\r
- Acquire the coreboot memory table with the given table id\r
-\r
- @param TableId Table id to be searched\r
- @param pMemTable Pointer to the base address of the memory table\r
- @param pMemTableSize Pointer to the size of the memory table\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory table.\r
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.\r
- @retval RETURN_NOT_FOUND Failed to find the memory table.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-CbParseCbMemTable (\r
- IN UINT32 TableId,\r
- OUT VOID **pMemTable,\r
- OUT UINT32 *pMemTableSize\r
- )\r
-{\r
- struct cb_memory *rec;\r
- struct cb_memory_range *Range;\r
- UINT64 Start;\r
- UINT64 Size;\r
- UINTN Index;\r
-\r
- if (pMemTable == NULL) {\r
- return RETURN_INVALID_PARAMETER;\r
- }\r
- *pMemTable = NULL;\r
-\r
- //\r
- // Get the coreboot memory table\r
- //\r
- rec = (struct cb_memory *)FindCbTag (0, CB_TAG_MEMORY);\r
- if (rec == NULL) {\r
- rec = (struct cb_memory *)FindCbTag ((VOID *)(UINTN)PcdGet32 (PcdCbHeaderPointer), CB_TAG_MEMORY);\r
- }\r
-\r
- if (rec == NULL) {\r
- return RETURN_NOT_FOUND;\r
- }\r
-\r
- for (Index = 0; Index < MEM_RANGE_COUNT(rec); Index++) {\r
- Range = MEM_RANGE_PTR(rec, Index);\r
- Start = cb_unpack64(Range->start);\r
- Size = cb_unpack64(Range->size);\r
-\r
- if ((Range->type == CB_MEM_TABLE) && (Start > 0x1000)) {\r
- if (FindCbMemTable ((struct cbmem_root *)(UINTN)(Start + Size - DYN_CBMEM_ALIGN_SIZE), TableId, pMemTable, pMemTableSize) == RETURN_SUCCESS)\r
- return RETURN_SUCCESS;\r
- }\r
- }\r
-\r
- return RETURN_NOT_FOUND;\r
-}\r
-\r
-\r
-/**\r
- Acquire the acpi table from coreboot\r
-\r
- @param pMemTable Pointer to the base address of the memory table\r
- @param pMemTableSize Pointer to the size of the memory table\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory table.\r
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.\r
- @retval RETURN_NOT_FOUND Failed to find the memory table.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-CbParseAcpiTable (\r
- OUT VOID **pMemTable,\r
- OUT UINT32 *pMemTableSize\r
- )\r
-{\r
- return CbParseCbMemTable (SIGNATURE_32 ('I', 'P', 'C', 'A'), pMemTable, pMemTableSize);\r
-}\r
-\r
-/**\r
- Acquire the smbios table from coreboot\r
-\r
- @param pMemTable Pointer to the base address of the memory table\r
- @param pMemTableSize Pointer to the size of the memory table\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory table.\r
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.\r
- @retval RETURN_NOT_FOUND Failed to find the memory table.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-CbParseSmbiosTable (\r
- OUT VOID **pMemTable,\r
- OUT UINT32 *pMemTableSize\r
- )\r
-{\r
- return CbParseCbMemTable (SIGNATURE_32 ('T', 'B', 'M', 'S'), pMemTable, pMemTableSize);\r
-}\r
-\r
-/**\r
- Find the required fadt information\r
-\r
- @param pPmCtrlReg Pointer to the address of power management control register\r
- @param pPmTimerReg Pointer to the address of power management timer register\r
- @param pResetReg Pointer to the address of system reset register\r
- @param pResetValue Pointer to the value to be written to the system reset register\r
- @param pPmEvtReg Pointer to the address of power management event register\r
- @param pPmGpeEnReg Pointer to the address of power management GPE enable register\r
-\r
- @retval RETURN_SUCCESS Successfully find out all the required fadt information.\r
- @retval RETURN_NOT_FOUND Failed to find the fadt table.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-CbParseFadtInfo (\r
- OUT UINTN *pPmCtrlReg,\r
- OUT UINTN *pPmTimerReg,\r
- OUT UINTN *pResetReg,\r
- OUT UINTN *pResetValue,\r
- OUT UINTN *pPmEvtReg,\r
- OUT UINTN *pPmGpeEnReg\r
- )\r
-{\r
- EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp;\r
- EFI_ACPI_DESCRIPTION_HEADER *Rsdt;\r
- UINT32 *Entry32;\r
- UINTN Entry32Num;\r
- EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *Fadt;\r
- EFI_ACPI_DESCRIPTION_HEADER *Xsdt;\r
- UINT64 *Entry64;\r
- UINTN Entry64Num;\r
- UINTN Idx;\r
- RETURN_STATUS Status;\r
-\r
- Rsdp = NULL;\r
- Status = RETURN_SUCCESS;\r
-\r
- Status = CbParseAcpiTable ((VOID **)&Rsdp, NULL);\r
- if (RETURN_ERROR(Status)) {\r
- return Status;\r
- }\r
-\r
- if (Rsdp == NULL) {\r
- return RETURN_NOT_FOUND;\r
- }\r
-\r
- DEBUG ((EFI_D_INFO, "Find Rsdp at %p\n", Rsdp));\r
- DEBUG ((EFI_D_INFO, "Find Rsdt 0x%x, Xsdt 0x%lx\n", Rsdp->RsdtAddress, Rsdp->XsdtAddress));\r
-\r
- //\r
- // Search Rsdt First\r
- //\r
- Rsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->RsdtAddress);\r
- if (Rsdt != NULL) {\r
- Entry32 = (UINT32 *)(Rsdt + 1);\r
- Entry32Num = (Rsdt->Length - sizeof(EFI_ACPI_DESCRIPTION_HEADER)) >> 2;\r
- for (Idx = 0; Idx < Entry32Num; Idx++) {\r
- if (*(UINT32 *)(UINTN)(Entry32[Idx]) == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {\r
- Fadt = (EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)(UINTN)(Entry32[Idx]);\r
- if (pPmCtrlReg != NULL) {\r
- *pPmCtrlReg = Fadt->Pm1aCntBlk;\r
- }\r
- DEBUG ((EFI_D_INFO, "PmCtrl Reg 0x%x\n", Fadt->Pm1aCntBlk));\r
-\r
- if (pPmTimerReg != NULL) {\r
- *pPmTimerReg = Fadt->PmTmrBlk;\r
- }\r
- DEBUG ((EFI_D_INFO, "PmTimer Reg 0x%x\n", Fadt->PmTmrBlk));\r
-\r
- if (pResetReg != NULL) {\r
- *pResetReg = (UINTN)Fadt->ResetReg.Address;\r
- }\r
- DEBUG ((EFI_D_INFO, "Reset Reg 0x%lx\n", Fadt->ResetReg.Address));\r
-\r
- if (pResetValue != NULL) {\r
- *pResetValue = Fadt->ResetValue;\r
- }\r
- DEBUG ((EFI_D_INFO, "Reset Value 0x%x\n", Fadt->ResetValue));\r
-\r
- if (pPmEvtReg != NULL) {\r
- *pPmEvtReg = Fadt->Pm1aEvtBlk;\r
- DEBUG ((EFI_D_INFO, "PmEvt Reg 0x%x\n", Fadt->Pm1aEvtBlk));\r
- }\r
-\r
- if (pPmGpeEnReg != NULL) {\r
- *pPmGpeEnReg = Fadt->Gpe0Blk + Fadt->Gpe0BlkLen / 2;\r
- DEBUG ((EFI_D_INFO, "PmGpeEn Reg 0x%x\n", *pPmGpeEnReg));\r
- }\r
-\r
- //\r
- // Verify values for proper operation\r
- //\r
- ASSERT(Fadt->Pm1aCntBlk != 0);\r
- ASSERT(Fadt->PmTmrBlk != 0);\r
- ASSERT(Fadt->ResetReg.Address != 0);\r
- ASSERT(Fadt->Pm1aEvtBlk != 0);\r
- ASSERT(Fadt->Gpe0Blk != 0);\r
-\r
- DEBUG_CODE_BEGIN ();\r
- BOOLEAN SciEnabled;\r
-\r
- //\r
- // Check the consistency of SCI enabling\r
- //\r
-\r
- //\r
- // Get SCI_EN value\r
- //\r
- if (Fadt->Pm1CntLen == 4) {\r
- SciEnabled = (IoRead32 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALSE;\r
- } else {\r
- //\r
- // if (Pm1CntLen == 2), use 16 bit IO read;\r
- // if (Pm1CntLen != 2 && Pm1CntLen != 4), use 16 bit IO read as a fallback\r
- //\r
- SciEnabled = (IoRead16 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALSE;\r
- }\r
-\r
- if (!(Fadt->Flags & EFI_ACPI_5_0_HW_REDUCED_ACPI) &&\r
- (Fadt->SmiCmd == 0) &&\r
- !SciEnabled) {\r
- //\r
- // The ACPI enabling status is inconsistent: SCI is not enabled but ACPI\r
- // table does not provide a means to enable it through FADT->SmiCmd\r
- //\r
- DEBUG ((DEBUG_ERROR, "ERROR: The ACPI enabling status is inconsistent: SCI is not"\r
- " enabled but the ACPI table does not provide a means to enable it through FADT->SmiCmd."\r
- " This may cause issues in OS.\n"));\r
- ASSERT (FALSE);\r
- }\r
- DEBUG_CODE_END ();\r
- return RETURN_SUCCESS;\r
- }\r
- }\r
- }\r
-\r
- //\r
- // Search Xsdt Second\r
- //\r
- Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->XsdtAddress);\r
- if (Xsdt != NULL) {\r
- Entry64 = (UINT64 *)(Xsdt + 1);\r
- Entry64Num = (Xsdt->Length - sizeof(EFI_ACPI_DESCRIPTION_HEADER)) >> 3;\r
- for (Idx = 0; Idx < Entry64Num; Idx++) {\r
- if (*(UINT32 *)(UINTN)(Entry64[Idx]) == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {\r
- Fadt = (EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)(UINTN)(Entry64[Idx]);\r
- if (pPmCtrlReg)\r
- *pPmCtrlReg = Fadt->Pm1aCntBlk;\r
- DEBUG ((EFI_D_ERROR, "PmCtrl Reg 0x%x\n", Fadt->Pm1aCntBlk));\r
-\r
- if (pPmTimerReg)\r
- *pPmTimerReg = Fadt->PmTmrBlk;\r
- DEBUG ((EFI_D_ERROR, "PmTimer Reg 0x%x\n", Fadt->PmTmrBlk));\r
-\r
- if (pResetReg)\r
- *pResetReg = (UINTN)Fadt->ResetReg.Address;\r
- DEBUG ((EFI_D_ERROR, "Reset Reg 0x%lx\n", Fadt->ResetReg.Address));\r
-\r
- if (pResetValue)\r
- *pResetValue = Fadt->ResetValue;\r
- DEBUG ((EFI_D_ERROR, "Reset Value 0x%x\n", Fadt->ResetValue));\r
-\r
- if (pPmEvtReg != NULL) {\r
- *pPmEvtReg = Fadt->Pm1aEvtBlk;\r
- DEBUG ((EFI_D_INFO, "PmEvt Reg 0x%x\n", Fadt->Pm1aEvtBlk));\r
- }\r
-\r
- if (pPmGpeEnReg != NULL) {\r
- *pPmGpeEnReg = Fadt->Gpe0Blk + Fadt->Gpe0BlkLen / 2;\r
- DEBUG ((EFI_D_INFO, "PmGpeEn Reg 0x%x\n", *pPmGpeEnReg));\r
- }\r
- return RETURN_SUCCESS;\r
- }\r
- }\r
- }\r
-\r
- return RETURN_NOT_FOUND;\r
-}\r
-\r
-/**\r
- Find the serial port information\r
-\r
- @param pRegBase Pointer to the base address of serial port registers\r
- @param pRegAccessType Pointer to the access type of serial port registers\r
- @param pRegWidth Pointer to the register width in bytes\r
- @param pBaudrate Pointer to the serial port baudrate\r
- @param pInputHertz Pointer to the input clock frequency\r
- @param pUartPciAddr Pointer to the UART PCI bus, dev and func address\r
-\r
- @retval RETURN_SUCCESS Successfully find the serial port information.\r
- @retval RETURN_NOT_FOUND Failed to find the serial port information .\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-CbParseSerialInfo (\r
- OUT UINT32 *pRegBase,\r
- OUT UINT32 *pRegAccessType,\r
- OUT UINT32 *pRegWidth,\r
- OUT UINT32 *pBaudrate,\r
- OUT UINT32 *pInputHertz,\r
- OUT UINT32 *pUartPciAddr\r
- )\r
-{\r
- struct cb_serial *CbSerial;\r
-\r
- CbSerial = FindCbTag (0, CB_TAG_SERIAL);\r
- if (CbSerial == NULL) {\r
- CbSerial = FindCbTag ((VOID *)(UINTN)PcdGet32 (PcdCbHeaderPointer), CB_TAG_SERIAL);\r
- }\r
-\r
- if (CbSerial == NULL) {\r
- return RETURN_NOT_FOUND;\r
- }\r
-\r
- if (pRegBase != NULL) {\r
- *pRegBase = CbSerial->baseaddr;\r
- }\r
-\r
- if (pRegWidth != NULL) {\r
- *pRegWidth = CbSerial->regwidth;\r
- }\r
-\r
- if (pRegAccessType != NULL) {\r
- *pRegAccessType = CbSerial->type;\r
- }\r
-\r
- if (pBaudrate != NULL) {\r
- *pBaudrate = CbSerial->baud;\r
- }\r
-\r
- if (pInputHertz != NULL) {\r
- *pInputHertz = CbSerial->input_hertz;\r
- }\r
-\r
- if (pUartPciAddr != NULL) {\r
- *pUartPciAddr = CbSerial->uart_pci_addr;\r
- }\r
-\r
- return RETURN_SUCCESS;\r
-}\r
-\r
-/**\r
- Search for the coreboot table header\r
-\r
- @param Level Level of the search depth\r
- @param HeaderPtr Pointer to the pointer of coreboot table header\r
-\r
- @retval RETURN_SUCCESS Successfully find the coreboot table header .\r
- @retval RETURN_NOT_FOUND Failed to find the coreboot table header .\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-CbParseGetCbHeader (\r
- IN UINTN Level,\r
- OUT VOID **HeaderPtr\r
- )\r
-{\r
- UINTN Index;\r
- VOID *TempPtr;\r
-\r
- if (HeaderPtr == NULL) {\r
- return RETURN_NOT_FOUND;\r
- }\r
-\r
- TempPtr = NULL;\r
- for (Index = 0; Index < Level; Index++) {\r
- TempPtr = FindCbTag (TempPtr, CB_TAG_FORWARD);\r
- if (TempPtr == NULL) {\r
- break;\r
- }\r
- }\r
-\r
- if ((Index >= Level) && (TempPtr != NULL)) {\r
- *HeaderPtr = TempPtr;\r
- return RETURN_SUCCESS;\r
- }\r
-\r
- return RETURN_NOT_FOUND;\r
-}\r
-\r
-/**\r
- Find the video frame buffer information\r
-\r
- @param pFbInfo Pointer to the FRAME_BUFFER_INFO structure\r
-\r
- @retval RETURN_SUCCESS Successfully find the video frame buffer information.\r
- @retval RETURN_NOT_FOUND Failed to find the video frame buffer information .\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-CbParseFbInfo (\r
- OUT FRAME_BUFFER_INFO *pFbInfo\r
- )\r
-{\r
- struct cb_framebuffer *CbFbRec;\r
-\r
- if (pFbInfo == NULL) {\r
- return RETURN_INVALID_PARAMETER;\r
- }\r
-\r
- CbFbRec = FindCbTag (0, CB_TAG_FRAMEBUFFER);\r
- if (CbFbRec == NULL) {\r
- CbFbRec = FindCbTag ((VOID *)(UINTN)PcdGet32 (PcdCbHeaderPointer), CB_TAG_FRAMEBUFFER);\r
- }\r
-\r
- if (CbFbRec == NULL) {\r
- return RETURN_NOT_FOUND;\r
- }\r
-\r
- DEBUG ((EFI_D_INFO, "Found coreboot video frame buffer information\n"));\r
- DEBUG ((EFI_D_INFO, "physical_address: 0x%lx\n", CbFbRec->physical_address));\r
- DEBUG ((EFI_D_INFO, "x_resolution: 0x%x\n", CbFbRec->x_resolution));\r
- DEBUG ((EFI_D_INFO, "y_resolution: 0x%x\n", CbFbRec->y_resolution));\r
- DEBUG ((EFI_D_INFO, "bits_per_pixel: 0x%x\n", CbFbRec->bits_per_pixel));\r
- DEBUG ((EFI_D_INFO, "bytes_per_line: 0x%x\n", CbFbRec->bytes_per_line));\r
-\r
- DEBUG ((EFI_D_INFO, "red_mask_size: 0x%x\n", CbFbRec->red_mask_size));\r
- DEBUG ((EFI_D_INFO, "red_mask_pos: 0x%x\n", CbFbRec->red_mask_pos));\r
- DEBUG ((EFI_D_INFO, "green_mask_size: 0x%x\n", CbFbRec->green_mask_size));\r
- DEBUG ((EFI_D_INFO, "green_mask_pos: 0x%x\n", CbFbRec->green_mask_pos));\r
- DEBUG ((EFI_D_INFO, "blue_mask_size: 0x%x\n", CbFbRec->blue_mask_size));\r
- DEBUG ((EFI_D_INFO, "blue_mask_pos: 0x%x\n", CbFbRec->blue_mask_pos));\r
- DEBUG ((EFI_D_INFO, "reserved_mask_size: 0x%x\n", CbFbRec->reserved_mask_size));\r
- DEBUG ((EFI_D_INFO, "reserved_mask_pos: 0x%x\n", CbFbRec->reserved_mask_pos));\r
-\r
- pFbInfo->LinearFrameBuffer = CbFbRec->physical_address;\r
- pFbInfo->HorizontalResolution = CbFbRec->x_resolution;\r
- pFbInfo->VerticalResolution = CbFbRec->y_resolution;\r
- pFbInfo->BitsPerPixel = CbFbRec->bits_per_pixel;\r
- pFbInfo->BytesPerScanLine = (UINT16)CbFbRec->bytes_per_line;\r
- pFbInfo->Red.Mask = (1 << CbFbRec->red_mask_size) - 1;\r
- pFbInfo->Red.Position = CbFbRec->red_mask_pos;\r
- pFbInfo->Green.Mask = (1 << CbFbRec->green_mask_size) - 1;\r
- pFbInfo->Green.Position = CbFbRec->green_mask_pos;\r
- pFbInfo->Blue.Mask = (1 << CbFbRec->blue_mask_size) - 1;\r
- pFbInfo->Blue.Position = CbFbRec->blue_mask_pos;\r
- pFbInfo->Reserved.Mask = (1 << CbFbRec->reserved_mask_size) - 1;\r
- pFbInfo->Reserved.Position = CbFbRec->reserved_mask_pos;\r
-\r
- return RETURN_SUCCESS;\r
-}\r
-\r
+++ /dev/null
-## @file\r
-# Coreboot Table Parse Library.\r
-#\r
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
-# SPDX-License-Identifier: BSD-2-Clause-Patent\r
-# \r
-##\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = CbParseLib\r
- FILE_GUID = 49EDFC9E-5945-4386-9C0B-C9B60CD45BB1\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = CbParseLib\r
-\r
-#\r
-# The following information is for reference only and not required by the build tools.\r
-#\r
-# VALID_ARCHITECTURES = IA32 X64\r
-#\r
-\r
-[Sources]\r
- CbParseLib.c\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- CorebootModulePkg/CorebootModulePkg.dec \r
-\r
-[LibraryClasses]\r
- BaseLib\r
- BaseMemoryLib\r
- IoLib\r
- DebugLib\r
- PcdLib\r
-\r
-[Pcd] \r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdCbHeaderPointer
\ No newline at end of file
+++ /dev/null
-/** @file
- Include all platform specific features which can be customized by IBV/OEM.
-
-Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include <Uefi.h>
-#include <Library/BaseLib.h>
-#include <Library/UefiLib.h>
-#include <Library/CbPlatformSupportLib.h>
-
-/**
- Parse platform specific information from coreboot.
-
- @retval RETURN_SUCCESS The platform specific coreboot support succeeded.
- @retval RETURN_DEVICE_ERROR The platform specific coreboot support could not be completed.
-
-**/
-EFI_STATUS
-EFIAPI
-CbParsePlatformInfo (
- VOID
- )
-{
- return EFI_SUCCESS;
-}
-
+++ /dev/null
-## @file
-# Include all platform specific features which can be customized by IBV/OEM.
-#
-# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = CbPlatformSupportLib
- MODULE_UNI_FILE = CbPlatformSupportLibNull.uni
- FILE_GUID = B42AA265-00CA-4d4b-AC14-DBD5268E1BC7
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = CbPlatformSupportLib
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64 EBC
-#
-
-[Sources]
- CbPlatformSupportLibNull.c
-
-[Packages]
- MdePkg/MdePkg.dec
- CorebootModulePkg/CorebootModulePkg.dec
+++ /dev/null
-// /** @file
-// NULL implementation for CbPlatformSupportLib library class interfaces.
-//
-// Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-//
-// SPDX-License-Identifier: BSD-2-Clause-Patent
-//
-// **/
-
-
-#string STR_MODULE_ABSTRACT #language en-US "NULL implementation for CbPlatformSupportLib library class interfaces"
-
-#string STR_MODULE_DESCRIPTION #language en-US "NULL implementation for CbPlatformSupportLib library class interfaces."
-
+++ /dev/null
-/** @file
- UEFI Component Name(2) protocol implementation for Sata Controller driver.
-
- Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SataController.h"
-
-//
-/// EFI Component Name Protocol
-///
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gSataControllerComponentName = {
- SataControllerComponentNameGetDriverName,
- SataControllerComponentNameGetControllerName,
- "eng"
-};
-
-//
-/// EFI Component Name 2 Protocol
-///
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gSataControllerComponentName2 = {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) SataControllerComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) SataControllerComponentNameGetControllerName,
- "en"
-};
-
-//
-/// Driver Name Strings
-///
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSataControllerDriverNameTable[] = {
- {
- "eng;en",
- (CHAR16 *)L"Sata Controller Init Driver"
- },
- {
- NULL,
- NULL
- }
-};
-
-///
-/// Controller Name Strings
-///
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSataControllerControllerNameTable[] = {
- {
- "eng;en",
- (CHAR16 *)L"Sata Controller"
- },
- {
- NULL,
- NULL
- }
-};
-
-/**
- Retrieves a Unicode string that is the user readable name of the UEFI Driver.
-
- @param This A pointer to the EFI_COMPONENT_NAME_PROTOCOL instance.
- @param Language A pointer to a three character ISO 639-2 language identifier.
- This is the language of the driver name that that the caller
- is requesting, and it must match one of the languages specified
- in SupportedLanguages. The number of languages supported by a
- driver is up to the driver writer.
- @param DriverName A pointer to the Unicode string to return. This Unicode string
- is the name of the driver specified by This in the language
- specified by Language.
-
- @retval EFI_SUCCESS The Unicode string for the Driver specified by This
- and the language specified by Language was returned
- in DriverName.
- @retval EFI_INVALID_PARAMETER Language is NULL.
- @retval EFI_INVALID_PARAMETER DriverName is NULL.
- @retval EFI_UNSUPPORTED The driver specified by This does not support the
- language specified by Language.
-**/
-EFI_STATUS
-EFIAPI
-SataControllerComponentNameGetDriverName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN CHAR8 *Language,
- OUT CHAR16 **DriverName
- )
-{
- return LookupUnicodeString2 (
- Language,
- This->SupportedLanguages,
- mSataControllerDriverNameTable,
- DriverName,
- (BOOLEAN)(This == &gSataControllerComponentName)
- );
-}
-
-/**
- Retrieves a Unicode string that is the user readable name of the controller
- that is being managed by an UEFI Driver.
-
- @param This A pointer to the EFI_COMPONENT_NAME_PROTOCOL instance.
- @param ControllerHandle The handle of a controller that the driver specified by
- This is managing. This handle specifies the controller
- whose name is to be returned.
- @param ChildHandle OPTIONAL The handle of the child controller to retrieve the name
- of. This is an optional parameter that may be NULL. It
- will be NULL for device drivers. It will also be NULL
- for a bus drivers that wish to retrieve the name of the
- bus controller. It will not be NULL for a bus driver
- that wishes to retrieve the name of a child controller.
- @param Language A pointer to a three character ISO 639-2 language
- identifier. This is the language of the controller name
- that that the caller is requesting, and it must match one
- of the languages specified in SupportedLanguages. The
- number of languages supported by a driver is up to the
- driver writer.
- @param ControllerName A pointer to the Unicode string to return. This Unicode
- string is the name of the controller specified by
- ControllerHandle and ChildHandle in the language
- specified by Language from the point of view of the
- driver specified by This.
-
- @retval EFI_SUCCESS The Unicode string for the user readable name in the
- language specified by Language for the driver
- specified by This was returned in DriverName.
- @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE.
- @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid
- EFI_HANDLE.
- @retval EFI_INVALID_PARAMETER Language is NULL.
- @retval EFI_INVALID_PARAMETER ControllerName is NULL.
- @retval EFI_UNSUPPORTED The driver specified by This is not currently
- managing the controller specified by
- ControllerHandle and ChildHandle.
- @retval EFI_UNSUPPORTED The driver specified by This does not support the
- language specified by Language.
-**/
-EFI_STATUS
-EFIAPI
-SataControllerComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
- )
-{
- EFI_STATUS Status;
-
- //
- // Make sure this driver is currently managing ControllHandle
- //
- Status = EfiTestManagedDevice (
- ControllerHandle,
- gSataControllerDriverBinding.DriverBindingHandle,
- &gEfiPciIoProtocolGuid
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- if (ChildHandle != NULL) {
- return EFI_UNSUPPORTED;
- }
-
- return LookupUnicodeString2 (
- Language,
- This->SupportedLanguages,
- mSataControllerControllerNameTable,
- ControllerName,
- (BOOLEAN)(This == &gSataControllerComponentName)
- );
-}
+++ /dev/null
-/** @file
- This driver module produces IDE_CONTROLLER_INIT protocol for Sata Controllers.
-
- Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SataController.h"
-
-///
-/// EFI_DRIVER_BINDING_PROTOCOL instance
-///
-EFI_DRIVER_BINDING_PROTOCOL gSataControllerDriverBinding = {
- SataControllerSupported,
- SataControllerStart,
- SataControllerStop,
- 0xa,
- NULL,
- NULL
-};
-
-/**
- Read AHCI Operation register.
-
- @param PciIo The PCI IO protocol instance.
- @param Offset The operation register offset.
-
- @return The register content read.
-
-**/
-UINT32
-EFIAPI
-AhciReadReg (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT32 Offset
- )
-{
- UINT32 Data;
-
- ASSERT (PciIo != NULL);
-
- Data = 0;
-
- PciIo->Mem.Read (
- PciIo,
- EfiPciIoWidthUint32,
- AHCI_BAR_INDEX,
- (UINT64) Offset,
- 1,
- &Data
- );
-
- return Data;
-}
-
-/**
- Write AHCI Operation register.
-
- @param PciIo The PCI IO protocol instance.
- @param Offset The operation register offset.
- @param Data The data used to write down.
-
-**/
-VOID
-EFIAPI
-AhciWriteReg (
- IN EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT32 Offset,
- IN UINT32 Data
- )
-{
- ASSERT (PciIo != NULL);
-
- PciIo->Mem.Write (
- PciIo,
- EfiPciIoWidthUint32,
- AHCI_BAR_INDEX,
- (UINT64) Offset,
- 1,
- &Data
- );
-
- return;
-}
-
-/**
- This function is used to calculate the best PIO mode supported by specific IDE device
-
- @param IdentifyData The identify data of specific IDE device.
- @param DisPioMode Disqualified PIO modes collection.
- @param SelectedMode Available PIO modes collection.
-
- @retval EFI_SUCCESS Best PIO modes are returned.
- @retval EFI_UNSUPPORTED The device doesn't support PIO mode,
- or all supported modes have been disqualified.
-**/
-EFI_STATUS
-CalculateBestPioMode (
- IN EFI_IDENTIFY_DATA *IdentifyData,
- IN UINT16 *DisPioMode OPTIONAL,
- OUT UINT16 *SelectedMode
- )
-{
- UINT16 PioMode;
- UINT16 AdvancedPioMode;
- UINT16 Temp;
- UINT16 Index;
- UINT16 MinimumPioCycleTime;
-
- Temp = 0xff;
-
- PioMode = (UINT8) (((ATA5_IDENTIFY_DATA *) (&(IdentifyData->AtaData)))->pio_cycle_timing >> 8);
-
- //
- // See whether Identify Data word 64 - 70 are valid
- //
- if ((IdentifyData->AtaData.field_validity & 0x02) == 0x02) {
-
- AdvancedPioMode = IdentifyData->AtaData.advanced_pio_modes;
- DEBUG ((EFI_D_INFO, "CalculateBestPioMode: AdvancedPioMode = %x\n", AdvancedPioMode));
-
- for (Index = 0; Index < 8; Index++) {
- if ((AdvancedPioMode & 0x01) != 0) {
- Temp = Index;
- }
-
- AdvancedPioMode >>= 1;
- }
-
- //
- // If Temp is modified, mean the advanced_pio_modes is not zero;
- // if Temp is not modified, mean there is no advanced PIO mode supported,
- // the best PIO Mode is the value in pio_cycle_timing.
- //
- if (Temp != 0xff) {
- AdvancedPioMode = (UINT16) (Temp + 3);
- } else {
- AdvancedPioMode = PioMode;
- }
-
- //
- // Limit the PIO mode to at most PIO4.
- //
- PioMode = (UINT16) MIN (AdvancedPioMode, 4);
-
- MinimumPioCycleTime = IdentifyData->AtaData.min_pio_cycle_time_with_flow_control;
-
- if (MinimumPioCycleTime <= 120) {
- PioMode = (UINT16) MIN (4, PioMode);
- } else if (MinimumPioCycleTime <= 180) {
- PioMode = (UINT16) MIN (3, PioMode);
- } else if (MinimumPioCycleTime <= 240) {
- PioMode = (UINT16) MIN (2, PioMode);
- } else {
- PioMode = 0;
- }
-
- //
- // Degrade the PIO mode if the mode has been disqualified
- //
- if (DisPioMode != NULL) {
- if (*DisPioMode < 2) {
- return EFI_UNSUPPORTED; // no mode below ATA_PIO_MODE_BELOW_2
- }
-
- if (PioMode >= *DisPioMode) {
- PioMode = (UINT16) (*DisPioMode - 1);
- }
- }
-
- if (PioMode < 2) {
- *SelectedMode = 1; // ATA_PIO_MODE_BELOW_2;
- } else {
- *SelectedMode = PioMode; // ATA_PIO_MODE_2 to ATA_PIO_MODE_4;
- }
-
- } else {
- //
- // Identify Data word 64 - 70 are not valid
- // Degrade the PIO mode if the mode has been disqualified
- //
- if (DisPioMode != NULL) {
- if (*DisPioMode < 2) {
- return EFI_UNSUPPORTED; // no mode below ATA_PIO_MODE_BELOW_2
- }
-
- if (PioMode == *DisPioMode) {
- PioMode--;
- }
- }
-
- if (PioMode < 2) {
- *SelectedMode = 1; // ATA_PIO_MODE_BELOW_2;
- } else {
- *SelectedMode = 2; // ATA_PIO_MODE_2;
- }
-
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- This function is used to calculate the best UDMA mode supported by specific IDE device
-
- @param IdentifyData The identify data of specific IDE device.
- @param DisUDmaMode Disqualified UDMA modes collection.
- @param SelectedMode Available UDMA modes collection.
-
- @retval EFI_SUCCESS Best UDMA modes are returned.
- @retval EFI_UNSUPPORTED The device doesn't support UDMA mode,
- or all supported modes have been disqualified.
-**/
-EFI_STATUS
-CalculateBestUdmaMode (
- IN EFI_IDENTIFY_DATA *IdentifyData,
- IN UINT16 *DisUDmaMode OPTIONAL,
- OUT UINT16 *SelectedMode
- )
-{
- UINT16 TempMode;
- UINT16 DeviceUDmaMode;
-
- DeviceUDmaMode = 0;
-
- //
- // Check whether the WORD 88 (supported UltraDMA by drive) is valid
- //
- if ((IdentifyData->AtaData.field_validity & 0x04) == 0x00) {
- return EFI_UNSUPPORTED;
- }
-
- DeviceUDmaMode = IdentifyData->AtaData.ultra_dma_mode;
- DEBUG ((EFI_D_INFO, "CalculateBestUdmaMode: DeviceUDmaMode = %x\n", DeviceUDmaMode));
- DeviceUDmaMode &= 0x3f;
- TempMode = 0; // initialize it to UDMA-0
-
- while ((DeviceUDmaMode >>= 1) != 0) {
- TempMode++;
- }
-
- //
- // Degrade the UDMA mode if the mode has been disqualified
- //
- if (DisUDmaMode != NULL) {
- if (*DisUDmaMode == 0) {
- *SelectedMode = 0;
- return EFI_UNSUPPORTED; // no mode below ATA_UDMA_MODE_0
- }
-
- if (TempMode >= *DisUDmaMode) {
- TempMode = (UINT16) (*DisUDmaMode - 1);
- }
- }
-
- //
- // Possible returned mode is between ATA_UDMA_MODE_0 and ATA_UDMA_MODE_5
- //
- *SelectedMode = TempMode;
-
- return EFI_SUCCESS;
-}
-
-/**
- The Entry Point of module. It follows the standard UEFI driver model.
-
- @param[in] ImageHandle The firmware allocated handle for the EFI image.
- @param[in] SystemTable A pointer to the EFI System Table.
-
- @retval EFI_SUCCESS The entry point is executed successfully.
- @retval other Some error occurs when executing this entry point.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeSataControllerDriver (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
-
- //
- // Install driver model protocol(s).
- //
- Status = EfiLibInstallDriverBindingComponentName2 (
- ImageHandle,
- SystemTable,
- &gSataControllerDriverBinding,
- ImageHandle,
- &gSataControllerComponentName,
- &gSataControllerComponentName2
- );
- ASSERT_EFI_ERROR (Status);
-
- return Status;
-}
-
-/**
- Supported function of Driver Binding protocol for this driver.
- Test to see if this driver supports ControllerHandle.
-
- @param This Protocol instance pointer.
- @param Controller Handle of device to test.
- @param RemainingDevicePath A pointer to the device path.
- it should be ignored by device driver.
-
- @retval EFI_SUCCESS This driver supports this device.
- @retval EFI_ALREADY_STARTED This driver is already running on this device.
- @retval other This driver does not support this device.
-
-**/
-EFI_STATUS
-EFIAPI
-SataControllerSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
- )
-{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- PCI_TYPE00 PciData;
-
- //
- // Attempt to open PCI I/O Protocol
- //
- Status = gBS->OpenProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_GET_PROTOCOL
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Now further check the PCI header: Base Class (offset 0x0B) and
- // Sub Class (offset 0x0A). This controller should be an SATA controller
- //
- Status = PciIo->Pci.Read (
- PciIo,
- EfiPciIoWidthUint8,
- PCI_CLASSCODE_OFFSET,
- sizeof (PciData.Hdr.ClassCode),
- PciData.Hdr.ClassCode
- );
- if (EFI_ERROR (Status)) {
- return EFI_UNSUPPORTED;
- }
-
- if (IS_PCI_IDE (&PciData) || IS_PCI_SATADPA (&PciData)) {
- return EFI_SUCCESS;
- }
-
- return EFI_UNSUPPORTED;
-}
-
-/**
- This routine is called right after the .Supported() called and
- Start this driver on ControllerHandle.
-
- @param This Protocol instance pointer.
- @param Controller Handle of device to bind driver to.
- @param RemainingDevicePath A pointer to the device path.
- it should be ignored by device driver.
-
- @retval EFI_SUCCESS This driver is added to this device.
- @retval EFI_ALREADY_STARTED This driver is already running on this device.
- @retval other Some error occurs when binding this driver to this device.
-
-**/
-EFI_STATUS
-EFIAPI
-SataControllerStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
- )
-{
- EFI_STATUS Status;
- EFI_PCI_IO_PROTOCOL *PciIo;
- PCI_TYPE00 PciData;
- EFI_SATA_CONTROLLER_PRIVATE_DATA *SataPrivateData;
- UINT32 Data32;
- UINTN ChannelDeviceCount;
-
- DEBUG ((EFI_D_INFO, "SataControllerStart START\n"));
-
- SataPrivateData = NULL;
-
- //
- // Now test and open PCI I/O Protocol
- //
- Status = gBS->OpenProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- (VOID **) &PciIo,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_BY_DRIVER
- );
- if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "SataControllerStart error return status = %r\n", Status));
- return Status;
- }
-
- //
- // Allocate Sata Private Data structure
- //
- SataPrivateData = AllocateZeroPool (sizeof (EFI_SATA_CONTROLLER_PRIVATE_DATA));
- if (SataPrivateData == NULL) {
- Status = EFI_OUT_OF_RESOURCES;
- goto Done;
- }
-
- //
- // Initialize Sata Private Data
- //
- SataPrivateData->Signature = SATA_CONTROLLER_SIGNATURE;
- SataPrivateData->PciIo = PciIo;
- SataPrivateData->IdeInit.GetChannelInfo = IdeInitGetChannelInfo;
- SataPrivateData->IdeInit.NotifyPhase = IdeInitNotifyPhase;
- SataPrivateData->IdeInit.SubmitData = IdeInitSubmitData;
- SataPrivateData->IdeInit.DisqualifyMode = IdeInitDisqualifyMode;
- SataPrivateData->IdeInit.CalculateMode = IdeInitCalculateMode;
- SataPrivateData->IdeInit.SetTiming = IdeInitSetTiming;
- SataPrivateData->IdeInit.EnumAll = SATA_ENUMER_ALL;
-
- Status = PciIo->Pci.Read (
- PciIo,
- EfiPciIoWidthUint8,
- PCI_CLASSCODE_OFFSET,
- sizeof (PciData.Hdr.ClassCode),
- PciData.Hdr.ClassCode
- );
- ASSERT_EFI_ERROR (Status);
-
- if (IS_PCI_IDE (&PciData)) {
- SataPrivateData->IdeInit.ChannelCount = IDE_MAX_CHANNEL;
- SataPrivateData->DeviceCount = IDE_MAX_DEVICES;
- } else if (IS_PCI_SATADPA (&PciData)) {
- //
- // Read Host Capability Register(CAP) to get Number of Ports(NPS) and Supports Port Multiplier(SPM)
- // NPS is 0's based value indicating the maximum number of ports supported by the HBA silicon.
- // A maximum of 32 ports can be supported. A value of '0h', indicating one port, is the minimum requirement.
- //
- Data32 = AhciReadReg (PciIo, R_AHCI_CAP);
- SataPrivateData->IdeInit.ChannelCount = (UINT8) ((Data32 & B_AHCI_CAP_NPS) + 1);
- SataPrivateData->DeviceCount = AHCI_MAX_DEVICES;
- if ((Data32 & B_AHCI_CAP_SPM) == B_AHCI_CAP_SPM) {
- SataPrivateData->DeviceCount = AHCI_MULTI_MAX_DEVICES;
- }
- }
-
- ChannelDeviceCount = (UINTN) (SataPrivateData->IdeInit.ChannelCount) * (UINTN) (SataPrivateData->DeviceCount);
- SataPrivateData->DisqualifiedModes = AllocateZeroPool ((sizeof (EFI_ATA_COLLECTIVE_MODE)) * ChannelDeviceCount);
- if (SataPrivateData->DisqualifiedModes == NULL) {
- Status = EFI_OUT_OF_RESOURCES;
- goto Done;
- }
-
- SataPrivateData->IdentifyData = AllocateZeroPool ((sizeof (EFI_IDENTIFY_DATA)) * ChannelDeviceCount);
- if (SataPrivateData->IdentifyData == NULL) {
- Status = EFI_OUT_OF_RESOURCES;
- goto Done;
- }
-
- SataPrivateData->IdentifyValid = AllocateZeroPool ((sizeof (BOOLEAN)) * ChannelDeviceCount);
- if (SataPrivateData->IdentifyValid == NULL) {
- Status = EFI_OUT_OF_RESOURCES;
- goto Done;
- }
-
- //
- // Install IDE Controller Init Protocol to this instance
- //
- Status = gBS->InstallMultipleProtocolInterfaces (
- &Controller,
- &gEfiIdeControllerInitProtocolGuid,
- &(SataPrivateData->IdeInit),
- NULL
- );
-
-Done:
- if (EFI_ERROR (Status)) {
-
- gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
- if (SataPrivateData != NULL) {
- if (SataPrivateData->DisqualifiedModes != NULL) {
- FreePool (SataPrivateData->DisqualifiedModes);
- }
- if (SataPrivateData->IdentifyData != NULL) {
- FreePool (SataPrivateData->IdentifyData);
- }
- if (SataPrivateData->IdentifyValid != NULL) {
- FreePool (SataPrivateData->IdentifyValid);
- }
- FreePool (SataPrivateData);
- }
- }
-
- DEBUG ((EFI_D_INFO, "SataControllerStart END status = %r\n", Status));
-
- return Status;
-}
-
-/**
- Stop this driver on ControllerHandle.
-
- @param This Protocol instance pointer.
- @param Controller Handle of device to stop driver on.
- @param NumberOfChildren Not used.
- @param ChildHandleBuffer Not used.
-
- @retval EFI_SUCCESS This driver is removed from this device.
- @retval other Some error occurs when removing this driver from this device.
-
-**/
-EFI_STATUS
-EFIAPI
-SataControllerStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
- )
-{
- EFI_STATUS Status;
- EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeInit;
- EFI_SATA_CONTROLLER_PRIVATE_DATA *SataPrivateData;
-
- //
- // Open the produced protocol
- //
- Status = gBS->OpenProtocol (
- Controller,
- &gEfiIdeControllerInitProtocolGuid,
- (VOID **) &IdeInit,
- This->DriverBindingHandle,
- Controller,
- EFI_OPEN_PROTOCOL_GET_PROTOCOL
- );
- if (EFI_ERROR (Status)) {
- return EFI_UNSUPPORTED;
- }
-
- SataPrivateData = SATA_CONTROLLER_PRIVATE_DATA_FROM_THIS (IdeInit);
- ASSERT (SataPrivateData != NULL);
-
- //
- // Uninstall the IDE Controller Init Protocol from this instance
- //
- Status = gBS->UninstallMultipleProtocolInterfaces (
- Controller,
- &gEfiIdeControllerInitProtocolGuid,
- &(SataPrivateData->IdeInit),
- NULL
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- if (SataPrivateData != NULL) {
- if (SataPrivateData->DisqualifiedModes != NULL) {
- FreePool (SataPrivateData->DisqualifiedModes);
- }
- if (SataPrivateData->IdentifyData != NULL) {
- FreePool (SataPrivateData->IdentifyData);
- }
- if (SataPrivateData->IdentifyValid != NULL) {
- FreePool (SataPrivateData->IdentifyValid);
- }
- FreePool (SataPrivateData);
- }
-
- //
- // Close protocols opened by Sata Controller driver
- //
- return gBS->CloseProtocol (
- Controller,
- &gEfiPciIoProtocolGuid,
- This->DriverBindingHandle,
- Controller
- );
-}
-
-/**
- Calculate the flat array subscript of a (Channel, Device) pair.
-
- @param[in] SataPrivateData The private data structure corresponding to the
- SATA controller that attaches the device for
- which the flat array subscript is being
- calculated.
-
- @param[in] Channel The channel (ie. port) number on the SATA
- controller that the device is attached to.
-
- @param[in] Device The device number on the channel.
-
- @return The flat array subscript suitable for indexing DisqualifiedModes,
- IdentifyData, and IdentifyValid.
-**/
-STATIC
-UINTN
-FlatDeviceIndex (
- IN CONST EFI_SATA_CONTROLLER_PRIVATE_DATA *SataPrivateData,
- IN UINTN Channel,
- IN UINTN Device
- )
-{
- ASSERT (SataPrivateData != NULL);
- ASSERT (Channel < SataPrivateData->IdeInit.ChannelCount);
- ASSERT (Device < SataPrivateData->DeviceCount);
-
- return Channel * SataPrivateData->DeviceCount + Device;
-}
-
-//
-// Interface functions of IDE_CONTROLLER_INIT protocol
-//
-/**
- Returns the information about the specified IDE channel.
-
- This function can be used to obtain information about a particular IDE channel.
- The driver entity uses this information during the enumeration process.
-
- If Enabled is set to FALSE, the driver entity will not scan the channel. Note
- that it will not prevent an operating system driver from scanning the channel.
-
- For most of today's controllers, MaxDevices will either be 1 or 2. For SATA
- controllers, this value will always be 1. SATA configurations can contain SATA
- port multipliers. SATA port multipliers behave like SATA bridges and can support
- up to 16 devices on the other side. If a SATA port out of the IDE controller
- is connected to a port multiplier, MaxDevices will be set to the number of SATA
- devices that the port multiplier supports. Because today's port multipliers
- support up to fifteen SATA devices, this number can be as large as fifteen. The IDE
- bus driver is required to scan for the presence of port multipliers behind an SATA
- controller and enumerate up to MaxDevices number of devices behind the port
- multiplier.
-
- In this context, the devices behind a port multiplier constitute a channel.
-
- @param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
- @param[in] Channel Zero-based channel number.
- @param[out] Enabled TRUE if this channel is enabled. Disabled channels
- are not scanned to see if any devices are present.
- @param[out] MaxDevices The maximum number of IDE devices that the bus driver
- can expect on this channel. For the ATA/ATAPI
- specification, version 6, this number will either be
- one or two. For Serial ATA (SATA) configurations with a
- port multiplier, this number can be as large as fifteen.
-
- @retval EFI_SUCCESS Information was returned without any errors.
- @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
-
-**/
-EFI_STATUS
-EFIAPI
-IdeInitGetChannelInfo (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- OUT BOOLEAN *Enabled,
- OUT UINT8 *MaxDevices
- )
-{
- EFI_SATA_CONTROLLER_PRIVATE_DATA *SataPrivateData;
- SataPrivateData = SATA_CONTROLLER_PRIVATE_DATA_FROM_THIS (This);
- ASSERT (SataPrivateData != NULL);
-
- if (Channel < This->ChannelCount) {
- *Enabled = TRUE;
- *MaxDevices = SataPrivateData->DeviceCount;
- return EFI_SUCCESS;
- }
-
- *Enabled = FALSE;
- return EFI_INVALID_PARAMETER;
-}
-
-/**
- The notifications from the driver entity that it is about to enter a certain
- phase of the IDE channel enumeration process.
-
- This function can be used to notify the IDE controller driver to perform
- specific actions, including any chipset-specific initialization, so that the
- chipset is ready to enter the next phase. Seven notification points are defined
- at this time.
-
- More synchronization points may be added as required in the future.
-
- @param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
- @param[in] Phase The phase during enumeration.
- @param[in] Channel Zero-based channel number.
-
- @retval EFI_SUCCESS The notification was accepted without any errors.
- @retval EFI_UNSUPPORTED Phase is not supported.
- @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
- @retval EFI_NOT_READY This phase cannot be entered at this time; for
- example, an attempt was made to enter a Phase
- without having entered one or more previous
- Phase.
-
-**/
-EFI_STATUS
-EFIAPI
-IdeInitNotifyPhase (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN EFI_IDE_CONTROLLER_ENUM_PHASE Phase,
- IN UINT8 Channel
- )
-{
- return EFI_SUCCESS;
-}
-
-/**
- Submits the device information to the IDE controller driver.
-
- This function is used by the driver entity to pass detailed information about
- a particular device to the IDE controller driver. The driver entity obtains
- this information by issuing an ATA or ATAPI IDENTIFY_DEVICE command. IdentifyData
- is the pointer to the response data buffer. The IdentifyData buffer is owned
- by the driver entity, and the IDE controller driver must make a local copy
- of the entire buffer or parts of the buffer as needed. The original IdentifyData
- buffer pointer may not be valid when
-
- - EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() or
- - EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode() is called at a later point.
-
- The IDE controller driver may consult various fields of EFI_IDENTIFY_DATA to
- compute the optimum mode for the device. These fields are not limited to the
- timing information. For example, an implementation of the IDE controller driver
- may examine the vendor and type/mode field to match known bad drives.
-
- The driver entity may submit drive information in any order, as long as it
- submits information for all the devices belonging to the enumeration group
- before EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() is called for any device
- in that enumeration group. If a device is absent, EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()
- should be called with IdentifyData set to NULL. The IDE controller driver may
- not have any other mechanism to know whether a device is present or not. Therefore,
- setting IdentifyData to NULL does not constitute an error condition.
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData() can be called only once for a
- given (Channel, Device) pair.
-
- @param[in] This A pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
- @param[in] Channel Zero-based channel number.
- @param[in] Device Zero-based device number on the Channel.
- @param[in] IdentifyData The device's response to the ATA IDENTIFY_DEVICE command.
-
- @retval EFI_SUCCESS The information was accepted without any errors.
- @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
- @retval EFI_INVALID_PARAMETER Device is invalid.
-
-**/
-EFI_STATUS
-EFIAPI
-IdeInitSubmitData (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- IN UINT8 Device,
- IN EFI_IDENTIFY_DATA *IdentifyData
- )
-{
- EFI_SATA_CONTROLLER_PRIVATE_DATA *SataPrivateData;
- UINTN DeviceIndex;
-
- SataPrivateData = SATA_CONTROLLER_PRIVATE_DATA_FROM_THIS (This);
- ASSERT (SataPrivateData != NULL);
-
- if ((Channel >= This->ChannelCount) || (Device >= SataPrivateData->DeviceCount)) {
- return EFI_INVALID_PARAMETER;
- }
-
- DeviceIndex = FlatDeviceIndex (SataPrivateData, Channel, Device);
-
- //
- // Make a local copy of device's IdentifyData and mark the valid flag
- //
- if (IdentifyData != NULL) {
- CopyMem (
- &(SataPrivateData->IdentifyData[DeviceIndex]),
- IdentifyData,
- sizeof (EFI_IDENTIFY_DATA)
- );
-
- SataPrivateData->IdentifyValid[DeviceIndex] = TRUE;
- } else {
- SataPrivateData->IdentifyValid[DeviceIndex] = FALSE;
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- Disqualifies specific modes for an IDE device.
-
- This function allows the driver entity or other drivers (such as platform
- drivers) to reject certain timing modes and request the IDE controller driver
- to recalculate modes. This function allows the driver entity and the IDE
- controller driver to negotiate the timings on a per-device basis. This function
- is useful in the case of drives that lie about their capabilities. An example
- is when the IDE device fails to accept the timing modes that are calculated
- by the IDE controller driver based on the response to the Identify Drive command.
-
- If the driver entity does not want to limit the ATA timing modes and leave that
- decision to the IDE controller driver, it can either not call this function for
- the given device or call this function and set the Valid flag to FALSE for all
- modes that are listed in EFI_ATA_COLLECTIVE_MODE.
-
- The driver entity may disqualify modes for a device in any order and any number
- of times.
-
- This function can be called multiple times to invalidate multiple modes of the
- same type (e.g., Programmed Input/Output [PIO] modes 3 and 4). See the ATA/ATAPI
- specification for more information on PIO modes.
-
- For Serial ATA (SATA) controllers, this member function can be used to disqualify
- a higher transfer rate mode on a given channel. For example, a platform driver
- may inform the IDE controller driver to not use second-generation (Gen2) speeds
- for a certain SATA drive.
-
- @param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
- @param[in] Channel The zero-based channel number.
- @param[in] Device The zero-based device number on the Channel.
- @param[in] BadModes The modes that the device does not support and that
- should be disqualified.
-
- @retval EFI_SUCCESS The modes were accepted without any errors.
- @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
- @retval EFI_INVALID_PARAMETER Device is invalid.
- @retval EFI_INVALID_PARAMETER IdentifyData is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-IdeInitDisqualifyMode (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- IN UINT8 Device,
- IN EFI_ATA_COLLECTIVE_MODE *BadModes
- )
-{
- EFI_SATA_CONTROLLER_PRIVATE_DATA *SataPrivateData;
- UINTN DeviceIndex;
-
- SataPrivateData = SATA_CONTROLLER_PRIVATE_DATA_FROM_THIS (This);
- ASSERT (SataPrivateData != NULL);
-
- if ((Channel >= This->ChannelCount) || (BadModes == NULL) || (Device >= SataPrivateData->DeviceCount)) {
- return EFI_INVALID_PARAMETER;
- }
-
- DeviceIndex = FlatDeviceIndex (SataPrivateData, Channel, Device);
-
- //
- // Record the disqualified modes per channel per device. From ATA/ATAPI spec,
- // if a mode is not supported, the modes higher than it is also not supported.
- //
- CopyMem (
- &(SataPrivateData->DisqualifiedModes[DeviceIndex]),
- BadModes,
- sizeof (EFI_ATA_COLLECTIVE_MODE)
- );
-
- return EFI_SUCCESS;
-}
-
-/**
- Returns the information about the optimum modes for the specified IDE device.
-
- This function is used by the driver entity to obtain the optimum ATA modes for
- a specific device. The IDE controller driver takes into account the following
- while calculating the mode:
- - The IdentifyData inputs to EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()
- - The BadModes inputs to EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode()
-
- The driver entity is required to call EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()
- for all the devices that belong to an enumeration group before calling
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() for any device in the same group.
-
- The IDE controller driver will use controller- and possibly platform-specific
- algorithms to arrive at SupportedModes. The IDE controller may base its
- decision on user preferences and other considerations as well. This function
- may be called multiple times because the driver entity may renegotiate the mode
- with the IDE controller driver using EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode().
-
- The driver entity may collect timing information for various devices in any
- order. The driver entity is responsible for making sure that all the dependencies
- are satisfied. For example, the SupportedModes information for device A that
- was previously returned may become stale after a call to
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode() for device B.
-
- The buffer SupportedModes is allocated by the callee because the caller does
- not necessarily know the size of the buffer. The type EFI_ATA_COLLECTIVE_MODE
- is defined in a way that allows for future extensibility and can be of variable
- length. This memory pool should be deallocated by the caller when it is no
- longer necessary.
-
- The IDE controller driver for a Serial ATA (SATA) controller can use this
- member function to force a lower speed (first-generation [Gen1] speeds on a
- second-generation [Gen2]-capable hardware). The IDE controller driver can
- also allow the driver entity to stay with the speed that has been negotiated
- by the physical layer.
-
- @param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
- @param[in] Channel A zero-based channel number.
- @param[in] Device A zero-based device number on the Channel.
- @param[out] SupportedModes The optimum modes for the device.
-
- @retval EFI_SUCCESS SupportedModes was returned.
- @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
- @retval EFI_INVALID_PARAMETER Device is invalid.
- @retval EFI_INVALID_PARAMETER SupportedModes is NULL.
- @retval EFI_NOT_READY Modes cannot be calculated due to a lack of
- data. This error may happen if
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()
- and EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyData()
- were not called for at least one drive in the
- same enumeration group.
-
-**/
-EFI_STATUS
-EFIAPI
-IdeInitCalculateMode (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- IN UINT8 Device,
- OUT EFI_ATA_COLLECTIVE_MODE **SupportedModes
- )
-{
- EFI_SATA_CONTROLLER_PRIVATE_DATA *SataPrivateData;
- EFI_IDENTIFY_DATA *IdentifyData;
- BOOLEAN IdentifyValid;
- EFI_ATA_COLLECTIVE_MODE *DisqualifiedModes;
- UINT16 SelectedMode;
- EFI_STATUS Status;
- UINTN DeviceIndex;
-
- SataPrivateData = SATA_CONTROLLER_PRIVATE_DATA_FROM_THIS (This);
- ASSERT (SataPrivateData != NULL);
-
- if ((Channel >= This->ChannelCount) || (SupportedModes == NULL) || (Device >= SataPrivateData->DeviceCount)) {
- return EFI_INVALID_PARAMETER;
- }
-
- *SupportedModes = AllocateZeroPool (sizeof (EFI_ATA_COLLECTIVE_MODE));
- if (*SupportedModes == NULL) {
- ASSERT (*SupportedModes != NULL);
- return EFI_OUT_OF_RESOURCES;
- }
-
- DeviceIndex = FlatDeviceIndex (SataPrivateData, Channel, Device);
-
- IdentifyData = &(SataPrivateData->IdentifyData[DeviceIndex]);
- IdentifyValid = SataPrivateData->IdentifyValid[DeviceIndex];
- DisqualifiedModes = &(SataPrivateData->DisqualifiedModes[DeviceIndex]);
-
- //
- // Make sure we've got the valid identify data of the device from SubmitData()
- //
- if (!IdentifyValid) {
- FreePool (*SupportedModes);
- return EFI_NOT_READY;
- }
-
- Status = CalculateBestPioMode (
- IdentifyData,
- (DisqualifiedModes->PioMode.Valid ? ((UINT16 *) &(DisqualifiedModes->PioMode.Mode)) : NULL),
- &SelectedMode
- );
- if (!EFI_ERROR (Status)) {
- (*SupportedModes)->PioMode.Valid = TRUE;
- (*SupportedModes)->PioMode.Mode = SelectedMode;
-
- } else {
- (*SupportedModes)->PioMode.Valid = FALSE;
- }
- DEBUG ((EFI_D_INFO, "IdeInitCalculateMode: PioMode = %x\n", (*SupportedModes)->PioMode.Mode));
-
- Status = CalculateBestUdmaMode (
- IdentifyData,
- (DisqualifiedModes->UdmaMode.Valid ? ((UINT16 *) &(DisqualifiedModes->UdmaMode.Mode)) : NULL),
- &SelectedMode
- );
-
- if (!EFI_ERROR (Status)) {
- (*SupportedModes)->UdmaMode.Valid = TRUE;
- (*SupportedModes)->UdmaMode.Mode = SelectedMode;
-
- } else {
- (*SupportedModes)->UdmaMode.Valid = FALSE;
- }
- DEBUG ((EFI_D_INFO, "IdeInitCalculateMode: UdmaMode = %x\n", (*SupportedModes)->UdmaMode.Mode));
-
- //
- // The modes other than PIO and UDMA are not supported
- //
- return EFI_SUCCESS;
-}
-
-/**
- Commands the IDE controller driver to program the IDE controller hardware
- so that the specified device can operate at the specified mode.
-
- This function is used by the driver entity to instruct the IDE controller
- driver to program the IDE controller hardware to the specified modes. This
- function can be called only once for a particular device. For a Serial ATA
- (SATA) Advanced Host Controller Interface (AHCI) controller, no controller-
- specific programming may be required.
-
- @param[in] This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
- @param[in] Channel Zero-based channel number.
- @param[in] Device Zero-based device number on the Channel.
- @param[in] Modes The modes to set.
-
- @retval EFI_SUCCESS The command was accepted without any errors.
- @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
- @retval EFI_INVALID_PARAMETER Device is invalid.
- @retval EFI_NOT_READY Modes cannot be set at this time due to lack of data.
- @retval EFI_DEVICE_ERROR Modes cannot be set due to hardware failure.
- The driver entity should not use this device.
-
-**/
-EFI_STATUS
-EFIAPI
-IdeInitSetTiming (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- IN UINT8 Device,
- IN EFI_ATA_COLLECTIVE_MODE *Modes
- )
-{
- return EFI_SUCCESS;
-}
+++ /dev/null
-/** @file
- Header file for Sata Controller driver.
-
- Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _SATA_CONTROLLER_H_
-#define _SATA_CONTROLLER_H_
-
-#include <Uefi.h>
-#include <Protocol/ComponentName.h>
-#include <Protocol/DriverBinding.h>
-#include <Protocol/PciIo.h>
-#include <Protocol/IdeControllerInit.h>
-#include <Library/UefiDriverEntryPoint.h>
-#include <Library/DebugLib.h>
-#include <Library/UefiLib.h>
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <IndustryStandard/Pci.h>
-
-//
-// Global Variables definitions
-//
-extern EFI_DRIVER_BINDING_PROTOCOL gSataControllerDriverBinding;
-extern EFI_COMPONENT_NAME_PROTOCOL gSataControllerComponentName;
-extern EFI_COMPONENT_NAME2_PROTOCOL gSataControllerComponentName2;
-
-#define AHCI_BAR_INDEX 0x05
-#define R_AHCI_CAP 0x0
-#define B_AHCI_CAP_NPS (BIT4 | BIT3 | BIT2 | BIT1 | BIT0) // Number of Ports
-#define B_AHCI_CAP_SPM BIT17 // Supports Port Multiplier
-
-///
-/// AHCI each channel can have up to 1 device
-///
-#define AHCI_MAX_DEVICES 0x01
-
-///
-/// AHCI each channel can have 15 devices in the presence of a multiplier
-///
-#define AHCI_MULTI_MAX_DEVICES 0x0F
-
-///
-/// IDE supports 2 channel max
-///
-#define IDE_MAX_CHANNEL 0x02
-
-///
-/// IDE supports 2 devices max
-///
-#define IDE_MAX_DEVICES 0x02
-
-#define SATA_ENUMER_ALL FALSE
-
-//
-// Sata Controller driver private data structure
-//
-
-#define SATA_CONTROLLER_SIGNATURE SIGNATURE_32('S','A','T','A')
-
-typedef struct _EFI_SATA_CONTROLLER_PRIVATE_DATA {
- //
- // Standard signature used to identify Sata Controller private data
- //
- UINT32 Signature;
-
- //
- // Protocol instance of IDE_CONTROLLER_INIT produced by this driver
- //
- EFI_IDE_CONTROLLER_INIT_PROTOCOL IdeInit;
-
- //
- // Copy of protocol pointers used by this driver
- //
- EFI_PCI_IO_PROTOCOL *PciIo;
-
- //
- // The number of devices that are supported by this channel
- //
- UINT8 DeviceCount;
-
- //
- // The highest disqualified mode for each attached device,\r
- // From ATA/ATAPI spec, if a mode is not supported,
- // the modes higher than it is also not supported
- //
- EFI_ATA_COLLECTIVE_MODE *DisqualifiedModes;
-
- //
- // A copy of EFI_IDENTIFY_DATA data for each attached SATA device and its flag
- //
- EFI_IDENTIFY_DATA *IdentifyData;
- BOOLEAN *IdentifyValid;
-} EFI_SATA_CONTROLLER_PRIVATE_DATA;
-
-#define SATA_CONTROLLER_PRIVATE_DATA_FROM_THIS(a) CR(a, EFI_SATA_CONTROLLER_PRIVATE_DATA, IdeInit, SATA_CONTROLLER_SIGNATURE)
-
-//
-// Driver binding functions declaration
-//
-/**
- Supported function of Driver Binding protocol for this driver.
- Test to see if this driver supports ControllerHandle.
-
- @param This Protocol instance pointer.
- @param Controller Handle of device to test.
- @param RemainingDevicePath A pointer to the device path. Should be ignored by
- device driver.
-
- @retval EFI_SUCCESS This driver supports this device.
- @retval EFI_ALREADY_STARTED This driver is already running on this device.
- @retval other This driver does not support this device.
-
-**/
-EFI_STATUS
-EFIAPI
-SataControllerSupported (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
- )
-;
-
-/**
- This routine is called right after the .Supported() called and
- Start this driver on ControllerHandle.
-
- @param This Protocol instance pointer.
- @param Controller Handle of device to bind driver to.
- @param RemainingDevicePath A pointer to the device path. Should be ignored by
- device driver.
-
- @retval EFI_SUCCESS This driver is added to this device.
- @retval EFI_ALREADY_STARTED This driver is already running on this device.
- @retval other Some error occurs when binding this driver to this device.
-
-**/
-EFI_STATUS
-EFIAPI
-SataControllerStart (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
- )
-;
-
-/**
- Stop this driver on ControllerHandle.
-
- @param This Protocol instance pointer.
- @param Controller Handle of device to stop driver on.
- @param NumberOfChildren Not used.
- @param ChildHandleBuffer Not used.
-
- @retval EFI_SUCCESS This driver is removed from this device.
- @retval other Some error occurs when removing this driver from this device.
-
-**/
-EFI_STATUS
-EFIAPI
-SataControllerStop (
- IN EFI_DRIVER_BINDING_PROTOCOL *This,
- IN EFI_HANDLE Controller,
- IN UINTN NumberOfChildren,
- IN EFI_HANDLE *ChildHandleBuffer
- )
-;
-
-//
-// IDE controller init functions declaration
-//
-/**
- Returns the information about the specified IDE channel.
-
- This function can be used to obtain information about a particular IDE channel.
- The driver entity uses this information during the enumeration process.
-
- If Enabled is set to FALSE, the driver entity will not scan the channel. Note
- that it will not prevent an operating system driver from scanning the channel.
-
- For most of today's controllers, MaxDevices will either be 1 or 2. For SATA
- controllers, this value will always be 1. SATA configurations can contain SATA
- port multipliers. SATA port multipliers behave like SATA bridges and can support
- up to 16 devices on the other side. If a SATA port out of the IDE controller
- is connected to a port multiplier, MaxDevices will be set to the number of SATA
- devices that the port multiplier supports. Because today's port multipliers
- support up to fifteen SATA devices, this number can be as large as fifteen. The IDE
- bus driver is required to scan for the presence of port multipliers behind an SATA
- controller and enumerate up to MaxDevices number of devices behind the port
- multiplier.
-
- In this context, the devices behind a port multiplier constitute a channel.
-
- @param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
- @param[in] Channel Zero-based channel number.
- @param[out] Enabled TRUE if this channel is enabled. Disabled channels
- are not scanned to see if any devices are present.
- @param[out] MaxDevices The maximum number of IDE devices that the bus driver
- can expect on this channel. For the ATA/ATAPI
- specification, version 6, this number will either be
- one or two. For Serial ATA (SATA) configurations with a
- port multiplier, this number can be as large as fifteen.
-
- @retval EFI_SUCCESS Information was returned without any errors.
- @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
-
-**/
-EFI_STATUS
-EFIAPI
-IdeInitGetChannelInfo (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- OUT BOOLEAN *Enabled,
- OUT UINT8 *MaxDevices
- )
-;
-
-/**
- The notifications from the driver entity that it is about to enter a certain
- phase of the IDE channel enumeration process.
-
- This function can be used to notify the IDE controller driver to perform
- specific actions, including any chipset-specific initialization, so that the
- chipset is ready to enter the next phase. Seven notification points are defined
- at this time.
-
- More synchronization points may be added as required in the future.
-
- @param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
- @param[in] Phase The phase during enumeration.
- @param[in] Channel Zero-based channel number.
-
- @retval EFI_SUCCESS The notification was accepted without any errors.
- @retval EFI_UNSUPPORTED Phase is not supported.
- @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
- @retval EFI_NOT_READY This phase cannot be entered at this time; for
- example, an attempt was made to enter a Phase
- without having entered one or more previous
- Phase.
-
-**/
-EFI_STATUS
-EFIAPI
-IdeInitNotifyPhase (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN EFI_IDE_CONTROLLER_ENUM_PHASE Phase,
- IN UINT8 Channel
- )
-;
-
-/**
- Submits the device information to the IDE controller driver.
-
- This function is used by the driver entity to pass detailed information about
- a particular device to the IDE controller driver. The driver entity obtains
- this information by issuing an ATA or ATAPI IDENTIFY_DEVICE command. IdentifyData
- is the pointer to the response data buffer. The IdentifyData buffer is owned
- by the driver entity, and the IDE controller driver must make a local copy
- of the entire buffer or parts of the buffer as needed. The original IdentifyData
- buffer pointer may not be valid when
-
- - EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() or
- - EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode() is called at a later point.
-
- The IDE controller driver may consult various fields of EFI_IDENTIFY_DATA to
- compute the optimum mode for the device. These fields are not limited to the
- timing information. For example, an implementation of the IDE controller driver
- may examine the vendor and type/mode field to match known bad drives.
-
- The driver entity may submit drive information in any order, as long as it
- submits information for all the devices belonging to the enumeration group
- before EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() is called for any device
- in that enumeration group. If a device is absent, EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()
- should be called with IdentifyData set to NULL. The IDE controller driver may
- not have any other mechanism to know whether a device is present or not. Therefore,
- setting IdentifyData to NULL does not constitute an error condition.
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData() can be called only once for a
- given (Channel, Device) pair.
-
- @param[in] This A pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
- @param[in] Channel Zero-based channel number.
- @param[in] Device Zero-based device number on the Channel.
- @param[in] IdentifyData The device's response to the ATA IDENTIFY_DEVICE command.
-
- @retval EFI_SUCCESS The information was accepted without any errors.
- @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
- @retval EFI_INVALID_PARAMETER Device is invalid.
-
-**/
-EFI_STATUS
-EFIAPI
-IdeInitSubmitData (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- IN UINT8 Device,
- IN EFI_IDENTIFY_DATA *IdentifyData
- )
-;
-
-/**
- Disqualifies specific modes for an IDE device.
-
- This function allows the driver entity or other drivers (such as platform
- drivers) to reject certain timing modes and request the IDE controller driver
- to recalculate modes. This function allows the driver entity and the IDE
- controller driver to negotiate the timings on a per-device basis. This function
- is useful in the case of drives that lie about their capabilities. An example
- is when the IDE device fails to accept the timing modes that are calculated
- by the IDE controller driver based on the response to the Identify Drive command.
-
- If the driver entity does not want to limit the ATA timing modes and leave that
- decision to the IDE controller driver, it can either not call this function for
- the given device or call this function and set the Valid flag to FALSE for all
- modes that are listed in EFI_ATA_COLLECTIVE_MODE.
-
- The driver entity may disqualify modes for a device in any order and any number
- of times.
-
- This function can be called multiple times to invalidate multiple modes of the
- same type (e.g., Programmed Input/Output [PIO] modes 3 and 4). See the ATA/ATAPI
- specification for more information on PIO modes.
-
- For Serial ATA (SATA) controllers, this member function can be used to disqualify
- a higher transfer rate mode on a given channel. For example, a platform driver
- may inform the IDE controller driver to not use second-generation (Gen2) speeds
- for a certain SATA drive.
-
- @param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
- @param[in] Channel The zero-based channel number.
- @param[in] Device The zero-based device number on the Channel.
- @param[in] BadModes The modes that the device does not support and that
- should be disqualified.
-
- @retval EFI_SUCCESS The modes were accepted without any errors.
- @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
- @retval EFI_INVALID_PARAMETER Device is invalid.
- @retval EFI_INVALID_PARAMETER IdentifyData is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-IdeInitDisqualifyMode (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- IN UINT8 Device,
- IN EFI_ATA_COLLECTIVE_MODE *BadModes
- )
-;
-
-/**
- Returns the information about the optimum modes for the specified IDE device.
-
- This function is used by the driver entity to obtain the optimum ATA modes for
- a specific device. The IDE controller driver takes into account the following
- while calculating the mode:
- - The IdentifyData inputs to EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()
- - The BadModes inputs to EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode()
-
- The driver entity is required to call EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()
- for all the devices that belong to an enumeration group before calling
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() for any device in the same group.
-
- The IDE controller driver will use controller- and possibly platform-specific
- algorithms to arrive at SupportedModes. The IDE controller may base its
- decision on user preferences and other considerations as well. This function
- may be called multiple times because the driver entity may renegotiate the mode
- with the IDE controller driver using EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode().
-
- The driver entity may collect timing information for various devices in any
- order. The driver entity is responsible for making sure that all the dependencies
- are satisfied. For example, the SupportedModes information for device A that
- was previously returned may become stale after a call to
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode() for device B.
-
- The buffer SupportedModes is allocated by the callee because the caller does
- not necessarily know the size of the buffer. The type EFI_ATA_COLLECTIVE_MODE
- is defined in a way that allows for future extensibility and can be of variable
- length. This memory pool should be deallocated by the caller when it is no
- longer necessary.
-
- The IDE controller driver for a Serial ATA (SATA) controller can use this
- member function to force a lower speed (first-generation [Gen1] speeds on a
- second-generation [Gen2]-capable hardware). The IDE controller driver can
- also allow the driver entity to stay with the speed that has been negotiated
- by the physical layer.
-
- @param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
- @param[in] Channel A zero-based channel number.
- @param[in] Device A zero-based device number on the Channel.
- @param[out] SupportedModes The optimum modes for the device.
-
- @retval EFI_SUCCESS SupportedModes was returned.
- @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
- @retval EFI_INVALID_PARAMETER Device is invalid.
- @retval EFI_INVALID_PARAMETER SupportedModes is NULL.
- @retval EFI_NOT_READY Modes cannot be calculated due to a lack of
- data. This error may happen if
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()
- and EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyData()
- were not called for at least one drive in the
- same enumeration group.
-
-**/
-EFI_STATUS
-EFIAPI
-IdeInitCalculateMode (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- IN UINT8 Device,
- OUT EFI_ATA_COLLECTIVE_MODE **SupportedModes
- )
-;
-
-/**
- Commands the IDE controller driver to program the IDE controller hardware
- so that the specified device can operate at the specified mode.
-
- This function is used by the driver entity to instruct the IDE controller
- driver to program the IDE controller hardware to the specified modes. This
- function can be called only once for a particular device. For a Serial ATA
- (SATA) Advanced Host Controller Interface (AHCI) controller, no controller-
- specific programming may be required.
-
- @param[in] This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
- @param[in] Channel Zero-based channel number.
- @param[in] Device Zero-based device number on the Channel.
- @param[in] Modes The modes to set.
-
- @retval EFI_SUCCESS The command was accepted without any errors.
- @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
- @retval EFI_INVALID_PARAMETER Device is invalid.
- @retval EFI_NOT_READY Modes cannot be set at this time due to lack of data.
- @retval EFI_DEVICE_ERROR Modes cannot be set due to hardware failure.
- The driver entity should not use this device.
-
-**/
-EFI_STATUS
-EFIAPI
-IdeInitSetTiming (
- IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
- IN UINT8 Channel,
- IN UINT8 Device,
- IN EFI_ATA_COLLECTIVE_MODE *Modes
- )
-;
-
-//
-// Forward reference declaration
-//
-/**
- Retrieves a Unicode string that is the user readable name of the UEFI Driver.
-
- @param This A pointer to the EFI_COMPONENT_NAME_PROTOCOL instance.
- @param Language A pointer to a three character ISO 639-2 language identifier.
- This is the language of the driver name that that the caller
- is requesting, and it must match one of the languages specified
- in SupportedLanguages. The number of languages supported by a
- driver is up to the driver writer.
- @param DriverName A pointer to the Unicode string to return. This Unicode string
- is the name of the driver specified by This in the language
- specified by Language.
-
- @retval EFI_SUCCESS The Unicode string for the Driver specified by This
- and the language specified by Language was returned
- in DriverName.
- @retval EFI_INVALID_PARAMETER Language is NULL.
- @retval EFI_INVALID_PARAMETER DriverName is NULL.
- @retval EFI_UNSUPPORTED The driver specified by This does not support the
- language specified by Language.
-**/
-EFI_STATUS
-EFIAPI
-SataControllerComponentNameGetDriverName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN CHAR8 *Language,
- OUT CHAR16 **DriverName
- )
-;
-
-/**
- Retrieves a Unicode string that is the user readable name of the controller
- that is being managed by an UEFI Driver.
-
- @param This A pointer to the EFI_COMPONENT_NAME_PROTOCOL instance.
- @param ControllerHandle The handle of a controller that the driver specified by
- This is managing. This handle specifies the controller
- whose name is to be returned.
- @param OPTIONAL ChildHandle The handle of the child controller to retrieve the name
- of. This is an optional parameter that may be NULL. It
- will be NULL for device drivers. It will also be NULL
- for a bus drivers that wish to retrieve the name of the
- bus controller. It will not be NULL for a bus driver
- that wishes to retrieve the name of a child controller.
- @param Language A pointer to a three character ISO 639-2 language
- identifier. This is the language of the controller name
- that that the caller is requesting, and it must match one
- of the languages specified in SupportedLanguages. The
- number of languages supported by a driver is up to the
- driver writer.
- @param ControllerName A pointer to the Unicode string to return. This Unicode
- string is the name of the controller specified by
- ControllerHandle and ChildHandle in the language
- specified by Language from the point of view of the
- driver specified by This.
-
- @retval EFI_SUCCESS The Unicode string for the user readable name in the
- language specified by Language for the driver
- specified by This was returned in DriverName.
- @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE.
- @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid
- EFI_HANDLE.
- @retval EFI_INVALID_PARAMETER Language is NULL.
- @retval EFI_INVALID_PARAMETER ControllerName is NULL.
- @retval EFI_UNSUPPORTED The driver specified by This is not currently
- managing the controller specified by
- ControllerHandle and ChildHandle.
- @retval EFI_UNSUPPORTED The driver specified by This does not support the
- language specified by Language.
-**/
-EFI_STATUS
-EFIAPI
-SataControllerComponentNameGetControllerName (
- IN EFI_COMPONENT_NAME_PROTOCOL *This,
- IN EFI_HANDLE ControllerHandle,
- IN EFI_HANDLE ChildHandle OPTIONAL,
- IN CHAR8 *Language,
- OUT CHAR16 **ControllerName
- )
-;
-
-#endif
+++ /dev/null
-## @file
-#
-# Component description file for the Sata Controller driver.
-#
-# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = SataController
- FILE_GUID = 8F4CD826-A5A0-4e93-9522-CFB0AB72926C
- MODULE_TYPE = UEFI_DRIVER
- VERSION_STRING = 1.0
- ENTRY_POINT = InitializeSataControllerDriver
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64 EBC
-#
-
-[Sources]
- ComponentName.c
- SataController.c
- SataController.h
-
-[Packages]
- MdePkg/MdePkg.dec
-
-[LibraryClasses]
- UefiDriverEntryPoint
- DebugLib
- UefiLib
- BaseLib
- BaseMemoryLib
- MemoryAllocationLib
- UefiBootServicesTableLib
-
-[Protocols]
- gEfiPciIoProtocolGuid
- gEfiIdeControllerInitProtocolGuid
+++ /dev/null
-/** @file\r
- Locate the entry point for the PEI Core\r
-\r
-Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#include <PiPei.h>\r
-#include <Library/BaseLib.h>\r
-#include <Library/PeCoffGetEntryPointLib.h>\r
-\r
-#include "SecMain.h"\r
-\r
-/**\r
- Find core image base.\r
- \r
- @param BootFirmwareVolumePtr Point to the boot firmware volume.\r
- @param SecCoreImageBase The base address of the SEC core image.\r
- @param PeiCoreImageBase The base address of the PEI core image.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FindImageBase (\r
- IN EFI_FIRMWARE_VOLUME_HEADER *BootFirmwareVolumePtr,\r
- OUT EFI_PHYSICAL_ADDRESS *SecCoreImageBase,\r
- OUT EFI_PHYSICAL_ADDRESS *PeiCoreImageBase\r
- )\r
-{\r
- EFI_PHYSICAL_ADDRESS CurrentAddress;\r
- EFI_PHYSICAL_ADDRESS EndOfFirmwareVolume;\r
- EFI_FFS_FILE_HEADER *File;\r
- UINT32 Size;\r
- EFI_PHYSICAL_ADDRESS EndOfFile;\r
- EFI_COMMON_SECTION_HEADER *Section;\r
- EFI_PHYSICAL_ADDRESS EndOfSection;\r
-\r
- *SecCoreImageBase = 0;\r
- *PeiCoreImageBase = 0;\r
-\r
- CurrentAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) BootFirmwareVolumePtr;\r
- EndOfFirmwareVolume = CurrentAddress + BootFirmwareVolumePtr->FvLength;\r
-\r
- //\r
- // Loop through the FFS files in the Boot Firmware Volume\r
- //\r
- for (EndOfFile = CurrentAddress + BootFirmwareVolumePtr->HeaderLength; ; ) {\r
-\r
- CurrentAddress = (EndOfFile + 7) & 0xfffffffffffffff8ULL;\r
- if (CurrentAddress > EndOfFirmwareVolume) {\r
- return EFI_NOT_FOUND;\r
- }\r
-\r
- File = (EFI_FFS_FILE_HEADER*)(UINTN) CurrentAddress;\r
- if (IS_FFS_FILE2 (File)) {\r
- Size = FFS_FILE2_SIZE (File);\r
- if (Size <= 0x00FFFFFF) {\r
- return EFI_NOT_FOUND;\r
- }\r
- } else {\r
- Size = FFS_FILE_SIZE (File);\r
- if (Size < sizeof (EFI_FFS_FILE_HEADER)) {\r
- return EFI_NOT_FOUND;\r
- }\r
- }\r
-\r
- EndOfFile = CurrentAddress + Size;\r
- if (EndOfFile > EndOfFirmwareVolume) {\r
- return EFI_NOT_FOUND;\r
- }\r
-\r
- //\r
- // Look for SEC Core / PEI Core files\r
- //\r
- if (File->Type != EFI_FV_FILETYPE_SECURITY_CORE &&\r
- File->Type != EFI_FV_FILETYPE_PEI_CORE) {\r
- continue;\r
- }\r
-\r
- //\r
- // Loop through the FFS file sections within the FFS file\r
- //\r
- if (IS_FFS_FILE2 (File)) {\r
- EndOfSection = (EFI_PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) File + sizeof (EFI_FFS_FILE_HEADER2));\r
- } else {\r
- EndOfSection = (EFI_PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) File + sizeof (EFI_FFS_FILE_HEADER));\r
- }\r
- for (;;) {\r
- CurrentAddress = (EndOfSection + 3) & 0xfffffffffffffffcULL;\r
- Section = (EFI_COMMON_SECTION_HEADER*)(UINTN) CurrentAddress;\r
-\r
- if (IS_SECTION2 (Section)) {\r
- Size = SECTION2_SIZE (Section);\r
- if (Size <= 0x00FFFFFF) {\r
- return EFI_NOT_FOUND;\r
- }\r
- } else {\r
- Size = SECTION_SIZE (Section);\r
- if (Size < sizeof (EFI_COMMON_SECTION_HEADER)) {\r
- return EFI_NOT_FOUND;\r
- }\r
- }\r
-\r
- EndOfSection = CurrentAddress + Size;\r
- if (EndOfSection > EndOfFile) {\r
- return EFI_NOT_FOUND;\r
- }\r
-\r
- //\r
- // Look for executable sections\r
- //\r
- if (Section->Type == EFI_SECTION_PE32 || Section->Type == EFI_SECTION_TE) {\r
- if (File->Type == EFI_FV_FILETYPE_SECURITY_CORE) {\r
- if (IS_SECTION2 (Section)) {\r
- *SecCoreImageBase = (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER2));\r
- } else {\r
- *SecCoreImageBase = (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER));\r
- }\r
- } else {\r
- if (IS_SECTION2 (Section)) {\r
- *PeiCoreImageBase = (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER2));\r
- } else {\r
- *PeiCoreImageBase = (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER));\r
- }\r
- }\r
- break;\r
- }\r
- }\r
-\r
- //\r
- // Both SEC Core and PEI Core images found\r
- //\r
- if (*SecCoreImageBase != 0 && *PeiCoreImageBase != 0) {\r
- return EFI_SUCCESS;\r
- }\r
- }\r
-}\r
-\r
-/**\r
- Find and return Pei Core entry point.\r
-\r
- It also find SEC and PEI Core file debug information. It will report them if\r
- remote debug is enabled.\r
- \r
- @param BootFirmwareVolumePtr Point to the boot firmware volume.\r
- @param PeiCoreEntryPoint The entry point of the PEI core.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-FindAndReportEntryPoints (\r
- IN EFI_FIRMWARE_VOLUME_HEADER *BootFirmwareVolumePtr,\r
- OUT EFI_PEI_CORE_ENTRY_POINT *PeiCoreEntryPoint\r
- )\r
-{\r
- EFI_STATUS Status;\r
- EFI_PHYSICAL_ADDRESS SecCoreImageBase;\r
- EFI_PHYSICAL_ADDRESS PeiCoreImageBase;\r
- PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;\r
-\r
- //\r
- // Find SEC Core and PEI Core image base\r
- //\r
- Status = FindImageBase (BootFirmwareVolumePtr, &SecCoreImageBase, &PeiCoreImageBase);\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- ZeroMem ((VOID *) &ImageContext, sizeof (PE_COFF_LOADER_IMAGE_CONTEXT));\r
- //\r
- // Report SEC Core debug information when remote debug is enabled\r
- //\r
- ImageContext.ImageAddress = SecCoreImageBase;\r
- ImageContext.PdbPointer = PeCoffLoaderGetPdbPointer ((VOID*) (UINTN) ImageContext.ImageAddress);\r
- PeCoffLoaderRelocateImageExtraAction (&ImageContext);\r
-\r
- //\r
- // Report PEI Core debug information when remote debug is enabled\r
- //\r
- ImageContext.ImageAddress = PeiCoreImageBase;\r
- ImageContext.PdbPointer = PeCoffLoaderGetPdbPointer ((VOID*) (UINTN) ImageContext.ImageAddress);\r
- PeCoffLoaderRelocateImageExtraAction (&ImageContext);\r
-\r
- //\r
- // Find PEI Core entry point\r
- //\r
- Status = PeCoffLoaderGetEntryPoint ((VOID *) (UINTN) PeiCoreImageBase, (VOID**) PeiCoreEntryPoint);\r
- if (EFI_ERROR (Status)) {\r
- *PeiCoreEntryPoint = 0;\r
- }\r
-\r
- return;\r
-}\r
-\r
+++ /dev/null
-;------------------------------------------------------------------------------\r
-;\r
-; Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
-; SPDX-License-Identifier: BSD-2-Clause-Patent\r
-;\r
-; Module Name:\r
-;\r
-; SecEntry.asm\r
-;\r
-; Abstract:\r
-;\r
-; This is the code that begins in protected mode.\r
-; It will transfer the control to pei core.\r
-;\r
-;------------------------------------------------------------------------------\r
-#include <Base.h>\r
-\r
-.686p\r
-.xmm\r
-.model small, c\r
-\r
-EXTRN SecStartup:NEAR\r
-\r
-; Pcds\r
-EXTRN PcdGet32 (PcdPayloadFdMemBase):DWORD\r
-\r
- .code\r
-\r
-;\r
-; SecCore Entry Point\r
-;\r
-; Processor is in flat protected mode\r
-;\r
-; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)\r
-; @param[in] DI 'BP': boot-strap processor, or 'AP': application processor\r
-; @param[in] EBP Pointer to the start of the Boot Firmware Volume\r
-;\r
-; @return None This routine does not return\r
-;\r
-\r
-_ModuleEntryPoint PROC PUBLIC \r
- ;\r
- ; Disable all the interrupts\r
- ; \r
- cli\r
- ;\r
- ; Construct the temporary memory at 0x80000, length 0x10000\r
- ;\r
- mov esp, (BASE_512KB + SIZE_64KB)\r
- \r
- ;\r
- ; Pass BFV into the PEI Core\r
- ;\r
- push PcdGet32 (PcdPayloadFdMemBase)\r
-\r
- ;\r
- ; Pass stack base into the PEI Core\r
- ;\r
- push BASE_512KB\r
-\r
- ;\r
- ; Pass stack size into the PEI Core\r
- ;\r
- push SIZE_64KB\r
-\r
- ;\r
- ; Pass Control into the PEI Core\r
- ;\r
- call SecStartup\r
-_ModuleEntryPoint ENDP\r
-\r
-END\r
+++ /dev/null
-;------------------------------------------------------------------------------\r
-;\r
-; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
-; SPDX-License-Identifier: BSD-2-Clause-Patent\r
-;\r
-; Abstract:\r
-;\r
-; Entry point for the coreboot UEFI payload.\r
-;\r
-;------------------------------------------------------------------------------\r
-\r
-SECTION .text\r
-\r
-; C Functions\r
-extern ASM_PFX(SecStartup)\r
-\r
-; Pcds\r
-extern ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))\r
-\r
-;\r
-; SecCore Entry Point\r
-;\r
-; Processor is in flat protected mode\r
-;\r
-; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)\r
-; @param[in] DI 'BP': boot-strap processor, or 'AP': application processor\r
-; @param[in] EBP Pointer to the start of the Boot Firmware Volume\r
-;\r
-; @return None This routine does not return\r
-;\r
-global ASM_PFX(_ModuleEntryPoint)\r
-ASM_PFX(_ModuleEntryPoint):\r
- ;\r
- ; Disable all the interrupts\r
- ;\r
- cli\r
- ;\r
- ; Construct the temporary memory at 0x80000, length 0x10000\r
- ;\r
- mov esp, (BASE_512KB + SIZE_64KB)\r
-\r
- ;\r
- ; Pass BFV into the PEI Core\r
- ;\r
- push DWORD [ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))]\r
-\r
- ;\r
- ; Pass stack base into the PEI Core\r
- ;\r
- push BASE_512KB\r
-\r
- ;\r
- ; Pass stack size into the PEI Core\r
- ;\r
- push SIZE_64KB\r
-\r
- ;\r
- ; Pass Control into the PEI Core\r
- ;\r
- call ASM_PFX(SecStartup)\r
-\r
- ;\r
- ; Should never return\r
- ;\r
- jmp $\r
-\r
+++ /dev/null
-;------------------------------------------------------------------------------\r
-;\r
-; Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
-; SPDX-License-Identifier: BSD-2-Clause-Patent\r
-;\r
-; Abstract:\r
-;\r
-; Switch the stack from temporary memory to permanent memory.\r
-;\r
-;------------------------------------------------------------------------------\r
-\r
- .586p\r
- .model flat,C\r
- .code\r
- \r
-;------------------------------------------------------------------------------\r
-; VOID\r
-; EFIAPI\r
-; SecSwitchStack (\r
-; UINT32 TemporaryMemoryBase,\r
-; UINT32 PermenentMemoryBase\r
-; );\r
-;------------------------------------------------------------------------------ \r
-SecSwitchStack PROC\r
- ;\r
- ; Save three register: eax, ebx, ecx\r
- ;\r
- push eax\r
- push ebx\r
- push ecx\r
- push edx\r
- \r
- ;\r
- ; !!CAUTION!! this function address's is pushed into stack after\r
- ; migration of whole temporary memory, so need save it to permanent\r
- ; memory at first!\r
- ;\r
- \r
- mov ebx, [esp + 20] ; Save the first parameter\r
- mov ecx, [esp + 24] ; Save the second parameter\r
- \r
- ;\r
- ; Save this function's return address into permanent memory at first.\r
- ; Then, Fixup the esp point to permanent memory\r
- ;\r
- mov eax, esp\r
- sub eax, ebx\r
- add eax, ecx\r
- mov edx, dword ptr [esp] ; copy pushed register's value to permanent memory\r
- mov dword ptr [eax], edx \r
- mov edx, dword ptr [esp + 4]\r
- mov dword ptr [eax + 4], edx \r
- mov edx, dword ptr [esp + 8]\r
- mov dword ptr [eax + 8], edx \r
- mov edx, dword ptr [esp + 12]\r
- mov dword ptr [eax + 12], edx \r
- mov edx, dword ptr [esp + 16] ; Update this function's return address into permanent memory\r
- mov dword ptr [eax + 16], edx \r
- mov esp, eax ; From now, esp is pointed to permanent memory\r
- \r
- ;\r
- ; Fixup the ebp point to permanent memory\r
- ;\r
- mov eax, ebp\r
- sub eax, ebx\r
- add eax, ecx\r
- mov ebp, eax ; From now, ebp is pointed to permanent memory\r
- \r
- pop edx\r
- pop ecx\r
- pop ebx\r
- pop eax\r
- ret\r
-SecSwitchStack ENDP\r
-\r
- END\r
+++ /dev/null
-;------------------------------------------------------------------------------\r
-;\r
-; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
-; SPDX-License-Identifier: BSD-2-Clause-Patent\r
-;\r
-; Abstract:\r
-;\r
-; Switch the stack from temporary memory to permanent memory.\r
-;\r
-;------------------------------------------------------------------------------\r
-\r
-SECTION .text\r
-\r
-;------------------------------------------------------------------------------\r
-; VOID\r
-; EFIAPI\r
-; SecSwitchStack (\r
-; UINT32 TemporaryMemoryBase,\r
-; UINT32 PermenentMemoryBase\r
-; );\r
-;------------------------------------------------------------------------------\r
-global ASM_PFX(SecSwitchStack)\r
-ASM_PFX(SecSwitchStack):\r
- ;\r
- ; Save three register: eax, ebx, ecx\r
- ;\r
- push eax\r
- push ebx\r
- push ecx\r
- push edx\r
-\r
- ;\r
- ; !!CAUTION!! this function address's is pushed into stack after\r
- ; migration of whole temporary memory, so need save it to permanent\r
- ; memory at first!\r
- ;\r
-\r
- mov ebx, [esp + 20] ; Save the first parameter\r
- mov ecx, [esp + 24] ; Save the second parameter\r
-\r
- ;\r
- ; Save this function's return address into permanent memory at first.\r
- ; Then, Fixup the esp point to permanent memory\r
- ;\r
- mov eax, esp\r
- sub eax, ebx\r
- add eax, ecx\r
- mov edx, [esp] ; copy pushed register's value to permanent memory\r
- mov [eax], edx\r
- mov edx, [esp + 4]\r
- mov [eax + 4], edx\r
- mov edx, [esp + 8]\r
- mov [eax + 8], edx\r
- mov edx, [esp + 12]\r
- mov [eax + 12], edx\r
- mov edx, [esp + 16] ; Update return address into permanent memory\r
- mov [eax + 16], edx\r
- mov esp, eax ; From now, esp is pointed to permanent memory\r
-\r
- ;\r
- ; Fixup the ebp point to permanent memory\r
- ;\r
- mov eax, ebp\r
- sub eax, ebx\r
- add eax, ecx\r
- mov ebp, eax ; From now, ebp is pointed to permanent memory\r
-\r
- pop edx\r
- pop ecx\r
- pop ebx\r
- pop eax\r
- ret\r
+++ /dev/null
-## @file\r
-# This is the first module taking control from the coreboot.\r
-#\r
-# Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
-#\r
-# SPDX-License-Identifier: BSD-2-Clause-Patent\r
-#\r
-#\r
-##\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = SecCore\r
- FILE_GUID = BA7BE337-6CFB-4dbb-B26C-21EC2FC16073\r
- MODULE_TYPE = SEC\r
- VERSION_STRING = 1.0\r
-\r
-\r
-#\r
-# The following information is for reference only and not required by the build tools.\r
-#\r
-# VALID_ARCHITECTURES = IA32 X64 EBC\r
-#\r
-\r
-[Sources]\r
- SecMain.c\r
- SecMain.h\r
- FindPeiCore.c\r
-\r
-[Sources.IA32]\r
- Ia32/Stack.nasm\r
- Ia32/SecEntry.nasm\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- UefiCpuPkg/UefiCpuPkg.dec\r
- CorebootModulePkg/CorebootModulePkg.dec\r
-\r
-[LibraryClasses]\r
- BaseMemoryLib\r
- DebugLib\r
- BaseLib\r
- PcdLib\r
- DebugAgentLib\r
- UefiCpuLib\r
- PeCoffGetEntryPointLib\r
- PeCoffExtraActionLib\r
-\r
-[Ppis]\r
- gEfiSecPlatformInformationPpiGuid # PPI ALWAYS_PRODUCED\r
- gEfiTemporaryRamSupportPpiGuid # PPI ALWAYS_PRODUCED\r
-\r
-[Pcd]\r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemBase\r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemSize\r
-\r
+++ /dev/null
-/** @file\r
- C functions in SEC\r
-\r
-Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-\r
-#include "SecMain.h"\r
-\r
-EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI gSecTemporaryRamSupportPpi = {\r
- SecTemporaryRamSupport\r
-};\r
-\r
-EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformInformationPpi[] = {\r
- {\r
- (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
- &gEfiTemporaryRamSupportPpiGuid,\r
- &gSecTemporaryRamSupportPpi\r
- }\r
-};\r
-\r
-//\r
-// These are IDT entries pointing to 10:FFFFFFE4h.\r
-//\r
-UINT64 mIdtEntryTemplate = 0xffff8e000010ffe4ULL;\r
-\r
-/**\r
- Caller provided function to be invoked at the end of InitializeDebugAgent().\r
-\r
- Entry point to the C language phase of SEC. After the SEC assembly\r
- code has initialized some temporary memory and set up the stack,\r
- the control is transferred to this function.\r
-\r
- @param[in] Context The first input parameter of InitializeDebugAgent().\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-SecStartupPhase2(\r
- IN VOID *Context\r
- );\r
-\r
-\r
-/**\r
-\r
- Entry point to the C language phase of SEC. After the SEC assembly\r
- code has initialized some temporary memory and set up the stack,\r
- the control is transferred to this function.\r
-\r
-\r
- @param SizeOfRam Size of the temporary memory available for use.\r
- @param TempRamBase Base address of temporary ram\r
- @param BootFirmwareVolume Base address of the Boot Firmware Volume.\r
-**/\r
-VOID\r
-EFIAPI\r
-SecStartup (\r
- IN UINT32 SizeOfRam,\r
- IN UINT32 TempRamBase,\r
- IN VOID *BootFirmwareVolume\r
- )\r
-{\r
- EFI_SEC_PEI_HAND_OFF SecCoreData;\r
- IA32_DESCRIPTOR IdtDescriptor;\r
- SEC_IDT_TABLE IdtTableInStack;\r
- UINT32 Index;\r
- UINT32 PeiStackSize;\r
-\r
- PeiStackSize = (SizeOfRam >> 1);\r
-\r
- ASSERT (PeiStackSize < SizeOfRam);\r
-\r
- //\r
- // Process all libraries constructor function linked to SecCore.\r
- //\r
- ProcessLibraryConstructorList ();\r
-\r
- //\r
- // Initialize floating point operating environment\r
- // to be compliant with UEFI spec.\r
- //\r
- InitializeFloatingPointUnits ();\r
-\r
-\r
- // |-------------------|---->\r
- // |Idt Table |\r
- // |-------------------|\r
- // |PeiService Pointer | PeiStackSize\r
- // |-------------------|\r
- // | |\r
- // | Stack |\r
- // |-------------------|---->\r
- // | |\r
- // | |\r
- // | Heap | PeiTemporaryRamSize\r
- // | |\r
- // | |\r
- // |-------------------|----> TempRamBase\r
-\r
- IdtTableInStack.PeiService = 0;\r
- for (Index = 0; Index < SEC_IDT_ENTRY_COUNT; Index ++) {\r
- CopyMem ((VOID*)&IdtTableInStack.IdtTable[Index], (VOID*)&mIdtEntryTemplate, sizeof (UINT64));\r
- }\r
-\r
- IdtDescriptor.Base = (UINTN) &IdtTableInStack.IdtTable;\r
- IdtDescriptor.Limit = (UINT16)(sizeof (IdtTableInStack.IdtTable) - 1);\r
-\r
- AsmWriteIdtr (&IdtDescriptor);\r
-\r
- //\r
- // Update the base address and length of Pei temporary memory\r
- //\r
- SecCoreData.DataSize = (UINT16) sizeof (EFI_SEC_PEI_HAND_OFF);\r
- SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;\r
- SecCoreData.BootFirmwareVolumeSize = (UINTN)(0x100000000ULL - (UINTN) BootFirmwareVolume);\r
- SecCoreData.TemporaryRamBase = (VOID*)(UINTN) TempRamBase;\r
- SecCoreData.TemporaryRamSize = SizeOfRam;\r
- SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;\r
- SecCoreData.PeiTemporaryRamSize = SizeOfRam - PeiStackSize;\r
- SecCoreData.StackBase = (VOID*)(UINTN)(TempRamBase + SecCoreData.PeiTemporaryRamSize);\r
- SecCoreData.StackSize = PeiStackSize;\r
-\r
- //\r
- // Initialize Debug Agent to support source level debug in SEC/PEI phases before memory ready.\r
- //\r
- InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, &SecCoreData, SecStartupPhase2);\r
-\r
-}\r
-\r
-/**\r
- Caller provided function to be invoked at the end of InitializeDebugAgent().\r
-\r
- Entry point to the C language phase of SEC. After the SEC assembly\r
- code has initialized some temporary memory and set up the stack,\r
- the control is transferred to this function.\r
-\r
- @param[in] Context The first input parameter of InitializeDebugAgent().\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-SecStartupPhase2(\r
- IN VOID *Context\r
- )\r
-{\r
- EFI_SEC_PEI_HAND_OFF *SecCoreData;\r
- EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint;\r
-\r
- SecCoreData = (EFI_SEC_PEI_HAND_OFF *) Context;\r
- //\r
- // Find Pei Core entry point. It will report SEC and Pei Core debug information if remote debug\r
- // is enabled.\r
- //\r
- FindAndReportEntryPoints ((EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase, &PeiCoreEntryPoint);\r
- if (PeiCoreEntryPoint == NULL)\r
- {\r
- CpuDeadLoop ();\r
- }\r
-\r
- //\r
- // Transfer the control to the PEI core\r
- //\r
- ASSERT (PeiCoreEntryPoint != NULL);\r
- (*PeiCoreEntryPoint) (SecCoreData, (EFI_PEI_PPI_DESCRIPTOR *)&mPeiSecPlatformInformationPpi);\r
-\r
- //\r
- // Should not come here.\r
- //\r
- return ;\r
-}\r
-\r
-/**\r
- This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into\r
- permanent memory.\r
-\r
- @param PeiServices Pointer to the PEI Services Table.\r
- @param TemporaryMemoryBase Source Address in temporary memory from which the SEC or PEIM will copy the\r
- Temporary RAM contents.\r
- @param PermanentMemoryBase Destination Address in permanent memory into which the SEC or PEIM will copy the\r
- Temporary RAM contents.\r
- @param CopySize Amount of memory to migrate from temporary to permanent memory.\r
-\r
- @retval EFI_SUCCESS The data was successfully returned.\r
- @retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when\r
- TemporaryMemoryBase > PermanentMemoryBase.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-SecTemporaryRamSupport (\r
- IN CONST EFI_PEI_SERVICES **PeiServices,\r
- IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
- IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
- IN UINTN CopySize\r
- )\r
-{\r
- IA32_DESCRIPTOR IdtDescriptor;\r
- VOID* OldHeap;\r
- VOID* NewHeap;\r
- VOID* OldStack;\r
- VOID* NewStack;\r
- DEBUG_AGENT_CONTEXT_POSTMEM_SEC DebugAgentContext;\r
- BOOLEAN OldStatus;\r
- UINTN PeiStackSize;\r
-\r
- PeiStackSize = (CopySize >> 1);\r
-\r
- ASSERT (PeiStackSize < CopySize);\r
-\r
- //\r
- // |-------------------|---->\r
- // | Stack | PeiStackSize\r
- // |-------------------|---->\r
- // | Heap | PeiTemporaryRamSize\r
- // |-------------------|----> TempRamBase\r
- //\r
- // |-------------------|---->\r
- // | Heap | PeiTemporaryRamSize\r
- // |-------------------|---->\r
- // | Stack | PeiStackSize\r
- // |-------------------|----> PermanentMemoryBase\r
- //\r
-\r
- OldHeap = (VOID*)(UINTN)TemporaryMemoryBase;\r
- NewHeap = (VOID*)((UINTN)PermanentMemoryBase + PeiStackSize);\r
- \r
- OldStack = (VOID*)((UINTN)TemporaryMemoryBase + CopySize - PeiStackSize);\r
- NewStack = (VOID*)(UINTN)PermanentMemoryBase;\r
-\r
- DebugAgentContext.HeapMigrateOffset = (UINTN)NewHeap - (UINTN)OldHeap;\r
- DebugAgentContext.StackMigrateOffset = (UINTN)NewStack - (UINTN)OldStack;\r
- \r
- OldStatus = SaveAndSetDebugTimerInterrupt (FALSE);\r
- //\r
- // Initialize Debug Agent to support source level debug in PEI phase after memory ready.\r
- // It will build HOB and fix up the pointer in IDT table.\r
- //\r
- InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, (VOID *) &DebugAgentContext, NULL);\r
-\r
- //\r
- // Migrate Heap\r
- //\r
- CopyMem (NewHeap, OldHeap, CopySize - PeiStackSize);\r
-\r
- //\r
- // Migrate Stack\r
- //\r
- CopyMem (NewStack, OldStack, PeiStackSize);\r
-\r
-\r
- //\r
- // We need *not* fix the return address because currently,\r
- // The PeiCore is executed in flash.\r
- //\r
-\r
- //\r
- // Rebase IDT table in permanent memory\r
- //\r
- AsmReadIdtr (&IdtDescriptor);\r
- IdtDescriptor.Base = IdtDescriptor.Base - (UINTN)OldStack + (UINTN)NewStack;\r
-\r
- AsmWriteIdtr (&IdtDescriptor);\r
-\r
-\r
- //\r
- // Program MTRR\r
- //\r
-\r
- //\r
- // SecSwitchStack function must be invoked after the memory migration\r
- // immediately, also we need fixup the stack change caused by new call into\r
- // permanent memory.\r
- //\r
- SecSwitchStack (\r
- (UINT32) (UINTN) OldStack,\r
- (UINT32) (UINTN) NewStack\r
- );\r
-\r
- SaveAndSetDebugTimerInterrupt (OldStatus);\r
- \r
- return EFI_SUCCESS;\r
-}\r
-\r
+++ /dev/null
-/** @file\r
- Master header file for SecCore.\r
-\r
-Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#ifndef _SEC_CORE_H_\r
-#define _SEC_CORE_H_\r
-\r
-\r
-#include <PiPei.h>\r
-\r
-#include <Ppi/SecPlatformInformation.h>\r
-#include <Ppi/TemporaryRamSupport.h>\r
-\r
-#include <Library/BaseLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/UefiCpuLib.h>\r
-#include <Library/PeCoffGetEntryPointLib.h>\r
-#include <Library/PeCoffExtraActionLib.h>\r
-#include <Library/DebugAgentLib.h>\r
-\r
-\r
-#define SEC_IDT_ENTRY_COUNT 34\r
-\r
-typedef struct _SEC_IDT_TABLE {\r
- //\r
- // Reserved 8 bytes preceding IDT to store EFI_PEI_SERVICES**, since IDT base\r
- // address should be 8-byte alignment.\r
- // Note: For IA32, only the 4 bytes immediately preceding IDT is used to store\r
- // EFI_PEI_SERVICES**\r
- //\r
- UINT64 PeiService; \r
- UINT64 IdtTable[SEC_IDT_ENTRY_COUNT];\r
-} SEC_IDT_TABLE;\r
-\r
-/**\r
- Switch the stack in the temporary memory to the one in the permanent memory.\r
-\r
- This function must be invoked after the memory migration immediately. The relative\r
- position of the stack in the temporary and permanent memory is same.\r
-\r
- @param TemporaryMemoryBase Base address of the temporary memory.\r
- @param PermenentMemoryBase Base address of the permanent memory.\r
-**/\r
-VOID\r
-EFIAPI\r
-SecSwitchStack (\r
- UINT32 TemporaryMemoryBase,\r
- UINT32 PermenentMemoryBase\r
- );\r
-\r
-/**\r
- This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into\r
- permanent memory.\r
-\r
- @param PeiServices Pointer to the PEI Services Table.\r
- @param TemporaryMemoryBase Source Address in temporary memory from which the SEC or PEIM will copy the\r
- Temporary RAM contents.\r
- @param PermanentMemoryBase Destination Address in permanent memory into which the SEC or PEIM will copy the\r
- Temporary RAM contents.\r
- @param CopySize Amount of memory to migrate from temporary to permanent memory.\r
-\r
- @retval EFI_SUCCESS The data was successfully returned.\r
- @retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when\r
- TemporaryMemoryBase > PermanentMemoryBase.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-SecTemporaryRamSupport (\r
- IN CONST EFI_PEI_SERVICES **PeiServices,\r
- IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
- IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
- IN UINTN CopySize\r
- );\r
-\r
-/**\r
- Entry point to the C language phase of SEC. After the SEC assembly\r
- code has initialized some temporary memory and set up the stack,\r
- the control is transferred to this function.\r
-\r
- @param SizeOfRam Size of the temporary memory available for use.\r
- @param TempRamBase Base address of temporary ram\r
- @param BootFirmwareVolume Base address of the Boot Firmware Volume.\r
-**/\r
-VOID\r
-EFIAPI\r
-SecStartup (\r
- IN UINT32 SizeOfRam,\r
- IN UINT32 TempRamBase,\r
- IN VOID *BootFirmwareVolume\r
- );\r
-\r
-/**\r
- Find and return Pei Core entry point.\r
-\r
- It also find SEC and PEI Core file debug information. It will report them if\r
- remote debug is enabled.\r
-\r
- @param BootFirmwareVolumePtr Point to the boot firmware volume.\r
- @param PeiCoreEntryPoint Point to the PEI core entry point.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-FindAndReportEntryPoints (\r
- IN EFI_FIRMWARE_VOLUME_HEADER *BootFirmwareVolumePtr,\r
- OUT EFI_PEI_CORE_ENTRY_POINT *PeiCoreEntryPoint\r
- );\r
-\r
-/**\r
- Autogenerated function that calls the library constructors for all of the module's\r
- dependent libraries. This function must be called by the SEC Core once a stack has\r
- been established.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-ProcessLibraryConstructorList (\r
- VOID\r
- );\r
- \r
-#endif\r
+++ /dev/null
-================================================================================\r
-Build And Integration Instructions\r
-2014 June 24th\r
-================================================================================\r
-\r
-================================================================================\r
-DISCLAIMER\r
-================================================================================\r
-This release note as well as the software described in it is furnished under license\r
-and may only be used or copied in accordance with the terms of the license. The\r
-information in this manual is furnished for informational use only, is subject to\r
-change without notice, and should not be construed as a commitment by Intel Corporation.\r
-Intel Corporation assumes no responsibility or liability for any errors or inaccuracies\r
-that may appear in this document or any software that may be provided in association\r
-with this document.\r
-Except as permitted by such license, no part of this document may be reproduced,\r
-stored in a retrieval system, or transmitted in any form or by any means without\r
-the express written consent of Intel Corporation.\r
-\r
-================================================================================\r
- INDEX\r
-================================================================================\r
-A. INTRODUCTION\r
-B. HOW TO BUILD\r
-C. HOW TO INTEGRATE \r
-\r
-================================================================================\r
-A. INTRODUCTION\r
-================================================================================\r
-This document provides instructions on how to build Coreboot Uefi Payload and \r
-how to integrate it into coreboot firmware.\r
-\r
-================================================================================\r
-B. HOW TO BUILD \r
-================================================================================\r
-1. Run the below two commands in windows command prompt window:\r
- edksetup.bat\r
- \r
- For debug ia32 build:\r
- build -a IA32 -p CorebootPayloadPkg\CorebootPayloadPkgIa32.dsc -b DEBUG -t <ToolChain>\r
- \r
- For release ia32 build:\r
- build -a IA32 -p CorebootPayloadPkg\CorebootPayloadPkgIa32.dsc -b RELEASE -t <ToolChain>\r
- \r
- For debug X64 build:\r
- build -a IA32 -a X64 -p CorebootPayloadPkg\CorebootPayloadPkgIa32X64.dsc -b DEBUG -t <ToolChain>\r
- \r
- For release X64 build:\r
- build -a IA32 -a X64 -p CorebootPayloadPkg\CorebootPayloadPkgIa32X64.dsc -b RELEASE -t <ToolChain>\r
- \r
- <ToolChain> is the EDK II build environment on your host. Currently it was tested with VS2008x64 toolchain.\r
-\r
- For details about EDK II build steps, refer to http://svn.code.sf.net/p/edk2/code/branches/UDK2014/BuildNotes2.txt\r
- \r
-2. If build is successfully, the payload image (UEFIPAYLOAD.fd) will be generated inside the folder of Build\CorebootPayloadPkg.\r
-\r
-================================================================================\r
-C. HOW TO INTEGRATE\r
-================================================================================\r
-1. Copy the payload image (UEFIPAYLOAD.fd) into the top-level directory of Coreboot source tree.\r
-2. Run "make menuconfig" in linux console to start Coreboot configuration surface.\r
-3. In the Payload section,\r
- 1) Choose "An ELF executable payload" for the option of "Add a payload".\r
- 2) Type the path of payload image for the option of "Payload path and filename".\r
- 3) Select the option of "Use LZMA compression for payloads".\r
- \r
-4. If the graphics console is required in Coreboot UEFI payload, running VGA option rom should be enabled.\r
- For details:\r
- 1) In the Device section, select the option of "Run VGA Option ROMs".\r
- 2) In the VGA BIOS section, select the option of "Add a VGA BIOS Image", Input the path of vga bios image \r
- for the option of VGA BIOS path and filename, give the values of vendor id and device id for the option \r
- of "VGA device PCI IDs".\r
- 3) In the Display section,\r
- Select the option of "Set framebuffer graphics resolution"\r
- Choose a right display mode for the option of "framebuffer graphics resolution".\r
- Note: If the boot OS is windows, please choose the display mode supporting 32 bit color.\r
- Select the option of "Keep VESA framebuffer"\r
- \r
-5. Press ESC key to exit the Coreboot configuration surface. If there is a question prompted like "Do you wish to save your new configuration?",\r
- choose Yes.\r
- \r
-6. Run "make" to build the coreboot firmware image.\r
+++ /dev/null
-## @file\r
-# Coreboot Payload Package\r
-#\r
-# Provides drivers and definitions to create uefi payload for coreboot.\r
-#\r
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
-# SPDX-License-Identifier: BSD-2-Clause-Patent\r
-#\r
-##\r
-\r
-[Defines]\r
- DEC_SPECIFICATION = 0x00010005\r
- PACKAGE_NAME = CorebootPayloadPkg\r
- PACKAGE_GUID = 58ABC905-951E-472e-8590-77BA8A50BE63\r
- PACKAGE_VERSION = 0.1\r
-\r
-[LibraryClasses]\r
-\r
-[Guids]\r
- #\r
- ## Defines the token space for the Coreboot Payload Package PCDs.\r
- #\r
- gUEfiCorebootPayloadPkgTokenSpaceGuid = {0x1d127ea, 0xf6f1, 0x4ef6, {0x94, 0x15, 0x8a, 0x0, 0x0, 0x93, 0xf8, 0x9d}}\r
-\r
- #\r
- # Gop Temp\r
- #\r
- gBmpImageGuid = { 0x878AC2CC, 0x5343, 0x46F2, { 0xB5, 0x63, 0x51, 0xF8, 0x9D, 0xAF, 0x56, 0xBA } }\r
-\r
-[Ppis]\r
-\r
-[Protocols]\r
- #\r
- # Gop Temp\r
- #\r
- gPlatformGOPPolicyGuid = { 0xec2e931b, 0x3281, 0x48a5, { 0x81, 0x07, 0xdf, 0x8a, 0x8b, 0xed, 0x3c, 0x5d } }\r
-\r
-################################################################################\r
-#\r
-# PCD Declarations section - list of all PCDs Declared by this Package\r
-# Only this package should be providing the\r
-# declaration, other packages should not.\r
-#\r
-################################################################################\r
-[PcdsFixedAtBuild, PcdsPatchableInModule]\r
-\r
-[PcdsDynamic, PcdsDynamicEx]\r
-\r
+++ /dev/null
-## @file\r
-# Coreboot Payload Package\r
-#\r
-# Provides drivers and definitions to create uefi payload for coreboot.\r
-#\r
-# Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>\r
-# SPDX-License-Identifier: BSD-2-Clause-Patent\r
-#\r
-##\r
-\r
-################################################################################\r
-[FD.UefiPayload]\r
-BaseAddress = 0x800000|gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemBase\r
-Size = 0x410000|gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemSize\r
-ErasePolarity = 1\r
-BlockSize = 0x1000\r
-NumBlocks = 0x410\r
-\r
-0x00000000|0x030000\r
-FV = PEIFV\r
-\r
-0x00030000|0x3E0000\r
-FV = DXEFV\r
-\r
-################################################################################\r
-[FV.PEIFV]\r
-BlockSize = 0x1000\r
-FvAlignment = 16\r
-ERASE_POLARITY = 1\r
-MEMORY_MAPPED = TRUE\r
-STICKY_WRITE = TRUE\r
-LOCK_CAP = TRUE\r
-LOCK_STATUS = TRUE\r
-WRITE_DISABLED_CAP = TRUE\r
-WRITE_ENABLED_CAP = TRUE\r
-WRITE_STATUS = TRUE\r
-WRITE_LOCK_CAP = TRUE\r
-WRITE_LOCK_STATUS = TRUE\r
-READ_DISABLED_CAP = TRUE\r
-READ_ENABLED_CAP = TRUE\r
-READ_STATUS = TRUE\r
-READ_LOCK_CAP = TRUE\r
-READ_LOCK_STATUS = TRUE\r
-\r
-INF CorebootModulePkg/SecCore/SecCore.inf\r
-\r
-INF MdeModulePkg/Core/Pei/PeiMain.inf\r
-INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
-INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
-INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf\r
-INF CorebootModulePkg/CbSupportPei/CbSupportPei.inf\r
-INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
-\r
-################################################################################\r
-\r
-[FV.DXEFV]\r
-BlockSize = 0x1000\r
-FvForceRebase = FALSE\r
-FvAlignment = 16\r
-ERASE_POLARITY = 1\r
-MEMORY_MAPPED = TRUE\r
-STICKY_WRITE = TRUE\r
-LOCK_CAP = TRUE\r
-LOCK_STATUS = TRUE\r
-WRITE_DISABLED_CAP = TRUE\r
-WRITE_ENABLED_CAP = TRUE\r
-WRITE_STATUS = TRUE\r
-WRITE_LOCK_CAP = TRUE\r
-WRITE_LOCK_STATUS = TRUE\r
-READ_DISABLED_CAP = TRUE\r
-READ_ENABLED_CAP = TRUE\r
-READ_STATUS = TRUE\r
-READ_LOCK_CAP = TRUE\r
-READ_LOCK_STATUS = TRUE\r
-\r
-APRIORI DXE {\r
- INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
- INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
- INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
-}\r
-\r
-#\r
-# DXE Phase modules\r
-#\r
-INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
-INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
-INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
-INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
-\r
-INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
-INF UefiCpuPkg/CpuDxe/CpuDxe.inf\r
-INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf\r
-INF MdeModulePkg/Application/UiApp/UiApp.inf\r
-!if $(USE_HPET_TIMER) == TRUE\r
-INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
-!else\r
-INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf\r
-!endif\r
-INF MdeModulePkg/Universal/Metronome/Metronome.inf\r
-INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
-INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
-INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
-INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
-INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf\r
-INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
-INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
-\r
-INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
-INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
-INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
-INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r
-INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
-INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
-INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
-INF CorebootModulePkg/CbSupportDxe/CbSupportDxe.inf\r
-\r
-INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
-#\r
-# PCI Support\r
-#\r
-INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
-INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf\r
-\r
-#\r
-# ISA Support\r
-#\r
-INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf\r
-\r
-#\r
-# Console Support\r
-#\r
-INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
-INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
-INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
-INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
-\r
-#\r
-# SCSI/ATA/IDE/DISK Support\r
-#\r
-INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
-INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
-INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
-INF CorebootModulePkg/SataControllerDxe/SataControllerDxe.inf\r
-INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf\r
-INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf\r
-INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r
-INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r
-\r
-INF FatPkg/EnhancedFatDxe/Fat.inf\r
-\r
-#\r
-# SD/eMMC Support\r
-#\r
-INF MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf\r
-INF MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf\r
-INF MdeModulePkg/Bus/Sd/SdDxe/SdDxe.inf\r
-\r
-#\r
-# Usb Support\r
-#\r
-INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf\r
-INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
-INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf\r
-INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
-INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
-INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
-\r
-#\r
-# OHCI Support\r
-#\r
-INF QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/OhciDxe.inf\r
-\r
-#\r
-# Shell\r
-#\r
-INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf\r
-INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf\r
-INF ShellPkg/Application/Shell/Shell.inf\r
-\r
-FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {\r
- SECTION RAW = MdeModulePkg/Logo/Logo.bmp\r
-}\r
-\r
-#\r
-# Framebuffer Gop\r
-#\r
-INF CorebootPayloadPkg/FbGop/FbGop.inf\r
-\r
-################################################################################\r
-#\r
-# Rules are use with the [FV] section's module INF type to define\r
-# how an FFS file is created for a given INF file. The following Rule are the default\r
-# rules for the different module type. User can add the customized rules to define the\r
-# content of the FFS file.\r
-#\r
-################################################################################\r
-\r
-[Rule.Common.SEC]\r
- FILE SEC = $(NAMED_GUID) {\r
- PE32 PE32 Align=32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
- }\r
-\r
-[Rule.Common.PEI_CORE]\r
- FILE PEI_CORE = $(NAMED_GUID) {\r
- PE32 PE32 Align=Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
- UI STRING ="$(MODULE_NAME)" Optional\r
- VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
- }\r
-\r
-[Rule.Common.PEIM]\r
- FILE PEIM = $(NAMED_GUID) {\r
- PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
- PE32 PE32 Align=Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
- UI STRING="$(MODULE_NAME)" Optional\r
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
- }\r
-\r
-[Rule.Common.DXE_CORE]\r
- FILE DXE_CORE = $(NAMED_GUID) {\r
- PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
- UI STRING="$(MODULE_NAME)" Optional\r
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
- }\r
-\r
-[Rule.Common.DXE_DRIVER]\r
- FILE DRIVER = $(NAMED_GUID) {\r
- DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
- PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
- UI STRING="$(MODULE_NAME)" Optional\r
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
- }\r
-\r
-[Rule.Common.DXE_RUNTIME_DRIVER]\r
- FILE DRIVER = $(NAMED_GUID) {\r
- DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
- PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
- UI STRING="$(MODULE_NAME)" Optional\r
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
- }\r
-\r
-[Rule.Common.UEFI_DRIVER]\r
- FILE DRIVER = $(NAMED_GUID) {\r
- DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
- PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
- UI STRING="$(MODULE_NAME)" Optional\r
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
- }\r
-\r
-[Rule.Common.UEFI_DRIVER.BINARY]\r
- FILE DRIVER = $(NAMED_GUID) {\r
- DXE_DEPEX DXE_DEPEX Optional |.depex\r
- PE32 PE32 |.efi\r
- UI STRING="$(MODULE_NAME)" Optional\r
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
- }\r
-\r
-[Rule.Common.UEFI_APPLICATION]\r
- FILE APPLICATION = $(NAMED_GUID) {\r
- PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
- UI STRING="$(MODULE_NAME)" Optional\r
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
- }\r
-\r
-[Rule.Common.UEFI_APPLICATION.BINARY]\r
- FILE APPLICATION = $(NAMED_GUID) {\r
- PE32 PE32 |.efi\r
- UI STRING="$(MODULE_NAME)" Optional\r
- VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
- }\r
-\r
-[Rule.Common.USER_DEFINED.ACPITABLE]\r
- FILE FREEFORM = $(NAMED_GUID) {\r
- RAW ACPI |.acpi\r
- RAW ASL |.aml\r
- }\r
-\r
-[Rule.Common.USER_DEFINED.CSM]\r
- FILE FREEFORM = $(NAMED_GUID) {\r
- RAW BIN |.bin\r
- }\r
-\r
-[Rule.Common.SEC.RESET_VECTOR]\r
- FILE RAW = $(NAMED_GUID) {\r
- RAW RAW |.raw\r
- }\r
+++ /dev/null
-## @file\r
-# Coreboot Payload Package\r
-#\r
-# Provides drivers and definitions to create uefi payload for coreboot.\r
-#\r
-# Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>\r
-# SPDX-License-Identifier: BSD-2-Clause-Patent\r
-#\r
-##\r
-\r
-################################################################################\r
-#\r
-# Defines Section - statements that will be processed to create a Makefile.\r
-#\r
-################################################################################\r
-[Defines]\r
- PLATFORM_NAME = CorebootPayloadPkg\r
- PLATFORM_GUID = F71608AB-D63D-4491-B744-A99998C8CD96\r
- PLATFORM_VERSION = 0.1\r
- DSC_SPECIFICATION = 0x00010005\r
- SUPPORTED_ARCHITECTURES = IA32\r
- BUILD_TARGETS = DEBUG|RELEASE|NOOPT\r
- SKUID_IDENTIFIER = DEFAULT\r
- OUTPUT_DIRECTORY = Build/CorebootPayloadPkgIA32\r
- FLASH_DEFINITION = CorebootPayloadPkg/CorebootPayloadPkg.fdf\r
-\r
- DEFINE SECURE_BOOT_ENABLE = FALSE\r
- DEFINE SOURCE_DEBUG_ENABLE = FALSE\r
-\r
- #\r
- # CPU options\r
- #\r
- DEFINE MAX_LOGICAL_PROCESSORS = 64\r
-\r
- #\r
- # PCI options\r
- #\r
- DEFINE PCIE_BASE = 0xE0000000\r
-\r
- #\r
- # Serial port set up\r
- #\r
- DEFINE BAUD_RATE = 115200\r
- DEFINE SERIAL_CLOCK_RATE = 1843200\r
- DEFINE SERIAL_LINE_CONTROL = 3 # 8-bits, no parity\r
- DEFINE SERIAL_HARDWARE_FLOW_CONTROL = FALSE\r
- DEFINE SERIAL_DETECT_CABLE = FALSE\r
- DEFINE SERIAL_FIFO_CONTROL = 7 # Enable FIFO\r
- DEFINE SERIAL_EXTENDED_TX_FIFO_SIZE = 16\r
- DEFINE UART_DEFAULT_BAUD_RATE = $(BAUD_RATE)\r
- DEFINE UART_DEFAULT_DATA_BITS = 8\r
- DEFINE UART_DEFAULT_PARITY = 1\r
- DEFINE UART_DEFAULT_STOP_BITS = 1\r
- DEFINE DEFAULT_TERMINAL_TYPE = 0\r
-\r
- #\r
- # typedef struct {\r
- # UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries.\r
- # UINT16 DeviceId; ///< Device ID to match the PCI device\r
- # UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz\r
- # UINT64 Offset; ///< The byte offset into to the BAR\r
- # UINT8 BarIndex; ///< Which BAR to get the UART base address\r
- # UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte.\r
- # UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.\r
- # UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.\r
- # UINT8 Reserved[2];\r
- # } PCI_SERIAL_PARAMETER;\r
- #\r
- # Vendor FFFF Device 0000 Prog Interface 1, BAR #0, Offset 0, Stride = 1, Clock 1843200 (0x1c2000)\r
- #\r
- # [Vendor] [Device] [----ClockRate---] [------------Offset-----------] [Bar] [Stride] [RxFifo] [TxFifo] [Rsvd] [Vendor]\r
- DEFINE PCI_SERIAL_PARAMETERS = {0xff,0xff, 0x00,0x00, 0x0,0x20,0x1c,0x00, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x00, 0x01, 0x0,0x0, 0x0,0x0, 0x0,0x0, 0xff,0xff}\r
-\r
- #\r
- # Chipset options\r
- #\r
- DEFINE USE_HPET_TIMER = FALSE\r
-\r
-[BuildOptions]\r
- *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES\r
- GCC:*_UNIXGCC_*_CC_FLAGS = -DMDEPKG_NDEBUG\r
- GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG\r
- INTEL:RELEASE_*_*_CC_FLAGS = /D MDEPKG_NDEBUG\r
- MSFT:RELEASE_*_*_CC_FLAGS = /D MDEPKG_NDEBUG\r
-\r
-[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]\r
- MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
-\r
-################################################################################\r
-#\r
-# SKU Identification section - list of all SKU IDs supported by this Platform.\r
-#\r
-################################################################################\r
-[SkuIds]\r
- 0|DEFAULT\r
-\r
-################################################################################\r
-#\r
-# Library Class section - list of all Library Classes needed by this Platform.\r
-#\r
-################################################################################\r
-[LibraryClasses]\r
- #\r
- # Entry point\r
- #\r
- PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf\r
- PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf\r
- DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf\r
- UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf\r
- UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf\r
-\r
- #\r
- # Basic\r
- #\r
- BaseLib|MdePkg/Library/BaseLib/BaseLib.inf\r
- BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf\r
- SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf\r
- PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf\r
- CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf\r
- IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf\r
-!if $(PCIE_BASE) == 0\r
- PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf\r
- PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf\r
-!else\r
- PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf\r
- PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf\r
-!endif\r
- PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf\r
- PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf\r
- PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf\r
- CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf\r
-\r
- #\r
- # UEFI & PI\r
- #\r
- UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf\r
- UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf\r
- UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf\r
- UefiLib|MdePkg/Library/UefiLib/UefiLib.inf\r
- UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf\r
- HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf\r
- DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf\r
- UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf\r
- PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf\r
- PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf\r
- DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf\r
- DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf\r
- UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf\r
- SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf\r
-\r
- #\r
- # Generic Modules\r
- #\r
- UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf\r
- UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf\r
- OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf\r
- CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf\r
- SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf\r
- UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf\r
- CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf\r
-\r
- #\r
- # CPU\r
- #\r
- MtrrLib|UefiCpuPkg/Library/MtrrLib/MtrrLib.inf\r
- LocalApicLib|UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf\r
-\r
- #\r
- # Platform\r
- #\r
- TimerLib|CorebootPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.inf\r
- ResetSystemLib|CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.inf\r
- SerialPortLib|CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf\r
- PlatformHookLib|CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf\r
- PlatformBootManagerLib|CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf\r
- IoApicLib|PcAtChipsetPkg/Library/BaseIoApicLib/BaseIoApicLib.inf\r
- CbPlatformSupportLib|CorebootModulePkg/Library/CbPlatformSupportLibNull/CbPlatformSupportLibNull.inf\r
-\r
- #\r
- # Misc\r
- #\r
- DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf\r
- PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf\r
-!if $(SOURCE_DEBUG_ENABLE) == TRUE\r
- PeCoffExtraActionLib|SourceLevelDebugPkg/Library/PeCoffExtraActionLibDebug/PeCoffExtraActionLibDebug.inf\r
- DebugCommunicationLib|SourceLevelDebugPkg/Library/DebugCommunicationLibSerialPort/DebugCommunicationLibSerialPort.inf\r
-!else\r
- PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf\r
- DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf\r
-!endif\r
- CbParseLib|CorebootModulePkg/Library/CbParseLib/CbParseLib.inf\r
- DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf\r
- LockBoxLib|MdeModulePkg/Library/LockBoxNullLib/LockBoxNullLib.inf\r
- FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf\r
- AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf\r
- TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf\r
- VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf\r
-\r
-[LibraryClasses.IA32.SEC]\r
- DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf\r
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
- HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf\r
- MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf\r
- DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf\r
- ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf\r
-\r
-[LibraryClasses.IA32.PEI_CORE, LibraryClasses.IA32.PEIM]\r
- PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf\r
- HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf\r
- MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf\r
- ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf\r
- ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf\r
-!if $(SOURCE_DEBUG_ENABLE)\r
- DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgentLib.inf\r
-!endif\r
-\r
-[LibraryClasses.common.DXE_CORE]\r
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
- HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf\r
- MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf\r
- ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf\r
- ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf\r
-!if $(SOURCE_DEBUG_ENABLE)\r
- DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf\r
-!endif\r
- CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf\r
-\r
-[LibraryClasses.common.DXE_DRIVER]\r
- PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf\r
- HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf\r
- MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf\r
- ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf\r
- ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf\r
-!if $(SOURCE_DEBUG_ENABLE)\r
- DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf\r
-!endif\r
- CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf\r
- MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf\r
-\r
-[LibraryClasses.common.DXE_RUNTIME_DRIVER]\r
- PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf\r
- HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf\r
- MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf\r
- ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf\r
-\r
-[LibraryClasses.common.UEFI_DRIVER,LibraryClasses.common.UEFI_APPLICATION]\r
- PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf\r
- MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf\r
- ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf\r
- HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf\r
-\r
-################################################################################\r
-#\r
-# Pcd Section - list of all EDK II PCD Entries defined by this Platform.\r
-#\r
-################################################################################\r
-[PcdsFeatureFlag]\r
-!if $(TARGET) == DEBUG\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE\r
-!else\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE\r
-!endif\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|FALSE\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE\r
-\r
-[PcdsFixedAtBuild]\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x10000\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x8000\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0x10000\r
- #\r
- # Make VariableRuntimeDxe work at emulated non-volatile variable mode.\r
- #\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE\r
-\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }\r
-\r
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|$(PCIE_BASE)\r
-\r
-!if $(SOURCE_DEBUG_ENABLE)\r
- gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2\r
-!endif\r
-\r
-[PcdsPatchableInModule.common]\r
- gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x7\r
- gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000004F\r
-!if $(SOURCE_DEBUG_ENABLE)\r
- gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x17\r
-!else\r
- gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F\r
-!endif\r
-\r
- #\r
- # The following parameters are set by Library/PlatformHookLib\r
- #\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|FALSE\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x3f8\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|$(BAUD_RATE)\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|1\r
-\r
- #\r
- # Enable these parameters to be set on the command line\r
- #\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|$(SERIAL_CLOCK_RATE)\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|$(SERIAL_LINE_CONTROL)\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|$(SERIAL_HARDWARE_FLOW_CONTROL)\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable|$(SERIAL_DETECT_CABLE)\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|$(SERIAL_FIFO_CONTROL)\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|$(SERIAL_EXTENDED_TX_FIFO_SIZE)\r
-\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|TRUE\r
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|$(UART_DEFAULT_BAUD_RATE)\r
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits|$(UART_DEFAULT_DATA_BITS)\r
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity|$(UART_DEFAULT_PARITY)\r
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits|$(UART_DEFAULT_STOP_BITS)\r
- gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|$(DEFAULT_TERMINAL_TYPE)\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdPciSerialParameters|$(PCI_SERIAL_PARAMETERS)\r
-\r
- gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|$(MAX_LOGICAL_PROCESSORS)\r
-\r
- #\r
- # Set the proper Shell file GUID\r
- #\r
- # 7C04A583-9E3E-4f1c-AD65-E05268D0B4D1\r
- gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1c, 0x4f, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }\r
-\r
-################################################################################\r
-#\r
-# Pcd Dynamic Section - list of all EDK II PCD Entries defined by this Platform\r
-#\r
-################################################################################\r
-\r
-[PcdsDynamicDefault]\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0\r
- gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3\r
-\r
- ## This PCD defines the video horizontal resolution.\r
- # This PCD could be set to 0 then video resolution could be at highest resolution.\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0\r
- ## This PCD defines the video vertical resolution.\r
- # This PCD could be set to 0 then video resolution could be at highest resolution.\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0\r
-\r
- ## The PCD is used to specify the video horizontal resolution of text setup.\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|0\r
- ## The PCD is used to specify the video vertical resolution of text setup.\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|0\r
-\r
-################################################################################\r
-#\r
-# Components Section - list of all EDK II Modules needed by this Platform.\r
-#\r
-################################################################################\r
-[Components.IA32]\r
- #\r
- # SEC Core\r
- #\r
- CorebootModulePkg/SecCore/SecCore.inf\r
-\r
- #\r
- # PEI Core\r
- #\r
- MdeModulePkg/Core/Pei/PeiMain.inf\r
-\r
- #\r
- # PEIM\r
- #\r
- MdeModulePkg/Universal/PCD/Pei/Pcd.inf {\r
- <LibraryClasses>\r
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
- }\r
- MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
- MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf\r
-\r
- CorebootModulePkg/CbSupportPei/CbSupportPei.inf\r
- MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
-\r
-[Components.IA32]\r
- #\r
- # DXE Core\r
- #\r
- MdeModulePkg/Core/Dxe/DxeMain.inf {\r
- <LibraryClasses>\r
- NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf\r
- }\r
-\r
- #\r
- # Components that produce the architectural protocols\r
- #\r
- MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
- UefiCpuPkg/CpuDxe/CpuDxe.inf\r
- MdeModulePkg/Universal/BdsDxe/BdsDxe.inf\r
- MdeModulePkg/Application/UiApp/UiApp.inf {\r
- <LibraryClasses>\r
- NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf\r
- NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf\r
- NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf\r
- }\r
-!if $(USE_HPET_TIMER) == TRUE\r
- PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
-!else\r
- PcAtChipsetPkg/8254TimerDxe/8254Timer.inf\r
-!endif\r
- MdeModulePkg/Universal/Metronome/Metronome.inf\r
- MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
- MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
- MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
- MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
- MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf\r
- PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
- MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
-\r
- #\r
- # Following are the DXE drivers\r
- #\r
- MdeModulePkg/Universal/PCD/Dxe/Pcd.inf {\r
- <LibraryClasses>\r
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
- }\r
-\r
- MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
- MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
- UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
- MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
- MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
- PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r
- MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
- MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
- MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
-\r
- CorebootModulePkg/CbSupportDxe/CbSupportDxe.inf\r
-\r
- #\r
- # SMBIOS Support\r
- #\r
- MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
-\r
- #\r
- # ACPI Support\r
- #\r
- MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf\r
-\r
- #\r
- # PCI Support\r
- #\r
- MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
- MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {\r
- <LibraryClasses>\r
- PciHostBridgeLib|CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf\r
- }\r
-\r
- #\r
- # SCSI/ATA/IDE/DISK Support\r
- #\r
- MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
- MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
- MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
- FatPkg/EnhancedFatDxe/Fat.inf\r
- CorebootModulePkg/SataControllerDxe/SataControllerDxe.inf\r
- MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf\r
- MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf\r
- MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r
- MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r
-\r
- #\r
- # SD/eMMC Support\r
- #\r
- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf\r
- MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf\r
- MdeModulePkg/Bus/Sd/SdDxe/SdDxe.inf\r
-\r
- #\r
- # Usb Support\r
- #\r
- MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf\r
- MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
- MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf\r
- MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
- MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
- MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
-\r
- #\r
- # OHCI support\r
- #\r
- QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/OhciDxe.inf\r
-\r
- #\r
- # ISA Support\r
- #\r
- MdeModulePkg/Universal/SerialDxe/SerialDxe.inf\r
-\r
- #\r
- # Console Support\r
- #\r
- MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
- MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
- MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
- MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
-\r
- #\r
- # Framebuffer Gop\r
- #\r
- CorebootPayloadPkg/FbGop/FbGop.inf\r
-\r
- #------------------------------\r
- # Build the shell\r
- #------------------------------\r
-\r
- #\r
- # Shell Lib\r
- #\r
-[LibraryClasses]\r
- BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf\r
- DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf\r
- FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf\r
- ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf\r
- NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf\r
-\r
-[Components.IA32]\r
- ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf {\r
- <PcdsFixedAtBuild>\r
- ## This flag is used to control initialization of the shell library\r
- # This should be FALSE for compiling the dynamic command.\r
- gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE\r
- }\r
- ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf {\r
- <PcdsFixedAtBuild>\r
- ## This flag is used to control initialization of the shell library\r
- # This should be FALSE for compiling the dynamic command.\r
- gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE\r
- }\r
- ShellPkg/Application/Shell/Shell.inf {\r
- <PcdsFixedAtBuild>\r
- ## This flag is used to control initialization of the shell library\r
- # This should be FALSE for compiling the shell application itself only.\r
- gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE\r
-\r
- #------------------------------\r
- # Basic commands\r
- #------------------------------\r
-\r
- <LibraryClasses>\r
- NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf\r
- NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf\r
- NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf\r
- NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf\r
- NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf\r
- NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf\r
-\r
- #------------------------------\r
- # Networking commands\r
- #------------------------------\r
-\r
- <LibraryClasses>\r
- NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf\r
-\r
- #------------------------------\r
- # Support libraries\r
- #------------------------------\r
-\r
- <LibraryClasses>\r
- DebugLib|MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.inf\r
- DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf\r
- HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf\r
- PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf\r
- ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf\r
- ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf\r
- SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf\r
- }\r
+++ /dev/null
-## @file\r
-# Coreboot Payload Package\r
-#\r
-# Provides drivers and definitions to create uefi payload for coreboot.\r
-#\r
-# Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>\r
-# SPDX-License-Identifier: BSD-2-Clause-Patent\r
-#\r
-##\r
-\r
-################################################################################\r
-#\r
-# Defines Section - statements that will be processed to create a Makefile.\r
-#\r
-################################################################################\r
-[Defines]\r
- PLATFORM_NAME = CorebootPayloadPkg\r
- PLATFORM_GUID = F71608AB-D63D-4491-B744-A99998C8CD96\r
- PLATFORM_VERSION = 0.1\r
- DSC_SPECIFICATION = 0x00010005\r
- SUPPORTED_ARCHITECTURES = IA32|X64\r
- BUILD_TARGETS = DEBUG|RELEASE|NOOPT\r
- SKUID_IDENTIFIER = DEFAULT\r
- OUTPUT_DIRECTORY = Build/CorebootPayloadPkgX64\r
- FLASH_DEFINITION = CorebootPayloadPkg/CorebootPayloadPkg.fdf\r
-\r
- DEFINE SECURE_BOOT_ENABLE = FALSE\r
- DEFINE SOURCE_DEBUG_ENABLE = FALSE\r
-\r
- #\r
- # CPU options\r
- #\r
- DEFINE MAX_LOGICAL_PROCESSORS = 64\r
-\r
- #\r
- # PCI options\r
- #\r
- DEFINE PCIE_BASE = 0xE0000000\r
-\r
- #\r
- # Serial port set up\r
- #\r
- DEFINE BAUD_RATE = 115200\r
- DEFINE SERIAL_CLOCK_RATE = 1843200\r
- DEFINE SERIAL_LINE_CONTROL = 3 # 8-bits, no parity\r
- DEFINE SERIAL_HARDWARE_FLOW_CONTROL = FALSE\r
- DEFINE SERIAL_DETECT_CABLE = FALSE\r
- DEFINE SERIAL_FIFO_CONTROL = 7 # Enable FIFO\r
- DEFINE SERIAL_EXTENDED_TX_FIFO_SIZE = 16\r
- DEFINE UART_DEFAULT_BAUD_RATE = $(BAUD_RATE)\r
- DEFINE UART_DEFAULT_DATA_BITS = 8\r
- DEFINE UART_DEFAULT_PARITY = 1\r
- DEFINE UART_DEFAULT_STOP_BITS = 1\r
- DEFINE DEFAULT_TERMINAL_TYPE = 0\r
-\r
- #\r
- # typedef struct {\r
- # UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries.\r
- # UINT16 DeviceId; ///< Device ID to match the PCI device\r
- # UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz\r
- # UINT64 Offset; ///< The byte offset into to the BAR\r
- # UINT8 BarIndex; ///< Which BAR to get the UART base address\r
- # UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte.\r
- # UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.\r
- # UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.\r
- # UINT8 Reserved[2];\r
- # } PCI_SERIAL_PARAMETER;\r
- #\r
- # Vendor FFFF Device 0000 Prog Interface 1, BAR #0, Offset 0, Stride = 1, Clock 1843200 (0x1c2000)\r
- #\r
- # [Vendor] [Device] [----ClockRate---] [------------Offset-----------] [Bar] [Stride] [RxFifo] [TxFifo] [Rsvd] [Vendor]\r
- DEFINE PCI_SERIAL_PARAMETERS = {0xff,0xff, 0x00,0x00, 0x0,0x20,0x1c,0x00, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x00, 0x01, 0x0,0x0, 0x0,0x0, 0x0,0x0, 0xff,0xff}\r
-\r
- #\r
- # Chipset options\r
- #\r
- DEFINE USE_HPET_TIMER = FALSE\r
-\r
-[BuildOptions]\r
- *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES\r
- GCC:*_UNIXGCC_*_CC_FLAGS = -DMDEPKG_NDEBUG\r
- GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG\r
- INTEL:RELEASE_*_*_CC_FLAGS = /D MDEPKG_NDEBUG\r
- MSFT:RELEASE_*_*_CC_FLAGS = /D MDEPKG_NDEBUG\r
-\r
-[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]\r
- MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
-\r
-################################################################################\r
-#\r
-# SKU Identification section - list of all SKU IDs supported by this Platform.\r
-#\r
-################################################################################\r
-[SkuIds]\r
- 0|DEFAULT\r
-\r
-################################################################################\r
-#\r
-# Library Class section - list of all Library Classes needed by this Platform.\r
-#\r
-################################################################################\r
-[LibraryClasses]\r
- #\r
- # Entry point\r
- #\r
- PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf\r
- PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf\r
- DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf\r
- UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf\r
- UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf\r
-\r
- #\r
- # Basic\r
- #\r
- BaseLib|MdePkg/Library/BaseLib/BaseLib.inf\r
- BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf\r
- SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf\r
- PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf\r
- CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf\r
- IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf\r
-!if $(PCIE_BASE) == 0\r
- PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf\r
- PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf\r
-!else\r
- PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf\r
- PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf\r
-!endif\r
- PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf\r
- PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf\r
- PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf\r
- CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf\r
-\r
- #\r
- # UEFI & PI\r
- #\r
- UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf\r
- UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf\r
- UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf\r
- UefiLib|MdePkg/Library/UefiLib/UefiLib.inf\r
- UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf\r
- HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf\r
- DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf\r
- UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf\r
- PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf\r
- PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf\r
- DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf\r
- DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf\r
- UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf\r
- SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf\r
-\r
- #\r
- # Generic Modules\r
- #\r
- UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf\r
- UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf\r
- OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf\r
- CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf\r
- SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf\r
- UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf\r
- CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf\r
-\r
- #\r
- # CPU\r
- #\r
- MtrrLib|UefiCpuPkg/Library/MtrrLib/MtrrLib.inf\r
- LocalApicLib|UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf\r
-\r
- #\r
- # Platform\r
- #\r
- TimerLib|CorebootPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.inf\r
- ResetSystemLib|CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.inf\r
- SerialPortLib|CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf\r
- PlatformHookLib|CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf\r
- PlatformBootManagerLib|CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf\r
- IoApicLib|PcAtChipsetPkg/Library/BaseIoApicLib/BaseIoApicLib.inf\r
- CbPlatformSupportLib|CorebootModulePkg/Library/CbPlatformSupportLibNull/CbPlatformSupportLibNull.inf\r
-\r
- #\r
- # Misc\r
- #\r
- DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf\r
- PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf\r
-!if $(SOURCE_DEBUG_ENABLE) == TRUE\r
- PeCoffExtraActionLib|SourceLevelDebugPkg/Library/PeCoffExtraActionLibDebug/PeCoffExtraActionLibDebug.inf\r
- DebugCommunicationLib|SourceLevelDebugPkg/Library/DebugCommunicationLibSerialPort/DebugCommunicationLibSerialPort.inf\r
-!else\r
- PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf\r
- DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf\r
-!endif\r
- CbParseLib|CorebootModulePkg/Library/CbParseLib/CbParseLib.inf\r
- DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf\r
- LockBoxLib|MdeModulePkg/Library/LockBoxNullLib/LockBoxNullLib.inf\r
- FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf\r
- AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf\r
- TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf\r
- VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf\r
-\r
-[LibraryClasses.IA32.SEC]\r
- DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf\r
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
- HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf\r
- MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf\r
- DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf\r
- ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf\r
-\r
-[LibraryClasses.IA32.PEI_CORE, LibraryClasses.IA32.PEIM]\r
- PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf\r
- HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf\r
- MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf\r
- ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf\r
- ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf\r
-!if $(SOURCE_DEBUG_ENABLE)\r
- DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgentLib.inf\r
-!endif\r
-\r
-[LibraryClasses.common.DXE_CORE]\r
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
- HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf\r
- MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf\r
- ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf\r
- ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf\r
-!if $(SOURCE_DEBUG_ENABLE)\r
- DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf\r
-!endif\r
- CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf\r
-\r
-[LibraryClasses.common.DXE_DRIVER]\r
- PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf\r
- HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf\r
- MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf\r
- ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf\r
- ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf\r
-!if $(SOURCE_DEBUG_ENABLE)\r
- DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf\r
-!endif\r
- CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf\r
- MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf\r
-\r
-[LibraryClasses.common.DXE_RUNTIME_DRIVER]\r
- PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf\r
- HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf\r
- MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf\r
- ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf\r
-\r
-[LibraryClasses.common.UEFI_DRIVER,LibraryClasses.common.UEFI_APPLICATION]\r
- PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf\r
- MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf\r
- ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf\r
- HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf\r
-\r
-################################################################################\r
-#\r
-# Pcd Section - list of all EDK II PCD Entries defined by this Platform.\r
-#\r
-################################################################################\r
-[PcdsFeatureFlag]\r
-!if $(TARGET) == DEBUG\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE\r
-!else\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE\r
-!endif\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|TRUE\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE\r
-\r
-[PcdsFixedAtBuild]\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x10000\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x8000\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0x10000\r
- #\r
- # Make VariableRuntimeDxe work at emulated non-volatile variable mode.\r
- #\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE\r
-\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable|TRUE\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }\r
-\r
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|$(PCIE_BASE)\r
-\r
-!if $(SOURCE_DEBUG_ENABLE)\r
- gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2\r
-!endif\r
-\r
-[PcdsPatchableInModule.common]\r
- gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x7\r
- gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000004F\r
-!if $(SOURCE_DEBUG_ENABLE)\r
- gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x17\r
-!else\r
- gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F\r
-!endif\r
-\r
- #\r
- # The following parameters are set by Library/PlatformHookLib\r
- #\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|FALSE\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x3f8\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|$(BAUD_RATE)\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|1\r
-\r
- #\r
- # Enable these parameters to be set on the command line\r
- #\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|$(SERIAL_CLOCK_RATE)\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|$(SERIAL_LINE_CONTROL)\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|$(SERIAL_HARDWARE_FLOW_CONTROL)\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable|$(SERIAL_DETECT_CABLE)\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|$(SERIAL_FIFO_CONTROL)\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|$(SERIAL_EXTENDED_TX_FIFO_SIZE)\r
-\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|TRUE\r
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|$(UART_DEFAULT_BAUD_RATE)\r
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits|$(UART_DEFAULT_DATA_BITS)\r
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity|$(UART_DEFAULT_PARITY)\r
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits|$(UART_DEFAULT_STOP_BITS)\r
- gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|$(DEFAULT_TERMINAL_TYPE)\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdPciSerialParameters|$(PCI_SERIAL_PARAMETERS)\r
-\r
- gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|$(MAX_LOGICAL_PROCESSORS)\r
-\r
- #\r
- # Set the proper Shell file GUID\r
- #\r
- # 7C04A583-9E3E-4f1c-AD65-E05268D0B4D1\r
- gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1c, 0x4f, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }\r
-\r
-################################################################################\r
-#\r
-# Pcd Dynamic Section - list of all EDK II PCD Entries defined by this Platform\r
-#\r
-################################################################################\r
-\r
-[PcdsDynamicDefault]\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0\r
- gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3\r
-\r
- ## This PCD defines the video horizontal resolution.\r
- # This PCD could be set to 0 then video resolution could be at highest resolution.\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0\r
- ## This PCD defines the video vertical resolution.\r
- # This PCD could be set to 0 then video resolution could be at highest resolution.\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0\r
-\r
- ## The PCD is used to specify the video horizontal resolution of text setup.\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|0\r
- ## The PCD is used to specify the video vertical resolution of text setup.\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|0\r
-\r
-################################################################################\r
-#\r
-# Components Section - list of all EDK II Modules needed by this Platform.\r
-#\r
-################################################################################\r
-[Components.IA32]\r
- #\r
- # SEC Core\r
- #\r
- CorebootModulePkg/SecCore/SecCore.inf\r
-\r
- #\r
- # PEI Core\r
- #\r
- MdeModulePkg/Core/Pei/PeiMain.inf\r
-\r
- #\r
- # PEIM\r
- #\r
- MdeModulePkg/Universal/PCD/Pei/Pcd.inf {\r
- <LibraryClasses>\r
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
- }\r
- MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
- MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf\r
-\r
- CorebootModulePkg/CbSupportPei/CbSupportPei.inf\r
- MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
-\r
-[Components.X64]\r
- #\r
- # DXE Core\r
- #\r
- MdeModulePkg/Core/Dxe/DxeMain.inf {\r
- <LibraryClasses>\r
- NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf\r
- }\r
-\r
- #\r
- # Components that produce the architectural protocols\r
- #\r
- MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
- UefiCpuPkg/CpuDxe/CpuDxe.inf\r
- MdeModulePkg/Universal/BdsDxe/BdsDxe.inf\r
- MdeModulePkg/Application/UiApp/UiApp.inf {\r
- <LibraryClasses>\r
- NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf\r
- NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf\r
- NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf\r
- }\r
-!if $(USE_HPET_TIMER) == TRUE\r
- PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
-!else\r
- PcAtChipsetPkg/8254TimerDxe/8254Timer.inf\r
-!endif\r
- MdeModulePkg/Universal/Metronome/Metronome.inf\r
- MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
- MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
- MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
- MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
- MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf\r
- PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
- MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
-\r
- #\r
- # Following are the DXE drivers\r
- #\r
- MdeModulePkg/Universal/PCD/Dxe/Pcd.inf {\r
- <LibraryClasses>\r
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
- }\r
-\r
- MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
- MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
- UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
- MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
- MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
- PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r
- MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
- MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
- MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
-\r
- CorebootModulePkg/CbSupportDxe/CbSupportDxe.inf\r
-\r
- #\r
- # SMBIOS Support\r
- #\r
- MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
-\r
- #\r
- # ACPI Support\r
- #\r
- MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf\r
-\r
- #\r
- # PCI Support\r
- #\r
- MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
- MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {\r
- <LibraryClasses>\r
- PciHostBridgeLib|CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf\r
- }\r
-\r
- #\r
- # SCSI/ATA/IDE/DISK Support\r
- #\r
- MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
- MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
- MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
- FatPkg/EnhancedFatDxe/Fat.inf\r
- CorebootModulePkg/SataControllerDxe/SataControllerDxe.inf\r
- MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf\r
- MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf\r
- MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r
- MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r
-\r
- #\r
- # SD/eMMC Support\r
- #\r
- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf\r
- MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf\r
- MdeModulePkg/Bus/Sd/SdDxe/SdDxe.inf\r
-\r
- #\r
- # Usb Support\r
- #\r
- MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf\r
- MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
- MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf\r
- MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
- MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
- MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
-\r
- #\r
- # OHCI support\r
- #\r
- QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/OhciDxe.inf\r
-\r
- #\r
- # ISA Support\r
- #\r
- MdeModulePkg/Universal/SerialDxe/SerialDxe.inf\r
-\r
- #\r
- # Console Support\r
- #\r
- MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
- MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
- MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
- MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
-\r
- #\r
- # Framebuffer Gop\r
- #\r
- CorebootPayloadPkg/FbGop/FbGop.inf\r
-\r
- #------------------------------\r
- # Build the shell\r
- #------------------------------\r
-\r
- #\r
- # Shell Lib\r
- #\r
-[LibraryClasses]\r
- BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf\r
- DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf\r
- FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf\r
- ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf\r
- NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf\r
-\r
-[Components.X64]\r
- ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf {\r
- <PcdsFixedAtBuild>\r
- ## This flag is used to control initialization of the shell library\r
- # This should be FALSE for compiling the dynamic command.\r
- gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE\r
- }\r
- ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf {\r
- <PcdsFixedAtBuild>\r
- ## This flag is used to control initialization of the shell library\r
- # This should be FALSE for compiling the dynamic command.\r
- gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE\r
- }\r
- ShellPkg/Application/Shell/Shell.inf {\r
- <PcdsFixedAtBuild>\r
- ## This flag is used to control initialization of the shell library\r
- # This should be FALSE for compiling the shell application itself only.\r
- gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE\r
-\r
- #------------------------------\r
- # Basic commands\r
- #------------------------------\r
-\r
- <LibraryClasses>\r
- NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf\r
- NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf\r
- NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf\r
- NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf\r
- NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf\r
- NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf\r
-\r
- #------------------------------\r
- # Networking commands\r
- #------------------------------\r
-\r
- <LibraryClasses>\r
- NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf\r
-\r
- #------------------------------\r
- # Support libraries\r
- #------------------------------\r
-\r
- <LibraryClasses>\r
- DebugLib|MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.inf\r
- DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf\r
- HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf\r
- PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf\r
- ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf\r
- ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf\r
- SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf\r
- }\r
+++ /dev/null
-/** @file\r
-\r
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
-\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#include "FbGop.h"\r
-\r
-//\r
-// EFI Component Name Functions\r
-//\r
-/**\r
- Retrieves a Unicode string that is the user readable name of the driver.\r
-\r
- This function retrieves the user readable name of a driver in the form of a\r
- Unicode string. If the driver specified by This has a user readable name in\r
- the language specified by Language, then a pointer to the driver name is\r
- returned in DriverName, and EFI_SUCCESS is returned. If the driver specified\r
- by This does not support the language specified by Language,\r
- then EFI_UNSUPPORTED is returned.\r
-\r
- @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or\r
- EFI_COMPONENT_NAME_PROTOCOL instance.\r
-\r
- @param Language[in] A pointer to a Null-terminated ASCII string\r
- array indicating the language. This is the\r
- language of the driver name that the caller is\r
- requesting, and it must match one of the\r
- languages specified in SupportedLanguages. The\r
- number of languages supported by a driver is up\r
- to the driver writer. Language is specified\r
- in RFC 4646 or ISO 639-2 language code format.\r
-\r
- @param DriverName[out] A pointer to the Unicode string to return.\r
- This Unicode string is the name of the\r
- driver specified by This in the language\r
- specified by Language.\r
-\r
- @retval EFI_SUCCESS The Unicode string for the Driver specified by\r
- This and the language specified by Language was\r
- returned in DriverName.\r
-\r
- @retval EFI_INVALID_PARAMETER Language is NULL.\r
-\r
- @retval EFI_INVALID_PARAMETER DriverName is NULL.\r
-\r
- @retval EFI_UNSUPPORTED The driver specified by This does not support\r
- the language specified by Language.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopComponentNameGetDriverName (\r
- IN EFI_COMPONENT_NAME_PROTOCOL *This,\r
- IN CHAR8 *Language,\r
- OUT CHAR16 **DriverName\r
- );\r
-\r
-\r
-/**\r
- Retrieves a Unicode string that is the user readable name of the controller\r
- that is being managed by a driver.\r
-\r
- This function retrieves the user readable name of the controller specified by\r
- ControllerHandle and ChildHandle in the form of a Unicode string. If the\r
- driver specified by This has a user readable name in the language specified by\r
- Language, then a pointer to the controller name is returned in ControllerName,\r
- and EFI_SUCCESS is returned. If the driver specified by This is not currently\r
- managing the controller specified by ControllerHandle and ChildHandle,\r
- then EFI_UNSUPPORTED is returned. If the driver specified by This does not\r
- support the language specified by Language, then EFI_UNSUPPORTED is returned.\r
-\r
- @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or\r
- EFI_COMPONENT_NAME_PROTOCOL instance.\r
-\r
- @param ControllerHandle[in] The handle of a controller that the driver\r
- specified by This is managing. This handle\r
- specifies the controller whose name is to be\r
- returned.\r
-\r
- @param ChildHandle[in] The handle of the child controller to retrieve\r
- the name of. This is an optional parameter that\r
- may be NULL. It will be NULL for device\r
- drivers. It will also be NULL for a bus drivers\r
- that wish to retrieve the name of the bus\r
- controller. It will not be NULL for a bus\r
- driver that wishes to retrieve the name of a\r
- child controller.\r
-\r
- @param Language[in] A pointer to a Null-terminated ASCII string\r
- array indicating the language. This is the\r
- language of the driver name that the caller is\r
- requesting, and it must match one of the\r
- languages specified in SupportedLanguages. The\r
- number of languages supported by a driver is up\r
- to the driver writer. Language is specified in\r
- RFC 4646 or ISO 639-2 language code format.\r
-\r
- @param ControllerName[out] A pointer to the Unicode string to return.\r
- This Unicode string is the name of the\r
- controller specified by ControllerHandle and\r
- ChildHandle in the language specified by\r
- Language from the point of view of the driver\r
- specified by This.\r
-\r
- @retval EFI_SUCCESS The Unicode string for the user readable name in\r
- the language specified by Language for the\r
- driver specified by This was returned in\r
- DriverName.\r
-\r
- @retval EFI_INVALID_PARAMETER ControllerHandle is NULL.\r
-\r
- @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid\r
- EFI_HANDLE.\r
-\r
- @retval EFI_INVALID_PARAMETER Language is NULL.\r
-\r
- @retval EFI_INVALID_PARAMETER ControllerName is NULL.\r
-\r
- @retval EFI_UNSUPPORTED The driver specified by This is not currently\r
- managing the controller specified by\r
- ControllerHandle and ChildHandle.\r
-\r
- @retval EFI_UNSUPPORTED The driver specified by This does not support\r
- the language specified by Language.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopComponentNameGetControllerName (\r
- IN EFI_COMPONENT_NAME_PROTOCOL *This,\r
- IN EFI_HANDLE ControllerHandle,\r
- IN EFI_HANDLE ChildHandle OPTIONAL,\r
- IN CHAR8 *Language,\r
- OUT CHAR16 **ControllerName\r
- );\r
-\r
-\r
-//\r
-// EFI Component Name Protocol\r
-//\r
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gFbGopComponentName = {\r
- FbGopComponentNameGetDriverName,\r
- FbGopComponentNameGetControllerName,\r
- "eng"\r
-};\r
-\r
-//\r
-// EFI Component Name 2 Protocol\r
-//\r
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gFbGopComponentName2 = {\r
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) FbGopComponentNameGetDriverName,\r
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) FbGopComponentNameGetControllerName,\r
- "en"\r
-};\r
-\r
-\r
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mFbGopDriverNameTable[] = {\r
- {\r
- "eng;en",\r
- L"FB GOP Video Driver"\r
- },\r
- {\r
- NULL,\r
- NULL\r
- }\r
-};\r
-\r
-/**\r
- Retrieves a Unicode string that is the user readable name of the driver.\r
-\r
- This function retrieves the user readable name of a driver in the form of a\r
- Unicode string. If the driver specified by This has a user readable name in\r
- the language specified by Language, then a pointer to the driver name is\r
- returned in DriverName, and EFI_SUCCESS is returned. If the driver specified\r
- by This does not support the language specified by Language,\r
- then EFI_UNSUPPORTED is returned.\r
-\r
- @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or\r
- EFI_COMPONENT_NAME_PROTOCOL instance.\r
-\r
- @param Language[in] A pointer to a Null-terminated ASCII string\r
- array indicating the language. This is the\r
- language of the driver name that the caller is\r
- requesting, and it must match one of the\r
- languages specified in SupportedLanguages. The\r
- number of languages supported by a driver is up\r
- to the driver writer. Language is specified\r
- in RFC 4646 or ISO 639-2 language code format.\r
-\r
- @param DriverName[out] A pointer to the Unicode string to return.\r
- This Unicode string is the name of the\r
- driver specified by This in the language\r
- specified by Language.\r
-\r
- @retval EFI_SUCCESS The Unicode string for the Driver specified by\r
- This and the language specified by Language was\r
- returned in DriverName.\r
-\r
- @retval EFI_INVALID_PARAMETER Language is NULL.\r
-\r
- @retval EFI_INVALID_PARAMETER DriverName is NULL.\r
-\r
- @retval EFI_UNSUPPORTED The driver specified by This does not support\r
- the language specified by Language.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopComponentNameGetDriverName (\r
- IN EFI_COMPONENT_NAME_PROTOCOL *This,\r
- IN CHAR8 *Language,\r
- OUT CHAR16 **DriverName\r
- )\r
-{\r
- return LookupUnicodeString2 (\r
- Language,\r
- This->SupportedLanguages,\r
- mFbGopDriverNameTable,\r
- DriverName,\r
- (BOOLEAN)(This == &gFbGopComponentName)\r
- );\r
-}\r
-\r
-/**\r
- Retrieves a Unicode string that is the user readable name of the controller\r
- that is being managed by a driver.\r
-\r
- This function retrieves the user readable name of the controller specified by\r
- ControllerHandle and ChildHandle in the form of a Unicode string. If the\r
- driver specified by This has a user readable name in the language specified by\r
- Language, then a pointer to the controller name is returned in ControllerName,\r
- and EFI_SUCCESS is returned. If the driver specified by This is not currently\r
- managing the controller specified by ControllerHandle and ChildHandle,\r
- then EFI_UNSUPPORTED is returned. If the driver specified by This does not\r
- support the language specified by Language, then EFI_UNSUPPORTED is returned.\r
-\r
- @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or\r
- EFI_COMPONENT_NAME_PROTOCOL instance.\r
-\r
- @param ControllerHandle[in] The handle of a controller that the driver\r
- specified by This is managing. This handle\r
- specifies the controller whose name is to be\r
- returned.\r
-\r
- @param ChildHandle[in] The handle of the child controller to retrieve\r
- the name of. This is an optional parameter that\r
- may be NULL. It will be NULL for device\r
- drivers. It will also be NULL for a bus drivers\r
- that wish to retrieve the name of the bus\r
- controller. It will not be NULL for a bus\r
- driver that wishes to retrieve the name of a\r
- child controller.\r
-\r
- @param Language[in] A pointer to a Null-terminated ASCII string\r
- array indicating the language. This is the\r
- language of the driver name that the caller is\r
- requesting, and it must match one of the\r
- languages specified in SupportedLanguages. The\r
- number of languages supported by a driver is up\r
- to the driver writer. Language is specified in\r
- RFC 4646 or ISO 639-2 language code format.\r
-\r
- @param ControllerName[out] A pointer to the Unicode string to return.\r
- This Unicode string is the name of the\r
- controller specified by ControllerHandle and\r
- ChildHandle in the language specified by\r
- Language from the point of view of the driver\r
- specified by This.\r
-\r
- @retval EFI_SUCCESS The Unicode string for the user readable name in\r
- the language specified by Language for the\r
- driver specified by This was returned in\r
- DriverName.\r
-\r
- @retval EFI_INVALID_PARAMETER ControllerHandle is NULL.\r
-\r
- @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid\r
- EFI_HANDLE.\r
-\r
- @retval EFI_INVALID_PARAMETER Language is NULL.\r
-\r
- @retval EFI_INVALID_PARAMETER ControllerName is NULL.\r
-\r
- @retval EFI_UNSUPPORTED The driver specified by This is not currently\r
- managing the controller specified by\r
- ControllerHandle and ChildHandle.\r
-\r
- @retval EFI_UNSUPPORTED The driver specified by This does not support\r
- the language specified by Language.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopComponentNameGetControllerName (\r
- IN EFI_COMPONENT_NAME_PROTOCOL *This,\r
- IN EFI_HANDLE ControllerHandle,\r
- IN EFI_HANDLE ChildHandle OPTIONAL,\r
- IN CHAR8 *Language,\r
- OUT CHAR16 **ControllerName\r
- )\r
-{\r
- return EFI_UNSUPPORTED;\r
-}\r
+++ /dev/null
-/** @file\r
- ConsoleOut Routines that speak VGA.\r
-\r
-Copyright (c) 2007 - 2013, Intel Corporation. All rights reserved.<BR>\r
-\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#include "FbGop.h"\r
-\r
-EFI_PIXEL_BITMASK mPixelBitMask = {0x0000FF, 0x00FF00, 0xFF0000, 0x000000};\r
-\r
-//\r
-// Save controller attributes during first start\r
-//\r
-UINT64 mOriginalPciAttributes;\r
-BOOLEAN mPciAttributesSaved = FALSE;\r
-FRAME_BUFFER_INFO *mFrameBufferInfo;\r
-\r
-//\r
-// EFI Driver Binding Protocol Instance\r
-//\r
-EFI_DRIVER_BINDING_PROTOCOL gFbGopDriverBinding = {\r
- FbGopDriverBindingSupported,\r
- FbGopDriverBindingStart,\r
- FbGopDriverBindingStop,\r
- 0x3,\r
- NULL,\r
- NULL\r
-};\r
-\r
-//\r
-// Native resolution in EDID DetailedTiming[0]\r
-//\r
-UINT32 mNativeModeHorizontal;\r
-UINT32 mNativeModeVertical;\r
-\r
-/**\r
- Supported.\r
-\r
- @param This Pointer to driver binding protocol\r
- @param Controller Controller handle to connect\r
- @param RemainingDevicePath A pointer to the remaining portion of a device\r
- path\r
-\r
- @retval EFI_STATUS EFI_SUCCESS:This controller can be managed by this\r
- driver, Otherwise, this controller cannot be\r
- managed by this driver\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopDriverBindingSupported (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
- )\r
-{\r
- EFI_STATUS Status;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- PCI_TYPE00 Pci;\r
- EFI_DEV_PATH *Node;\r
- UINT8 Index;\r
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Resources;\r
-\r
- //\r
- // Open the IO Abstraction(s) needed to perform the supported test\r
- //\r
- Status = gBS->OpenProtocol (\r
- Controller,\r
- &gEfiPciIoProtocolGuid,\r
- (VOID **) &PciIo,\r
- This->DriverBindingHandle,\r
- Controller,\r
- EFI_OPEN_PROTOCOL_BY_DRIVER\r
- );\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- //\r
- // See if this is a PCI Graphics Controller by looking at the Command register and\r
- // Class Code Register\r
- //\r
- Status = PciIo->Pci.Read (\r
- PciIo,\r
- EfiPciIoWidthUint32,\r
- 0,\r
- sizeof (Pci) / sizeof (UINT32),\r
- &Pci\r
- );\r
- if (EFI_ERROR (Status)) {\r
- Status = EFI_UNSUPPORTED;\r
- goto Done;\r
- }\r
-\r
- Status = EFI_UNSUPPORTED;\r
- if (IS_PCI_DISPLAY (&Pci) || IS_PCI_OLD_VGA (&Pci)) {\r
- //\r
- // Check if PCI BAR matches the framebuffer base\r
- //\r
- Status = EFI_UNSUPPORTED;\r
- for (Index = 0; Index < PCI_MAX_BAR; Index++) {\r
- Status = PciIo->GetBarAttributes (PciIo, Index, NULL, (VOID**) &Resources);\r
- if (!EFI_ERROR (Status)) {\r
- if ((Resources->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) &&\r
- (Resources->Len == (UINT16) (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3)) &&\r
- (Resources->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) &&\r
- (Resources->AddrRangeMin == mFrameBufferInfo->LinearFrameBuffer)) {\r
- DEBUG ((DEBUG_INFO, "Found matched framebuffer PCI BAR !\n"));\r
- Status = EFI_SUCCESS;\r
- break;\r
- }\r
- }\r
- }\r
-\r
- if (!EFI_ERROR (Status)) {\r
- //\r
- // If this is a graphics controller,\r
- // go further check RemainingDevicePath\r
- //\r
- if (RemainingDevicePath != NULL) {\r
- Node = (EFI_DEV_PATH *) RemainingDevicePath;\r
- //\r
- // Check if RemainingDevicePath is the End of Device Path Node,\r
- // if yes, return EFI_SUCCESS\r
- //\r
- if (!IsDevicePathEnd (Node)) {\r
- //\r
- // Verify RemainingDevicePath\r
- //\r
- if (Node->DevPath.Type != ACPI_DEVICE_PATH ||\r
- Node->DevPath.SubType != ACPI_ADR_DP ||\r
- DevicePathNodeLength(&Node->DevPath) < sizeof(ACPI_ADR_DEVICE_PATH)) {\r
- Status = EFI_UNSUPPORTED;\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
-Done:\r
- gBS->CloseProtocol (\r
- Controller,\r
- &gEfiPciIoProtocolGuid,\r
- This->DriverBindingHandle,\r
- Controller\r
- );\r
-\r
- return Status;\r
-}\r
-\r
-\r
-/**\r
- Install Graphics Output Protocol onto VGA device handles.\r
-\r
- @param This Pointer to driver binding protocol\r
- @param Controller Controller handle to connect\r
- @param RemainingDevicePath A pointer to the remaining portion of a device\r
- path\r
-\r
- @return EFI_STATUS\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopDriverBindingStart (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
- )\r
-{\r
- EFI_STATUS Status;\r
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- UINT64 Supports;\r
-\r
- DEBUG ((DEBUG_INFO, "GOP START\n"));\r
-\r
- //\r
- // Initialize local variables\r
- //\r
- PciIo = NULL;\r
- ParentDevicePath = NULL;\r
-\r
- //\r
- // Prepare for status code\r
- //\r
- Status = gBS->HandleProtocol (\r
- Controller,\r
- &gEfiDevicePathProtocolGuid,\r
- (VOID **) &ParentDevicePath\r
- );\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- //\r
- // Open the IO Abstraction(s) needed\r
- //\r
- Status = gBS->OpenProtocol (\r
- Controller,\r
- &gEfiPciIoProtocolGuid,\r
- (VOID **) &PciIo,\r
- This->DriverBindingHandle,\r
- Controller,\r
- EFI_OPEN_PROTOCOL_BY_DRIVER\r
- );\r
- if (EFI_ERROR (Status) && (Status != EFI_ALREADY_STARTED)) {\r
- return Status;\r
- }\r
-\r
- //\r
- // Save original PCI attributes\r
- //\r
- if (!mPciAttributesSaved) {\r
- Status = PciIo->Attributes (\r
- PciIo,\r
- EfiPciIoAttributeOperationGet,\r
- 0,\r
- &mOriginalPciAttributes\r
- );\r
-\r
- if (EFI_ERROR (Status)) {\r
- goto Done;\r
- }\r
- mPciAttributesSaved = TRUE;\r
- }\r
-\r
- //\r
- // Get supported PCI attributes\r
- //\r
- Status = PciIo->Attributes (\r
- PciIo,\r
- EfiPciIoAttributeOperationSupported,\r
- 0,\r
- &Supports\r
- );\r
- if (EFI_ERROR (Status)) {\r
- goto Done;\r
- }\r
-\r
- Supports &= (EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_VGA_IO_16);\r
- if (Supports == 0 || Supports == (EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) {\r
- Status = EFI_UNSUPPORTED;\r
- goto Done;\r
- }\r
-\r
- REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
- EFI_PROGRESS_CODE,\r
- EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_PC_ENABLE,\r
- ParentDevicePath\r
- );\r
- //\r
- // Enable the device and make sure VGA cycles are being forwarded to this VGA device\r
- //\r
- Status = PciIo->Attributes (\r
- PciIo,\r
- EfiPciIoAttributeOperationEnable,\r
- EFI_PCI_DEVICE_ENABLE,\r
- NULL\r
- );\r
- if (EFI_ERROR (Status)) {\r
- REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
- EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
- EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_RESOURCE_CONFLICT,\r
- ParentDevicePath\r
- );\r
- goto Done;\r
- }\r
-\r
- if (RemainingDevicePath != NULL) {\r
- if (IsDevicePathEnd (RemainingDevicePath)) {\r
- //\r
- // If RemainingDevicePath is the End of Device Path Node,\r
- // don't create any child device and return EFI_SUCCESS\r
- Status = EFI_SUCCESS;\r
- goto Done;\r
- }\r
- }\r
-\r
- //\r
- // Create child handle and install GraphicsOutputProtocol on it\r
- //\r
- Status = FbGopChildHandleInstall (\r
- This,\r
- Controller,\r
- PciIo,\r
- NULL,\r
- ParentDevicePath,\r
- RemainingDevicePath\r
- );\r
-\r
-Done:\r
- if ((EFI_ERROR (Status)) && (Status != EFI_ALREADY_STARTED)) {\r
-\r
- REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
- EFI_PROGRESS_CODE,\r
- EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_PC_DISABLE,\r
- ParentDevicePath\r
- );\r
-\r
- REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
- EFI_PROGRESS_CODE,\r
- EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_NOT_DETECTED,\r
- ParentDevicePath\r
- );\r
- if (!HasChildHandle (Controller)) {\r
- if (mPciAttributesSaved) {\r
- //\r
- // Restore original PCI attributes\r
- //\r
- PciIo->Attributes (\r
- PciIo,\r
- EfiPciIoAttributeOperationSet,\r
- mOriginalPciAttributes,\r
- NULL\r
- );\r
- }\r
- }\r
- //\r
- // Release PCI I/O Protocols on the controller handle.\r
- //\r
- gBS->CloseProtocol (\r
- Controller,\r
- &gEfiPciIoProtocolGuid,\r
- This->DriverBindingHandle,\r
- Controller\r
- );\r
- }\r
-\r
- return Status;\r
-}\r
-\r
-\r
-/**\r
- Stop.\r
-\r
- @param This Pointer to driver binding protocol\r
- @param Controller Controller handle to connect\r
- @param NumberOfChildren Number of children handle created by this driver\r
- @param ChildHandleBuffer Buffer containing child handle created\r
-\r
- @retval EFI_SUCCESS Driver disconnected successfully from controller\r
- @retval EFI_UNSUPPORTED Cannot find FB_VIDEO_DEV structure\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopDriverBindingStop (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN UINTN NumberOfChildren,\r
- IN EFI_HANDLE *ChildHandleBuffer\r
- )\r
-{\r
- EFI_STATUS Status;\r
- BOOLEAN AllChildrenStopped;\r
- UINTN Index;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
-\r
- AllChildrenStopped = TRUE;\r
-\r
- if (NumberOfChildren == 0) {\r
- //\r
- // Close PCI I/O protocol on the controller handle\r
- //\r
- gBS->CloseProtocol (\r
- Controller,\r
- &gEfiPciIoProtocolGuid,\r
- This->DriverBindingHandle,\r
- Controller\r
- );\r
-\r
- return EFI_SUCCESS;\r
- }\r
-\r
- for (Index = 0; Index < NumberOfChildren; Index++) {\r
-\r
- Status = EFI_SUCCESS;\r
-\r
- FbGopChildHandleUninstall (This, Controller, ChildHandleBuffer[Index]);\r
-\r
- if (EFI_ERROR (Status)) {\r
- AllChildrenStopped = FALSE;\r
- }\r
- }\r
-\r
- if (!AllChildrenStopped) {\r
- return EFI_DEVICE_ERROR;\r
- }\r
-\r
- if (!HasChildHandle (Controller)) {\r
- if (mPciAttributesSaved) {\r
- Status = gBS->HandleProtocol (\r
- Controller,\r
- &gEfiPciIoProtocolGuid,\r
- (VOID **) &PciIo\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- //\r
- // Restore original PCI attributes\r
- //\r
- Status = PciIo->Attributes (\r
- PciIo,\r
- EfiPciIoAttributeOperationSet,\r
- mOriginalPciAttributes,\r
- NULL\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
- }\r
-\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-/**\r
- Install child handles if the Handle supports MBR format.\r
-\r
- @param This Calling context.\r
- @param ParentHandle Parent Handle\r
- @param ParentPciIo Parent PciIo interface\r
- @param ParentLegacyBios Parent LegacyBios interface\r
- @param ParentDevicePath Parent Device Path\r
- @param RemainingDevicePath Remaining Device Path\r
-\r
- @retval EFI_SUCCESS If a child handle was added\r
- @retval other A child handle was not added\r
-\r
-**/\r
-EFI_STATUS\r
-FbGopChildHandleInstall (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE ParentHandle,\r
- IN EFI_PCI_IO_PROTOCOL *ParentPciIo,\r
- IN VOID *ParentLegacyBios,\r
- IN EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
- )\r
-{\r
- EFI_STATUS Status;\r
- FB_VIDEO_DEV *FbGopPrivate;\r
- PCI_TYPE00 Pci;\r
- ACPI_ADR_DEVICE_PATH AcpiDeviceNode;\r
-\r
- //\r
- // Allocate the private device structure for video device\r
- //\r
- FbGopPrivate = (FB_VIDEO_DEV *) AllocateZeroPool (\r
- sizeof (FB_VIDEO_DEV)\r
- );\r
- if (NULL == FbGopPrivate) {\r
- Status = EFI_OUT_OF_RESOURCES;\r
- goto Done;\r
- }\r
-\r
- //\r
- // See if this is a VGA compatible controller or not\r
- //\r
- Status = ParentPciIo->Pci.Read (\r
- ParentPciIo,\r
- EfiPciIoWidthUint32,\r
- 0,\r
- sizeof (Pci) / sizeof (UINT32),\r
- &Pci\r
- );\r
- if (EFI_ERROR (Status)) {\r
- REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
- EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
- EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_CONTROLLER_ERROR,\r
- ParentDevicePath\r
- );\r
- goto Done;\r
- }\r
-\r
- //\r
- // Initialize the child private structure\r
- //\r
- FbGopPrivate->Signature = FB_VIDEO_DEV_SIGNATURE;\r
-\r
- //\r
- // Fill in Graphics Output specific mode structures\r
- //\r
- FbGopPrivate->ModeData = NULL;\r
-\r
- FbGopPrivate->VbeFrameBuffer = NULL;\r
-\r
- FbGopPrivate->EdidDiscovered.SizeOfEdid = 0;\r
- FbGopPrivate->EdidDiscovered.Edid = NULL;\r
- FbGopPrivate->EdidActive.SizeOfEdid = 0;\r
- FbGopPrivate->EdidActive.Edid = NULL;\r
-\r
- //\r
- // Fill in the Graphics Output Protocol\r
- //\r
- FbGopPrivate->GraphicsOutput.QueryMode = FbGopGraphicsOutputQueryMode;\r
- FbGopPrivate->GraphicsOutput.SetMode = FbGopGraphicsOutputSetMode;\r
-\r
-\r
- //\r
- // Allocate buffer for Graphics Output Protocol mode information\r
- //\r
- FbGopPrivate->GraphicsOutput.Mode = (EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE *) AllocatePool (\r
- sizeof (EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE)\r
- );\r
- if (NULL == FbGopPrivate->GraphicsOutput.Mode) {\r
- Status = EFI_OUT_OF_RESOURCES;\r
- goto Done;\r
- }\r
-\r
- FbGopPrivate->GraphicsOutput.Mode->Info = (EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *) AllocatePool (\r
- sizeof (EFI_GRAPHICS_OUTPUT_MODE_INFORMATION)\r
- );\r
- if (NULL == FbGopPrivate->GraphicsOutput.Mode->Info) {\r
- Status = EFI_OUT_OF_RESOURCES;\r
- goto Done;\r
- }\r
-\r
- //\r
- // Set Gop Device Path, here RemainingDevicePath will not be one End of Device Path Node.\r
- //\r
- if ((RemainingDevicePath == NULL) || (!IsDevicePathEnd (RemainingDevicePath))) {\r
- if (RemainingDevicePath == NULL) {\r
- ZeroMem (&AcpiDeviceNode, sizeof (ACPI_ADR_DEVICE_PATH));\r
- AcpiDeviceNode.Header.Type = ACPI_DEVICE_PATH;\r
- AcpiDeviceNode.Header.SubType = ACPI_ADR_DP;\r
- AcpiDeviceNode.ADR = ACPI_DISPLAY_ADR (1, 0, 0, 1, 0, ACPI_ADR_DISPLAY_TYPE_VGA, 0, 0);\r
- SetDevicePathNodeLength (&AcpiDeviceNode.Header, sizeof (ACPI_ADR_DEVICE_PATH));\r
-\r
- FbGopPrivate->GopDevicePath = AppendDevicePathNode (\r
- ParentDevicePath,\r
- (EFI_DEVICE_PATH_PROTOCOL *) &AcpiDeviceNode\r
- );\r
- } else {\r
- FbGopPrivate->GopDevicePath = AppendDevicePathNode (ParentDevicePath, RemainingDevicePath);\r
- }\r
-\r
- //\r
- // Creat child handle and device path protocol firstly\r
- //\r
- FbGopPrivate->Handle = NULL;\r
- Status = gBS->InstallMultipleProtocolInterfaces (\r
- &FbGopPrivate->Handle,\r
- &gEfiDevicePathProtocolGuid,\r
- FbGopPrivate->GopDevicePath,\r
- NULL\r
- );\r
- if (EFI_ERROR (Status)) {\r
- goto Done;\r
- }\r
- }\r
-\r
- //\r
- // When check for VBE, PCI I/O protocol is needed, so use parent's protocol interface temporally\r
- //\r
- FbGopPrivate->PciIo = ParentPciIo;\r
-\r
- //\r
- // Check for VESA BIOS Extensions for modes that are compatible with Graphics Output\r
- //\r
- Status = FbGopCheckForVbe (FbGopPrivate);\r
- DEBUG ((DEBUG_INFO, "FbGopCheckForVbe - %r\n", Status));\r
-\r
- if (EFI_ERROR (Status)) {\r
- Status = EFI_UNSUPPORTED;\r
- //goto Done;\r
- }\r
-\r
- //\r
- // Creat child handle and install Graphics Output Protocol,EDID Discovered/Active Protocol\r
- //\r
- Status = gBS->InstallMultipleProtocolInterfaces (\r
- &FbGopPrivate->Handle,\r
- &gEfiGraphicsOutputProtocolGuid,\r
- &FbGopPrivate->GraphicsOutput,\r
- &gEfiEdidDiscoveredProtocolGuid,\r
- &FbGopPrivate->EdidDiscovered,\r
- &gEfiEdidActiveProtocolGuid,\r
- &FbGopPrivate->EdidActive,\r
- NULL\r
- );\r
-\r
- if (!EFI_ERROR (Status)) {\r
- //\r
- // Open the Parent Handle for the child\r
- //\r
- Status = gBS->OpenProtocol (\r
- ParentHandle,\r
- &gEfiPciIoProtocolGuid,\r
- (VOID **) &FbGopPrivate->PciIo,\r
- This->DriverBindingHandle,\r
- FbGopPrivate->Handle,\r
- EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER\r
- );\r
- if (EFI_ERROR (Status)) {\r
- goto Done;\r
- }\r
- }\r
-\r
-Done:\r
- if (EFI_ERROR (Status)) {\r
- //\r
- // Free private data structure\r
- //\r
- FbGopDeviceReleaseResource (FbGopPrivate);\r
- }\r
-\r
- return Status;\r
-}\r
-\r
-\r
-/**\r
- Deregister an video child handle and free resources.\r
-\r
- @param This Protocol instance pointer.\r
- @param Controller Video controller handle\r
- @param Handle Video child handle\r
-\r
- @return EFI_STATUS\r
-\r
-**/\r
-EFI_STATUS\r
-FbGopChildHandleUninstall (\r
- EFI_DRIVER_BINDING_PROTOCOL *This,\r
- EFI_HANDLE Controller,\r
- EFI_HANDLE Handle\r
- )\r
-{\r
- EFI_STATUS Status;\r
- EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput;\r
- FB_VIDEO_DEV *FbGopPrivate;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
-\r
- FbGopPrivate = NULL;\r
- GraphicsOutput = NULL;\r
- PciIo = NULL;\r
- Status = EFI_UNSUPPORTED;\r
-\r
- Status = gBS->OpenProtocol (\r
- Handle,\r
- &gEfiGraphicsOutputProtocolGuid,\r
- (VOID **) &GraphicsOutput,\r
- This->DriverBindingHandle,\r
- Handle,\r
- EFI_OPEN_PROTOCOL_GET_PROTOCOL\r
- );\r
- if (!EFI_ERROR (Status)) {\r
- FbGopPrivate = FB_VIDEO_DEV_FROM_GRAPHICS_OUTPUT_THIS (GraphicsOutput);\r
- }\r
-\r
- if (FbGopPrivate == NULL) {\r
- return EFI_UNSUPPORTED;\r
- }\r
-\r
- //\r
- // Close PCI I/O protocol that opened by child handle\r
- //\r
- Status = gBS->CloseProtocol (\r
- Controller,\r
- &gEfiPciIoProtocolGuid,\r
- This->DriverBindingHandle,\r
- Handle\r
- );\r
-\r
- //\r
- // Uninstall protocols on child handle\r
- //\r
- Status = gBS->UninstallMultipleProtocolInterfaces (\r
- FbGopPrivate->Handle,\r
- &gEfiDevicePathProtocolGuid,\r
- FbGopPrivate->GopDevicePath,\r
- &gEfiGraphicsOutputProtocolGuid,\r
- &FbGopPrivate->GraphicsOutput,\r
- NULL\r
- );\r
-\r
- if (EFI_ERROR (Status)) {\r
- gBS->OpenProtocol (\r
- Controller,\r
- &gEfiPciIoProtocolGuid,\r
- (VOID **) &PciIo,\r
- This->DriverBindingHandle,\r
- Handle,\r
- EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER\r
- );\r
- return Status;\r
- }\r
-\r
- //\r
- // Release all allocated resources\r
- //\r
- FbGopDeviceReleaseResource (FbGopPrivate);\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-/**\r
- Release resource for bios video instance.\r
-\r
- @param FbGopPrivate Video child device private data structure\r
-\r
-**/\r
-VOID\r
-FbGopDeviceReleaseResource (\r
- FB_VIDEO_DEV *FbGopPrivate\r
- )\r
-{\r
- if (FbGopPrivate == NULL) {\r
- return ;\r
- }\r
-\r
- //\r
- // Release all the resources occupied by the FB_VIDEO_DEV\r
- //\r
-\r
- //\r
- // Free VBE Frame Buffer\r
- //\r
- if (FbGopPrivate->VbeFrameBuffer != NULL) {\r
- FreePool (FbGopPrivate->VbeFrameBuffer);\r
- }\r
-\r
- //\r
- // Free mode data\r
- //\r
- if (FbGopPrivate->ModeData != NULL) {\r
- FreePool (FbGopPrivate->ModeData);\r
- }\r
-\r
- //\r
- // Free graphics output protocol occupied resource\r
- //\r
- if (FbGopPrivate->GraphicsOutput.Mode != NULL) {\r
- if (FbGopPrivate->GraphicsOutput.Mode->Info != NULL) {\r
- FreePool (FbGopPrivate->GraphicsOutput.Mode->Info);\r
- FbGopPrivate->GraphicsOutput.Mode->Info = NULL;\r
- }\r
- FreePool (FbGopPrivate->GraphicsOutput.Mode);\r
- FbGopPrivate->GraphicsOutput.Mode = NULL;\r
- }\r
-\r
- if (FbGopPrivate->GopDevicePath!= NULL) {\r
- FreePool (FbGopPrivate->GopDevicePath);\r
- }\r
-\r
- FreePool (FbGopPrivate);\r
-\r
- return ;\r
-}\r
-\r
-\r
-\r
-/**\r
- Check if all video child handles have been uninstalled.\r
-\r
- @param Controller Video controller handle\r
-\r
- @return TRUE Child handles exist.\r
- @return FALSE All video child handles have been uninstalled.\r
-\r
-**/\r
-BOOLEAN\r
-HasChildHandle (\r
- IN EFI_HANDLE Controller\r
- )\r
-{\r
- UINTN Index;\r
- EFI_OPEN_PROTOCOL_INFORMATION_ENTRY *OpenInfoBuffer;\r
- UINTN EntryCount;\r
- BOOLEAN HasChild;\r
-\r
- EntryCount = 0;\r
- HasChild = FALSE;\r
- gBS->OpenProtocolInformation (\r
- Controller,\r
- &gEfiPciIoProtocolGuid,\r
- &OpenInfoBuffer,\r
- &EntryCount\r
- );\r
- for (Index = 0; Index < EntryCount; Index++) {\r
- if ((OpenInfoBuffer[Index].Attributes & EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER) != 0) {\r
- HasChild = TRUE;\r
- }\r
- }\r
-\r
- return HasChild;\r
-}\r
-\r
-/**\r
- Check for VBE device.\r
-\r
- @param FbGopPrivate Pointer to FB_VIDEO_DEV structure\r
-\r
- @retval EFI_SUCCESS VBE device found\r
-\r
-**/\r
-EFI_STATUS\r
-FbGopCheckForVbe (\r
- IN OUT FB_VIDEO_DEV *FbGopPrivate\r
- )\r
-{\r
- EFI_STATUS Status;\r
- FB_VIDEO_MODE_DATA *ModeBuffer;\r
- FB_VIDEO_MODE_DATA *CurrentModeData;\r
- UINTN ModeNumber;\r
- UINTN BitsPerPixel;\r
- UINTN BytesPerScanLine;\r
- UINT32 HorizontalResolution;\r
- UINT32 VerticalResolution;\r
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL *VbeFrameBuffer;\r
- FRAME_BUFFER_INFO *FbInfo;\r
-\r
- Status = EFI_SUCCESS;\r
-\r
- FbInfo = mFrameBufferInfo;\r
-\r
- //\r
- // Add mode to the list of available modes\r
- //\r
- VbeFrameBuffer = NULL;\r
- ModeBuffer = NULL;\r
-\r
- ModeNumber = 1;\r
- BitsPerPixel = FbInfo->BitsPerPixel;\r
- HorizontalResolution = FbInfo->HorizontalResolution;\r
- VerticalResolution = FbInfo->VerticalResolution;\r
- BytesPerScanLine = FbInfo->BytesPerScanLine;\r
-\r
- ModeBuffer = (FB_VIDEO_MODE_DATA *) AllocatePool (\r
- ModeNumber * sizeof (FB_VIDEO_MODE_DATA)\r
- );\r
- if (NULL == ModeBuffer) {\r
- Status = EFI_OUT_OF_RESOURCES;\r
- goto Done;\r
- }\r
-\r
- VbeFrameBuffer =\r
- (EFI_GRAPHICS_OUTPUT_BLT_PIXEL *) AllocatePool (\r
- BytesPerScanLine * VerticalResolution\r
- );\r
- if (NULL == VbeFrameBuffer) {\r
- Status = EFI_OUT_OF_RESOURCES;\r
- goto Done;\r
- }\r
-\r
- if (FbGopPrivate->ModeData != NULL) {\r
- FreePool (FbGopPrivate->ModeData);\r
- }\r
-\r
- if (FbGopPrivate->VbeFrameBuffer != NULL) {\r
- FreePool (FbGopPrivate->VbeFrameBuffer);\r
- }\r
-\r
- CurrentModeData = &ModeBuffer[ModeNumber - 1];\r
- CurrentModeData->BytesPerScanLine = (UINT16)BytesPerScanLine;\r
-\r
- CurrentModeData->Red = *(FB_VIDEO_COLOR_PLACEMENT *)&(FbInfo->Red);\r
- CurrentModeData->Blue = *(FB_VIDEO_COLOR_PLACEMENT *)&(FbInfo->Blue);\r
- CurrentModeData->Green = *(FB_VIDEO_COLOR_PLACEMENT *)&(FbInfo->Green);\r
- CurrentModeData->Reserved = *(FB_VIDEO_COLOR_PLACEMENT *)&(FbInfo->Reserved);\r
-\r
- CurrentModeData->BitsPerPixel = (UINT32)BitsPerPixel;\r
- CurrentModeData->HorizontalResolution = HorizontalResolution;\r
- CurrentModeData->VerticalResolution = VerticalResolution;\r
- CurrentModeData->FrameBufferSize = CurrentModeData->BytesPerScanLine * CurrentModeData->VerticalResolution;\r
- CurrentModeData->LinearFrameBuffer = (VOID *) (UINTN) FbInfo->LinearFrameBuffer;\r
- CurrentModeData->VbeModeNumber = 0;\r
- CurrentModeData->ColorDepth = 32;\r
- CurrentModeData->RefreshRate = 60;\r
-\r
- CurrentModeData->PixelFormat = PixelBitMask;\r
- if ((CurrentModeData->BitsPerPixel == 32) &&\r
- (CurrentModeData->Red.Mask == 0xff) && (CurrentModeData->Green.Mask == 0xff) && (CurrentModeData->Blue.Mask == 0xff)) {\r
- if ((CurrentModeData->Red.Position == 0) && (CurrentModeData->Green.Position == 8) && (CurrentModeData->Blue.Position == 16)) {\r
- CurrentModeData->PixelFormat = PixelRedGreenBlueReserved8BitPerColor;\r
- } else if ((CurrentModeData->Blue.Position == 0) && (CurrentModeData->Green.Position == 8) && (CurrentModeData->Red.Position == 16)) {\r
- CurrentModeData->PixelFormat = PixelBlueGreenRedReserved8BitPerColor;\r
- }\r
- }\r
-\r
- CopyMem (&(CurrentModeData->PixelBitMask), &mPixelBitMask, sizeof (EFI_PIXEL_BITMASK));\r
-\r
- FbGopPrivate->ModeData = ModeBuffer;\r
- FbGopPrivate->VbeFrameBuffer = VbeFrameBuffer;\r
-\r
- //\r
- // Assign Gop's Blt function\r
- //\r
- FbGopPrivate->GraphicsOutput.Blt = FbGopGraphicsOutputVbeBlt;\r
-\r
- FbGopPrivate->GraphicsOutput.Mode->MaxMode = 1;\r
- FbGopPrivate->GraphicsOutput.Mode->Mode = 0;\r
- FbGopPrivate->GraphicsOutput.Mode->Info->Version = 0;\r
- FbGopPrivate->GraphicsOutput.Mode->Info->HorizontalResolution = HorizontalResolution;\r
- FbGopPrivate->GraphicsOutput.Mode->Info->VerticalResolution = VerticalResolution;\r
- FbGopPrivate->GraphicsOutput.Mode->Info->PixelFormat = CurrentModeData->PixelFormat;\r
- CopyMem (&(FbGopPrivate->GraphicsOutput.Mode->Info->PixelInformation), &mPixelBitMask, sizeof (EFI_PIXEL_BITMASK));\r
- FbGopPrivate->GraphicsOutput.Mode->Info->PixelsPerScanLine = (UINT32)(BytesPerScanLine * 8 / BitsPerPixel);\r
- FbGopPrivate->GraphicsOutput.Mode->SizeOfInfo = sizeof(EFI_GRAPHICS_OUTPUT_MODE_INFORMATION);\r
- FbGopPrivate->GraphicsOutput.Mode->FrameBufferBase = (EFI_PHYSICAL_ADDRESS) (UINTN) CurrentModeData->LinearFrameBuffer;\r
- FbGopPrivate->GraphicsOutput.Mode->FrameBufferSize = CurrentModeData->FrameBufferSize;\r
-\r
- //\r
- // Find the best mode to initialize\r
- //\r
-\r
-Done:\r
- //\r
- // If there was an error, then free the mode structure\r
- //\r
- if (EFI_ERROR (Status)) {\r
-\r
- if (VbeFrameBuffer != NULL) {\r
- FreePool (VbeFrameBuffer);\r
- }\r
-\r
- if (ModeBuffer != NULL) {\r
- FreePool (ModeBuffer);\r
- }\r
- }\r
-\r
- return Status;\r
-}\r
-\r
-\r
-//\r
-// Graphics Output Protocol Member Functions for VESA BIOS Extensions\r
-//\r
-\r
-/**\r
- Graphics Output protocol interface to get video mode.\r
-\r
- @param This Protocol instance pointer.\r
- @param ModeNumber The mode number to return information on.\r
- @param SizeOfInfo A pointer to the size, in bytes, of the Info\r
- buffer.\r
- @param Info Caller allocated buffer that returns information\r
- about ModeNumber.\r
-\r
- @retval EFI_SUCCESS Mode information returned.\r
- @retval EFI_DEVICE_ERROR A hardware error occurred trying to retrieve the\r
- video mode.\r
- @retval EFI_NOT_STARTED Video display is not initialized. Call SetMode ()\r
- @retval EFI_INVALID_PARAMETER One of the input args was NULL.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopGraphicsOutputQueryMode (\r
- IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
- IN UINT32 ModeNumber,\r
- OUT UINTN *SizeOfInfo,\r
- OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info\r
- )\r
-{\r
- FB_VIDEO_DEV *FbGopPrivate;\r
- FB_VIDEO_MODE_DATA *ModeData;\r
-\r
- FbGopPrivate = FB_VIDEO_DEV_FROM_GRAPHICS_OUTPUT_THIS (This);\r
-\r
- if (This == NULL || Info == NULL || SizeOfInfo == NULL || ModeNumber >= This->Mode->MaxMode) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
-\r
- *Info = (EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *) AllocatePool (\r
- sizeof (EFI_GRAPHICS_OUTPUT_MODE_INFORMATION)\r
- );\r
- if (NULL == *Info) {\r
- return EFI_OUT_OF_RESOURCES;\r
- }\r
-\r
- *SizeOfInfo = sizeof (EFI_GRAPHICS_OUTPUT_MODE_INFORMATION);\r
-\r
- ModeData = &FbGopPrivate->ModeData[ModeNumber];\r
- (*Info)->Version = 0;\r
- (*Info)->HorizontalResolution = ModeData->HorizontalResolution;\r
- (*Info)->VerticalResolution = ModeData->VerticalResolution;\r
- (*Info)->PixelFormat = ModeData->PixelFormat;\r
- CopyMem (&((*Info)->PixelInformation), &(ModeData->PixelBitMask), sizeof(ModeData->PixelBitMask));\r
-\r
- (*Info)->PixelsPerScanLine = (ModeData->BytesPerScanLine * 8) / ModeData->BitsPerPixel;\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-/**\r
- Graphics Output protocol interface to set video mode.\r
-\r
- @param This Protocol instance pointer.\r
- @param ModeNumber The mode number to be set.\r
-\r
- @retval EFI_SUCCESS Graphics mode was changed.\r
- @retval EFI_DEVICE_ERROR The device had an error and could not complete the\r
- request.\r
- @retval EFI_UNSUPPORTED ModeNumber is not supported by this device.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopGraphicsOutputSetMode (\r
- IN EFI_GRAPHICS_OUTPUT_PROTOCOL * This,\r
- IN UINT32 ModeNumber\r
- )\r
-{\r
- FB_VIDEO_DEV *FbGopPrivate;\r
- FB_VIDEO_MODE_DATA *ModeData;\r
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL Background;\r
-\r
- if (This == NULL) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
-\r
- FbGopPrivate = FB_VIDEO_DEV_FROM_GRAPHICS_OUTPUT_THIS (This);\r
-\r
- ModeData = &FbGopPrivate->ModeData[ModeNumber];\r
-\r
- if (ModeNumber >= This->Mode->MaxMode) {\r
- return EFI_UNSUPPORTED;\r
- }\r
-\r
- if (ModeNumber == This->Mode->Mode) {\r
- //\r
- // Clear screen to black\r
- //\r
- ZeroMem (&Background, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));\r
- FbGopGraphicsOutputVbeBlt (\r
- This,\r
- &Background,\r
- EfiBltVideoFill,\r
- 0,\r
- 0,\r
- 0,\r
- 0,\r
- ModeData->HorizontalResolution,\r
- ModeData->VerticalResolution,\r
- 0\r
- );\r
- return EFI_SUCCESS;\r
- } else {\r
- return EFI_UNSUPPORTED;\r
- }\r
-\r
-}\r
-\r
-/**\r
- Update physical frame buffer, copy 4 bytes block, then copy remaining bytes.\r
-\r
- @param PciIo The pointer of EFI_PCI_IO_PROTOCOL\r
- @param VbeBuffer The data to transfer to screen\r
- @param MemAddress Physical frame buffer base address\r
- @param DestinationX The X coordinate of the destination for BltOperation\r
- @param DestinationY The Y coordinate of the destination for BltOperation\r
- @param TotalBytes The total bytes of copy\r
- @param VbePixelWidth Bytes per pixel\r
- @param BytesPerScanLine Bytes per scan line\r
-\r
-**/\r
-VOID\r
-CopyVideoBuffer (\r
- IN EFI_PCI_IO_PROTOCOL *PciIo,\r
- IN UINT8 *VbeBuffer,\r
- IN VOID *MemAddress,\r
- IN UINTN DestinationX,\r
- IN UINTN DestinationY,\r
- IN UINTN TotalBytes,\r
- IN UINT32 VbePixelWidth,\r
- IN UINTN BytesPerScanLine\r
- )\r
-{\r
- UINTN FrameBufferAddr;\r
- UINTN CopyBlockNum;\r
- UINTN RemainingBytes;\r
- UINTN UnalignedBytes;\r
- EFI_STATUS Status;\r
-\r
- FrameBufferAddr = (UINTN) MemAddress + (DestinationY * BytesPerScanLine) + DestinationX * VbePixelWidth;\r
-\r
- //\r
- // If TotalBytes is less than 4 bytes, only start byte copy.\r
- //\r
- if (TotalBytes < 4) {\r
- Status = PciIo->Mem.Write (\r
- PciIo,\r
- EfiPciIoWidthUint8,\r
- EFI_PCI_IO_PASS_THROUGH_BAR,\r
- (UINT64) FrameBufferAddr,\r
- TotalBytes,\r
- VbeBuffer\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- return;\r
- }\r
-\r
- //\r
- // If VbeBuffer is not 4-byte aligned, start byte copy.\r
- //\r
- UnalignedBytes = (4 - ((UINTN) VbeBuffer & 0x3)) & 0x3;\r
-\r
- if (UnalignedBytes != 0) {\r
- Status = PciIo->Mem.Write (\r
- PciIo,\r
- EfiPciIoWidthUint8,\r
- EFI_PCI_IO_PASS_THROUGH_BAR,\r
- (UINT64) FrameBufferAddr,\r
- UnalignedBytes,\r
- VbeBuffer\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- FrameBufferAddr += UnalignedBytes;\r
- VbeBuffer += UnalignedBytes;\r
- }\r
-\r
- //\r
- // Calculate 4-byte block count and remaining bytes.\r
- //\r
- CopyBlockNum = (TotalBytes - UnalignedBytes) >> 2;\r
- RemainingBytes = (TotalBytes - UnalignedBytes) & 3;\r
-\r
- //\r
- // Copy 4-byte block and remaining bytes to physical frame buffer.\r
- //\r
- if (CopyBlockNum != 0) {\r
- Status = PciIo->Mem.Write (\r
- PciIo,\r
- EfiPciIoWidthUint32,\r
- EFI_PCI_IO_PASS_THROUGH_BAR,\r
- (UINT64) FrameBufferAddr,\r
- CopyBlockNum,\r
- VbeBuffer\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
-\r
- if (RemainingBytes != 0) {\r
- FrameBufferAddr += (CopyBlockNum << 2);\r
- VbeBuffer += (CopyBlockNum << 2);\r
- Status = PciIo->Mem.Write (\r
- PciIo,\r
- EfiPciIoWidthUint8,\r
- EFI_PCI_IO_PASS_THROUGH_BAR,\r
- (UINT64) FrameBufferAddr,\r
- RemainingBytes,\r
- VbeBuffer\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
-}\r
-\r
-/**\r
- Worker function to block transfer for VBE device.\r
-\r
- @param FbGopPrivate Instance of FB_VIDEO_DEV\r
- @param BltBuffer The data to transfer to screen\r
- @param BltOperation The operation to perform\r
- @param SourceX The X coordinate of the source for BltOperation\r
- @param SourceY The Y coordinate of the source for BltOperation\r
- @param DestinationX The X coordinate of the destination for\r
- BltOperation\r
- @param DestinationY The Y coordinate of the destination for\r
- BltOperation\r
- @param Width The width of a rectangle in the blt rectangle in\r
- pixels\r
- @param Height The height of a rectangle in the blt rectangle in\r
- pixels\r
- @param Delta Not used for EfiBltVideoFill and\r
- EfiBltVideoToVideo operation. If a Delta of 0 is\r
- used, the entire BltBuffer will be operated on. If\r
- a subrectangle of the BltBuffer is used, then\r
- Delta represents the number of bytes in a row of\r
- the BltBuffer.\r
- @param Mode Mode data.\r
-\r
- @retval EFI_INVALID_PARAMETER Invalid parameter passed in\r
- @retval EFI_SUCCESS Blt operation success\r
-\r
-**/\r
-EFI_STATUS\r
-FbGopVbeBltWorker (\r
- IN FB_VIDEO_DEV *FbGopPrivate,\r
- IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer, OPTIONAL\r
- IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation,\r
- IN UINTN SourceX,\r
- IN UINTN SourceY,\r
- IN UINTN DestinationX,\r
- IN UINTN DestinationY,\r
- IN UINTN Width,\r
- IN UINTN Height,\r
- IN UINTN Delta,\r
- IN FB_VIDEO_MODE_DATA *Mode\r
- )\r
-{\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- EFI_TPL OriginalTPL;\r
- UINTN DstY;\r
- UINTN SrcY;\r
- UINTN DstX;\r
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Blt;\r
- VOID *MemAddress;\r
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL *VbeFrameBuffer;\r
- UINTN BytesPerScanLine;\r
- UINTN Index;\r
- UINT8 *VbeBuffer;\r
- UINT8 *VbeBuffer1;\r
- UINT8 *BltUint8;\r
- UINT32 VbePixelWidth;\r
- UINT32 Pixel;\r
- UINTN TotalBytes;\r
-\r
- PciIo = FbGopPrivate->PciIo;\r
-\r
- VbeFrameBuffer = FbGopPrivate->VbeFrameBuffer;\r
- MemAddress = Mode->LinearFrameBuffer;\r
- BytesPerScanLine = Mode->BytesPerScanLine;\r
- VbePixelWidth = Mode->BitsPerPixel / 8;\r
- BltUint8 = (UINT8 *) BltBuffer;\r
- TotalBytes = Width * VbePixelWidth;\r
-\r
- if (((UINTN) BltOperation) >= EfiGraphicsOutputBltOperationMax) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
-\r
- if (Width == 0 || Height == 0) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
- //\r
- // We need to fill the Virtual Screen buffer with the blt data.\r
- // The virtual screen is upside down, as the first row is the bottom row of\r
- // the image.\r
- //\r
- if (BltOperation == EfiBltVideoToBltBuffer) {\r
- //\r
- // Video to BltBuffer: Source is Video, destination is BltBuffer\r
- //\r
- if (SourceY + Height > Mode->VerticalResolution) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
-\r
- if (SourceX + Width > Mode->HorizontalResolution) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
- } else {\r
- //\r
- // BltBuffer to Video: Source is BltBuffer, destination is Video\r
- //\r
- if (DestinationY + Height > Mode->VerticalResolution) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
-\r
- if (DestinationX + Width > Mode->HorizontalResolution) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
- }\r
- //\r
- // If Delta is zero, then the entire BltBuffer is being used, so Delta\r
- // is the number of bytes in each row of BltBuffer. Since BltBuffer is Width pixels size,\r
- // the number of bytes in each row can be computed.\r
- //\r
- if (Delta == 0) {\r
- Delta = Width * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL);\r
- }\r
- //\r
- // We have to raise to TPL Notify, so we make an atomic write the frame buffer.\r
- // We would not want a timer based event (Cursor, ...) to come in while we are\r
- // doing this operation.\r
- //\r
- OriginalTPL = gBS->RaiseTPL (TPL_NOTIFY);\r
-\r
- switch (BltOperation) {\r
- case EfiBltVideoToBltBuffer:\r
- for (SrcY = SourceY, DstY = DestinationY; DstY < (Height + DestinationY); SrcY++, DstY++) {\r
- Blt = (EFI_GRAPHICS_OUTPUT_BLT_PIXEL *) (BltUint8 + DstY * Delta + DestinationX * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));\r
- //\r
- // Shuffle the packed bytes in the hardware buffer to match EFI_GRAPHICS_OUTPUT_BLT_PIXEL\r
- //\r
- VbeBuffer = ((UINT8 *) VbeFrameBuffer + (SrcY * BytesPerScanLine + SourceX * VbePixelWidth));\r
- for (DstX = DestinationX; DstX < (Width + DestinationX); DstX++) {\r
- Pixel = VbeBuffer[0] | VbeBuffer[1] << 8 | VbeBuffer[2] << 16 | VbeBuffer[3] << 24;\r
- Blt->Red = (UINT8) ((Pixel >> Mode->Red.Position) & Mode->Red.Mask);\r
- Blt->Blue = (UINT8) ((Pixel >> Mode->Blue.Position) & Mode->Blue.Mask);\r
- Blt->Green = (UINT8) ((Pixel >> Mode->Green.Position) & Mode->Green.Mask);\r
- Blt->Reserved = 0;\r
- Blt++;\r
- VbeBuffer += VbePixelWidth;\r
- }\r
-\r
- }\r
- break;\r
-\r
- case EfiBltVideoToVideo:\r
- for (Index = 0; Index < Height; Index++) {\r
- if (DestinationY <= SourceY) {\r
- SrcY = SourceY + Index;\r
- DstY = DestinationY + Index;\r
- } else {\r
- SrcY = SourceY + Height - Index - 1;\r
- DstY = DestinationY + Height - Index - 1;\r
- }\r
-\r
- VbeBuffer = ((UINT8 *) VbeFrameBuffer + DstY * BytesPerScanLine + DestinationX * VbePixelWidth);\r
- VbeBuffer1 = ((UINT8 *) VbeFrameBuffer + SrcY * BytesPerScanLine + SourceX * VbePixelWidth);\r
-\r
- gBS->CopyMem (\r
- VbeBuffer,\r
- VbeBuffer1,\r
- TotalBytes\r
- );\r
-\r
- //\r
- // Update physical frame buffer.\r
- //\r
- CopyVideoBuffer (\r
- PciIo,\r
- VbeBuffer,\r
- MemAddress,\r
- DestinationX,\r
- DstY,\r
- TotalBytes,\r
- VbePixelWidth,\r
- BytesPerScanLine\r
- );\r
- }\r
- break;\r
-\r
- case EfiBltVideoFill:\r
- VbeBuffer = (UINT8 *) ((UINTN) VbeFrameBuffer + (DestinationY * BytesPerScanLine) + DestinationX * VbePixelWidth);\r
- Blt = (EFI_GRAPHICS_OUTPUT_BLT_PIXEL *) BltUint8;\r
- //\r
- // Shuffle the RGB fields in EFI_GRAPHICS_OUTPUT_BLT_PIXEL to match the hardware buffer\r
- //\r
- Pixel = ((Blt->Red & Mode->Red.Mask) << Mode->Red.Position) |\r
- (\r
- (Blt->Green & Mode->Green.Mask) <<\r
- Mode->Green.Position\r
- ) |\r
- ((Blt->Blue & Mode->Blue.Mask) << Mode->Blue.Position);\r
-\r
- for (Index = 0; Index < Width; Index++) {\r
- gBS->CopyMem (\r
- VbeBuffer,\r
- &Pixel,\r
- VbePixelWidth\r
- );\r
- VbeBuffer += VbePixelWidth;\r
- }\r
-\r
- VbeBuffer = (UINT8 *) ((UINTN) VbeFrameBuffer + (DestinationY * BytesPerScanLine) + DestinationX * VbePixelWidth);\r
- for (DstY = DestinationY + 1; DstY < (Height + DestinationY); DstY++) {\r
- gBS->CopyMem (\r
- (VOID *) ((UINTN) VbeFrameBuffer + (DstY * BytesPerScanLine) + DestinationX * VbePixelWidth),\r
- VbeBuffer,\r
- TotalBytes\r
- );\r
- }\r
-\r
- for (DstY = DestinationY; DstY < (Height + DestinationY); DstY++) {\r
- //\r
- // Update physical frame buffer.\r
- //\r
- CopyVideoBuffer (\r
- PciIo,\r
- VbeBuffer,\r
- MemAddress,\r
- DestinationX,\r
- DstY,\r
- TotalBytes,\r
- VbePixelWidth,\r
- BytesPerScanLine\r
- );\r
- }\r
- break;\r
-\r
- case EfiBltBufferToVideo:\r
- for (SrcY = SourceY, DstY = DestinationY; SrcY < (Height + SourceY); SrcY++, DstY++) {\r
- Blt = (EFI_GRAPHICS_OUTPUT_BLT_PIXEL *) (BltUint8 + (SrcY * Delta) + (SourceX) * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));\r
- VbeBuffer = ((UINT8 *) VbeFrameBuffer + (DstY * BytesPerScanLine + DestinationX * VbePixelWidth));\r
- for (DstX = DestinationX; DstX < (Width + DestinationX); DstX++) {\r
- //\r
- // Shuffle the RGB fields in EFI_GRAPHICS_OUTPUT_BLT_PIXEL to match the hardware buffer\r
- //\r
- Pixel = ((Blt->Red & Mode->Red.Mask) << Mode->Red.Position) |\r
- ((Blt->Green & Mode->Green.Mask) << Mode->Green.Position) |\r
- ((Blt->Blue & Mode->Blue.Mask) << Mode->Blue.Position);\r
- gBS->CopyMem (\r
- VbeBuffer,\r
- &Pixel,\r
- VbePixelWidth\r
- );\r
- Blt++;\r
- VbeBuffer += VbePixelWidth;\r
- }\r
-\r
- VbeBuffer = ((UINT8 *) VbeFrameBuffer + (DstY * BytesPerScanLine + DestinationX * VbePixelWidth));\r
-\r
- //\r
- // Update physical frame buffer.\r
- //\r
- CopyVideoBuffer (\r
- PciIo,\r
- VbeBuffer,\r
- MemAddress,\r
- DestinationX,\r
- DstY,\r
- TotalBytes,\r
- VbePixelWidth,\r
- BytesPerScanLine\r
- );\r
- }\r
- break;\r
-\r
- default: ;\r
- }\r
-\r
- gBS->RestoreTPL (OriginalTPL);\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-/**\r
- Graphics Output protocol instance to block transfer for VBE device.\r
-\r
- @param This Pointer to Graphics Output protocol instance\r
- @param BltBuffer The data to transfer to screen\r
- @param BltOperation The operation to perform\r
- @param SourceX The X coordinate of the source for BltOperation\r
- @param SourceY The Y coordinate of the source for BltOperation\r
- @param DestinationX The X coordinate of the destination for\r
- BltOperation\r
- @param DestinationY The Y coordinate of the destination for\r
- BltOperation\r
- @param Width The width of a rectangle in the blt rectangle in\r
- pixels\r
- @param Height The height of a rectangle in the blt rectangle in\r
- pixels\r
- @param Delta Not used for EfiBltVideoFill and\r
- EfiBltVideoToVideo operation. If a Delta of 0 is\r
- used, the entire BltBuffer will be operated on. If\r
- a subrectangle of the BltBuffer is used, then\r
- Delta represents the number of bytes in a row of\r
- the BltBuffer.\r
-\r
- @retval EFI_INVALID_PARAMETER Invalid parameter passed in\r
- @retval EFI_SUCCESS Blt operation success\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopGraphicsOutputVbeBlt (\r
- IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
- IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer, OPTIONAL\r
- IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation,\r
- IN UINTN SourceX,\r
- IN UINTN SourceY,\r
- IN UINTN DestinationX,\r
- IN UINTN DestinationY,\r
- IN UINTN Width,\r
- IN UINTN Height,\r
- IN UINTN Delta\r
- )\r
-{\r
- FB_VIDEO_DEV *FbGopPrivate;\r
- FB_VIDEO_MODE_DATA *Mode;\r
-\r
- if (This == NULL) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
-\r
- FbGopPrivate = FB_VIDEO_DEV_FROM_GRAPHICS_OUTPUT_THIS (This);\r
- Mode = &FbGopPrivate->ModeData[This->Mode->Mode];\r
-\r
- return FbGopVbeBltWorker (\r
- FbGopPrivate,\r
- BltBuffer,\r
- BltOperation,\r
- SourceX,\r
- SourceY,\r
- DestinationX,\r
- DestinationY,\r
- Width,\r
- Height,\r
- Delta,\r
- Mode\r
- );\r
-}\r
-\r
-\r
-/**\r
- The user Entry Point for module UefiFbGop. The user code starts with this function.\r
-\r
- @param[in] ImageHandle The firmware allocated handle for the EFI image.\r
- @param[in] SystemTable A pointer to the EFI System Table.\r
-\r
- @retval EFI_SUCCESS The entry point is executed successfully.\r
- @retval other Some error occurs when executing this entry point.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopEntryPoint(\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
- )\r
-{\r
- EFI_STATUS Status;\r
- EFI_HOB_GUID_TYPE *GuidHob;\r
-\r
- //\r
- // Find the frame buffer information guid hob\r
- //\r
- GuidHob = GetFirstGuidHob (&gUefiFrameBufferInfoGuid);\r
- if (GuidHob != NULL) {\r
- mFrameBufferInfo = (FRAME_BUFFER_INFO *)GET_GUID_HOB_DATA (GuidHob);\r
-\r
- //\r
- // Install driver model protocol(s).\r
- //\r
- Status = EfiLibInstallDriverBindingComponentName2 (\r
- ImageHandle,\r
- SystemTable,\r
- &gFbGopDriverBinding,\r
- ImageHandle,\r
- &gFbGopComponentName,\r
- &gFbGopComponentName2\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- } else {\r
- DEBUG ((DEBUG_ERROR, "No FrameBuffer information from coreboot. NO GOP driver !!!\n"));\r
- Status = EFI_ABORTED;\r
- }\r
- return Status;\r
-}\r
-\r
+++ /dev/null
-/** @file\r
-\r
-Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
-\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#ifndef _FB_GOP_H_\r
-#define _FB_GOP_H_\r
-\r
-#include <Protocol/PciIo.h>\r
-#include <Protocol/DevicePath.h>\r
-#include <Protocol/GraphicsOutput.h>\r
-#include <Protocol/EdidActive.h>\r
-#include <Protocol/EdidDiscovered.h>\r
-\r
-#include <Guid/StatusCodeDataTypeId.h>\r
-#include <Guid/EventGroup.h>\r
-#include <Guid/FrameBufferInfoGuid.h>\r
-\r
-#include <Library/PcdLib.h>\r
-#include <Library/HobLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/ReportStatusCodeLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/UefiDriverEntryPoint.h>\r
-#include <Library/UefiBootServicesTableLib.h>\r
-#include <Library/UefiLib.h>\r
-#include <Library/DevicePathLib.h>\r
-#include <Library/MemoryAllocationLib.h>\r
-\r
-#include <IndustryStandard/Pci.h>\r
-\r
-//\r
-// Packed format support: The number of bits reserved for each of the colors and the actual\r
-// position of RGB in the frame buffer is specified in the VBE Mode information\r
-//\r
-typedef struct {\r
- UINT8 Position; // Position of the color\r
- UINT8 Mask; // The number of bits expressed as a mask\r
-} FB_VIDEO_COLOR_PLACEMENT;\r
-\r
-//\r
-// BIOS Graphics Output Graphical Mode Data\r
-//\r
-typedef struct {\r
- UINT16 VbeModeNumber;\r
- UINT16 BytesPerScanLine;\r
- VOID *LinearFrameBuffer;\r
- UINTN FrameBufferSize;\r
- UINT32 HorizontalResolution;\r
- UINT32 VerticalResolution;\r
- UINT32 ColorDepth;\r
- UINT32 RefreshRate;\r
- UINT32 BitsPerPixel;\r
- FB_VIDEO_COLOR_PLACEMENT Red;\r
- FB_VIDEO_COLOR_PLACEMENT Green;\r
- FB_VIDEO_COLOR_PLACEMENT Blue;\r
- FB_VIDEO_COLOR_PLACEMENT Reserved;\r
- EFI_GRAPHICS_PIXEL_FORMAT PixelFormat;\r
- EFI_PIXEL_BITMASK PixelBitMask;\r
-} FB_VIDEO_MODE_DATA;\r
-\r
-//\r
-// BIOS video child handle private data Structure\r
-//\r
-#define FB_VIDEO_DEV_SIGNATURE SIGNATURE_32 ('B', 'V', 'M', 'p')\r
-\r
-typedef struct {\r
- UINTN Signature;\r
- EFI_HANDLE Handle;\r
-\r
- //\r
- // Consumed Protocols\r
- //\r
- EFI_PCI_IO_PROTOCOL *PciIo; \r
-\r
- //\r
- // Produced Protocols\r
- //\r
- EFI_GRAPHICS_OUTPUT_PROTOCOL GraphicsOutput;\r
- EFI_EDID_DISCOVERED_PROTOCOL EdidDiscovered;\r
- EFI_EDID_ACTIVE_PROTOCOL EdidActive;\r
-\r
- //\r
- // Graphics Output Protocol related fields\r
- //\r
- UINTN CurrentMode;\r
- UINTN MaxMode;\r
- FB_VIDEO_MODE_DATA *ModeData;\r
- \r
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL *VbeFrameBuffer;\r
- \r
- //\r
- // Status code\r
- //\r
- EFI_DEVICE_PATH_PROTOCOL *GopDevicePath;\r
- \r
-} FB_VIDEO_DEV;\r
-\r
-#define FB_VIDEO_DEV_FROM_PCI_IO_THIS(a) CR (a, FB_VIDEO_DEV, PciIo, FB_VIDEO_DEV_SIGNATURE)\r
-#define FB_VIDEO_DEV_FROM_GRAPHICS_OUTPUT_THIS(a) CR (a, FB_VIDEO_DEV, GraphicsOutput, FB_VIDEO_DEV_SIGNATURE)\r
-\r
-#define GRAPHICS_OUTPUT_INVALIDE_MODE_NUMBER 0xffff\r
-\r
-//\r
-// Global Variables\r
-//\r
-extern EFI_DRIVER_BINDING_PROTOCOL gFbGopDriverBinding;\r
-extern EFI_COMPONENT_NAME_PROTOCOL gFbGopComponentName;\r
-extern EFI_COMPONENT_NAME2_PROTOCOL gFbGopComponentName2;\r
-\r
-//\r
-// Driver Binding Protocol functions\r
-//\r
-\r
-/**\r
- Supported.\r
-\r
- @param This Pointer to driver binding protocol\r
- @param Controller Controller handle to connect\r
- @param RemainingDevicePath A pointer to the remaining portion of a device\r
- path\r
-\r
- @retval EFI_STATUS EFI_SUCCESS:This controller can be managed by this\r
- driver, Otherwise, this controller cannot be\r
- managed by this driver\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopDriverBindingSupported (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
- );\r
-\r
-\r
-/**\r
- Install Graphics Output Protocol onto VGA device handles.\r
-\r
- @param This Pointer to driver binding protocol\r
- @param Controller Controller handle to connect\r
- @param RemainingDevicePath A pointer to the remaining portion of a device\r
- path\r
-\r
- @return EFI_STATUS\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopDriverBindingStart (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
- );\r
-\r
-\r
-/**\r
- Stop.\r
-\r
- @param This Pointer to driver binding protocol\r
- @param Controller Controller handle to connect\r
- @param NumberOfChildren Number of children handle created by this driver\r
- @param ChildHandleBuffer Buffer containing child handle created\r
-\r
- @retval EFI_SUCCESS Driver disconnected successfully from controller\r
- @retval EFI_UNSUPPORTED Cannot find FB_VIDEO_DEV structure\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopDriverBindingStop (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN UINTN NumberOfChildren,\r
- IN EFI_HANDLE *ChildHandleBuffer\r
- );\r
-\r
-//\r
-// Private worker functions\r
-//\r
-\r
-/**\r
- Check for VBE device.\r
-\r
- @param FbGopPrivate Pointer to FB_VIDEO_DEV structure\r
-\r
- @retval EFI_SUCCESS VBE device found\r
-\r
-**/\r
-EFI_STATUS\r
-FbGopCheckForVbe (\r
- IN OUT FB_VIDEO_DEV *FbGopPrivate\r
- );\r
-\r
-\r
-\r
-/**\r
- Release resource for bios video instance.\r
-\r
- @param FbGopPrivate Video child device private data structure\r
-\r
-**/\r
-VOID\r
-FbGopDeviceReleaseResource (\r
- FB_VIDEO_DEV *FbGopPrivate\r
- );\r
-\r
-//\r
-// BIOS Graphics Output Protocol functions\r
-//\r
-\r
-/**\r
- Graphics Output protocol interface to get video mode.\r
-\r
- @param This Protocol instance pointer.\r
- @param ModeNumber The mode number to return information on.\r
- @param SizeOfInfo A pointer to the size, in bytes, of the Info\r
- buffer.\r
- @param Info Caller allocated buffer that returns information\r
- about ModeNumber.\r
-\r
- @retval EFI_SUCCESS Mode information returned.\r
- @retval EFI_BUFFER_TOO_SMALL The Info buffer was too small.\r
- @retval EFI_DEVICE_ERROR A hardware error occurred trying to retrieve the\r
- video mode.\r
- @retval EFI_NOT_STARTED Video display is not initialized. Call SetMode ()\r
- @retval EFI_INVALID_PARAMETER One of the input args was NULL.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopGraphicsOutputQueryMode (\r
- IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
- IN UINT32 ModeNumber,\r
- OUT UINTN *SizeOfInfo,\r
- OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info\r
- );\r
-\r
-\r
-/**\r
- Graphics Output protocol interface to set video mode.\r
-\r
- @param This Protocol instance pointer.\r
- @param ModeNumber The mode number to be set.\r
-\r
- @retval EFI_SUCCESS Graphics mode was changed.\r
- @retval EFI_DEVICE_ERROR The device had an error and could not complete the\r
- request.\r
- @retval EFI_UNSUPPORTED ModeNumber is not supported by this device.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopGraphicsOutputSetMode (\r
- IN EFI_GRAPHICS_OUTPUT_PROTOCOL * This,\r
- IN UINT32 ModeNumber\r
- );\r
-\r
-\r
-/**\r
- Graphics Output protocol instance to block transfer for VBE device.\r
-\r
- @param This Pointer to Graphics Output protocol instance\r
- @param BltBuffer The data to transfer to screen\r
- @param BltOperation The operation to perform\r
- @param SourceX The X coordinate of the source for BltOperation\r
- @param SourceY The Y coordinate of the source for BltOperation\r
- @param DestinationX The X coordinate of the destination for\r
- BltOperation\r
- @param DestinationY The Y coordinate of the destination for\r
- BltOperation\r
- @param Width The width of a rectangle in the blt rectangle in\r
- pixels\r
- @param Height The height of a rectangle in the blt rectangle in\r
- pixels\r
- @param Delta Not used for EfiBltVideoFill and\r
- EfiBltVideoToVideo operation. If a Delta of 0 is\r
- used, the entire BltBuffer will be operated on. If\r
- a subrectangle of the BltBuffer is used, then\r
- Delta represents the number of bytes in a row of\r
- the BltBuffer.\r
-\r
- @retval EFI_INVALID_PARAMETER Invalid parameter passed in\r
- @retval EFI_SUCCESS Blt operation success\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopGraphicsOutputVbeBlt (\r
- IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
- IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer, OPTIONAL\r
- IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation,\r
- IN UINTN SourceX,\r
- IN UINTN SourceY,\r
- IN UINTN DestinationX,\r
- IN UINTN DestinationY,\r
- IN UINTN Width,\r
- IN UINTN Height,\r
- IN UINTN Delta\r
- );\r
-\r
-\r
-/**\r
- Graphics Output protocol instance to block transfer for VGA device.\r
-\r
- @param This Pointer to Graphics Output protocol instance\r
- @param BltBuffer The data to transfer to screen\r
- @param BltOperation The operation to perform\r
- @param SourceX The X coordinate of the source for BltOperation\r
- @param SourceY The Y coordinate of the source for BltOperation\r
- @param DestinationX The X coordinate of the destination for\r
- BltOperation\r
- @param DestinationY The Y coordinate of the destination for\r
- BltOperation\r
- @param Width The width of a rectangle in the blt rectangle in\r
- pixels\r
- @param Height The height of a rectangle in the blt rectangle in\r
- pixels\r
- @param Delta Not used for EfiBltVideoFill and\r
- EfiBltVideoToVideo operation. If a Delta of 0 is\r
- used, the entire BltBuffer will be operated on. If\r
- a subrectangle of the BltBuffer is used, then\r
- Delta represents the number of bytes in a row of\r
- the BltBuffer.\r
-\r
- @retval EFI_INVALID_PARAMETER Invalid parameter passed in\r
- @retval EFI_SUCCESS Blt operation success\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FbGopGraphicsOutputVgaBlt (\r
- IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
- IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer, OPTIONAL\r
- IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation,\r
- IN UINTN SourceX,\r
- IN UINTN SourceY,\r
- IN UINTN DestinationX,\r
- IN UINTN DestinationY,\r
- IN UINTN Width,\r
- IN UINTN Height,\r
- IN UINTN Delta\r
- );\r
-\r
-/**\r
- Install child handles if the Handle supports MBR format.\r
-\r
- @param This Calling context.\r
- @param ParentHandle Parent Handle\r
- @param ParentPciIo Parent PciIo interface\r
- @param ParentLegacyBios Parent LegacyBios interface\r
- @param ParentDevicePath Parent Device Path\r
- @param RemainingDevicePath Remaining Device Path\r
-\r
- @retval EFI_SUCCESS If a child handle was added\r
- @retval other A child handle was not added\r
-\r
-**/\r
-EFI_STATUS\r
-FbGopChildHandleInstall (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE ParentHandle,\r
- IN EFI_PCI_IO_PROTOCOL *ParentPciIo,\r
- IN VOID *ParentLegacyBios,\r
- IN EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
- );\r
-\r
-/**\r
- Deregister an video child handle and free resources.\r
-\r
- @param This Protocol instance pointer.\r
- @param Controller Video controller handle\r
- @param Handle Video child handle\r
-\r
- @return EFI_STATUS\r
-\r
-**/\r
-EFI_STATUS\r
-FbGopChildHandleUninstall (\r
- EFI_DRIVER_BINDING_PROTOCOL *This,\r
- EFI_HANDLE Controller,\r
- EFI_HANDLE Handle\r
- );\r
-\r
-/**\r
- Release resource for bios video instance.\r
-\r
- @param FbGopPrivate Video child device private data structure\r
-\r
-**/\r
-VOID\r
-FbGopDeviceReleaseResource (\r
- FB_VIDEO_DEV *FbGopPrivate\r
- );\r
-\r
-/**\r
- Check if all video child handles have been uninstalled.\r
-\r
- @param Controller Video controller handle\r
-\r
- @return TRUE Child handles exist.\r
- @return FALSE All video child handles have been uninstalled.\r
-\r
-**/\r
-BOOLEAN\r
-HasChildHandle (\r
- IN EFI_HANDLE Controller\r
- );\r
-#endif\r
+++ /dev/null
-## @file\r
-# Video driver based on legacy bios.\r
-#\r
-# This driver by using Legacy Bios protocol service to support csm Video\r
-# and produce Graphics Output Protocol.\r
-#\r
-# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
-#\r
-# SPDX-License-Identifier: BSD-2-Clause-Patent\r
-#\r
-##\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = FbGop\r
- FILE_GUID = 0B04B2ED-861C-42cd-A22F-C3AAFACCB896\r
- MODULE_TYPE = UEFI_DRIVER\r
- VERSION_STRING = 1.0\r
-\r
- ENTRY_POINT = FbGopEntryPoint\r
-\r
-#\r
-# The following information is for reference only and not required by the build tools.\r
-#\r
-# VALID_ARCHITECTURES = IA32 X64 EBC\r
-#\r
-# DRIVER_BINDING = gBiosVideoDriverBinding\r
-# COMPONENT_NAME = gBiosVideoComponentName\r
-#\r
-\r
-[Sources]\r
- FbGop.c\r
- FbGop.h\r
- ComponentName.c\r
- \r
-\r
-[Packages] \r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- CorebootModulePkg/CorebootModulePkg.dec \r
-\r
-[LibraryClasses]\r
- MemoryAllocationLib\r
- DevicePathLib\r
- UefiLib\r
- UefiBootServicesTableLib\r
- UefiDriverEntryPoint\r
- BaseMemoryLib\r
- ReportStatusCodeLib\r
- DebugLib\r
- PcdLib\r
- HobLib\r
- \r
-[Guids]\r
- gUefiFrameBufferInfoGuid\r
- \r
-[Protocols]\r
- gEfiGraphicsOutputProtocolGuid # PROTOCOL BY_START\r
- gEfiPciIoProtocolGuid # PROTOCOL TO_START\r
- gEfiDevicePathProtocolGuid # PROTOCOL TO_START\r
- gEfiEdidDiscoveredProtocolGuid\r
- gEfiEdidActiveProtocolGuid\r
- \r
+++ /dev/null
-/** @file\r
- ACPI Timer implements one instance of Timer Library.\r
-\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#include <PiPei.h>\r
-#include <Library/TimerLib.h>\r
-#include <Library/BaseLib.h>\r
-#include <Library/IoLib.h>\r
-#include <Library/HobLib.h>\r
-#include <Library/DebugLib.h>\r
-\r
-#include <Guid/AcpiBoardInfoGuid.h>\r
-#include <IndustryStandard/Acpi.h>\r
-\r
-#define ACPI_TIMER_COUNT_SIZE BIT24\r
-\r
-UINTN mPmTimerReg = 0;\r
-\r
-/**\r
- The constructor function enables ACPI IO space.\r
-\r
- If ACPI I/O space not enabled, this function will enable it.\r
- It will always return RETURN_SUCCESS.\r
-\r
- @retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-AcpiTimerLibConstructor (\r
- VOID\r
- )\r
-{\r
- EFI_HOB_GUID_TYPE *GuidHob;\r
- ACPI_BOARD_INFO *pAcpiBoardInfo; \r
- \r
- //\r
- // Find the acpi board information guid hob\r
- //\r
- GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);\r
- ASSERT (GuidHob != NULL);\r
- \r
- pAcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob); \r
- \r
- mPmTimerReg = (UINTN)pAcpiBoardInfo->PmTimerRegBase;\r
- \r
- return EFI_SUCCESS;\r
-}\r
-\r
-/**\r
- Internal function to read the current tick counter of ACPI.\r
-\r
- Internal function to read the current tick counter of ACPI.\r
-\r
- @return The tick counter read.\r
-\r
-**/\r
-UINT32\r
-InternalAcpiGetTimerTick (\r
- VOID\r
- )\r
-{\r
- if (mPmTimerReg == 0)\r
- AcpiTimerLibConstructor ();\r
- \r
- return IoRead32 (mPmTimerReg);\r
-}\r
-\r
-/**\r
- Stalls the CPU for at least the given number of ticks.\r
-\r
- Stalls the CPU for at least the given number of ticks. It's invoked by\r
- MicroSecondDelay() and NanoSecondDelay().\r
-\r
- @param Delay A period of time to delay in ticks.\r
-\r
-**/\r
-VOID\r
-InternalAcpiDelay (\r
- IN UINT32 Delay\r
- )\r
-{\r
- UINT32 Ticks;\r
- UINT32 Times;\r
-\r
- Times = Delay >> 22;\r
- Delay &= BIT22 - 1;\r
- do {\r
- //\r
- // The target timer count is calculated here\r
- //\r
- Ticks = InternalAcpiGetTimerTick () + Delay;\r
- Delay = BIT22;\r
- //\r
- // Wait until time out\r
- // Delay >= 2^23 could not be handled by this function\r
- // Timer wrap-arounds are handled correctly by this function\r
- //\r
- while (((Ticks - InternalAcpiGetTimerTick ()) & BIT23) == 0) {\r
- CpuPause ();\r
- }\r
- } while (Times-- > 0);\r
-}\r
-\r
-/**\r
- Stalls the CPU for at least the given number of microseconds.\r
-\r
- Stalls the CPU for the number of microseconds specified by MicroSeconds.\r
-\r
- @param MicroSeconds The minimum number of microseconds to delay.\r
-\r
- @return MicroSeconds\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-MicroSecondDelay (\r
- IN UINTN MicroSeconds\r
- )\r
-{\r
- InternalAcpiDelay (\r
- (UINT32)DivU64x32 (\r
- MultU64x32 (\r
- MicroSeconds,\r
- ACPI_TIMER_FREQUENCY\r
- ),\r
- 1000000u\r
- )\r
- );\r
- return MicroSeconds;\r
-}\r
-\r
-/**\r
- Stalls the CPU for at least the given number of nanoseconds.\r
-\r
- Stalls the CPU for the number of nanoseconds specified by NanoSeconds.\r
-\r
- @param NanoSeconds The minimum number of nanoseconds to delay.\r
-\r
- @return NanoSeconds\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-NanoSecondDelay (\r
- IN UINTN NanoSeconds\r
- )\r
-{\r
- InternalAcpiDelay (\r
- (UINT32)DivU64x32 (\r
- MultU64x32 (\r
- NanoSeconds,\r
- ACPI_TIMER_FREQUENCY\r
- ),\r
- 1000000000u\r
- )\r
- );\r
- return NanoSeconds;\r
-}\r
-\r
-/**\r
- Retrieves the current value of a 64-bit free running performance counter.\r
-\r
- Retrieves the current value of a 64-bit free running performance counter. The\r
- counter can either count up by 1 or count down by 1. If the physical\r
- performance counter counts by a larger increment, then the counter values\r
- must be translated. The properties of the counter can be retrieved from\r
- GetPerformanceCounterProperties().\r
-\r
- @return The current value of the free running performance counter.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-GetPerformanceCounter (\r
- VOID\r
- )\r
-{\r
- return (UINT64)InternalAcpiGetTimerTick ();\r
-}\r
-\r
-/**\r
- Retrieves the 64-bit frequency in Hz and the range of performance counter\r
- values.\r
-\r
- If StartValue is not NULL, then the value that the performance counter starts\r
- with immediately after is it rolls over is returned in StartValue. If\r
- EndValue is not NULL, then the value that the performance counter end with\r
- immediately before it rolls over is returned in EndValue. The 64-bit\r
- frequency of the performance counter in Hz is always returned. If StartValue\r
- is less than EndValue, then the performance counter counts up. If StartValue\r
- is greater than EndValue, then the performance counter counts down. For\r
- example, a 64-bit free running counter that counts up would have a StartValue\r
- of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter\r
- that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.\r
-\r
- @param StartValue The value the performance counter starts with when it\r
- rolls over.\r
- @param EndValue The value that the performance counter ends with before\r
- it rolls over.\r
-\r
- @return The frequency in Hz.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-GetPerformanceCounterProperties (\r
- OUT UINT64 *StartValue, OPTIONAL\r
- OUT UINT64 *EndValue OPTIONAL\r
- )\r
-{\r
- if (StartValue != NULL) {\r
- *StartValue = 0;\r
- }\r
-\r
- if (EndValue != NULL) {\r
- *EndValue = ACPI_TIMER_COUNT_SIZE - 1;\r
- }\r
-\r
- return ACPI_TIMER_FREQUENCY;\r
-}\r
-\r
-/**\r
- Converts elapsed ticks of performance counter to time in nanoseconds.\r
-\r
- This function converts the elapsed ticks of running performance counter to\r
- time value in unit of nanoseconds.\r
-\r
- @param Ticks The number of elapsed ticks of running performance counter.\r
-\r
- @return The elapsed time in nanoseconds.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-GetTimeInNanoSecond (\r
- IN UINT64 Ticks\r
- )\r
-{\r
- UINT64 Frequency;\r
- UINT64 NanoSeconds;\r
- UINT64 Remainder;\r
- INTN Shift;\r
-\r
- Frequency = GetPerformanceCounterProperties (NULL, NULL);\r
-\r
- //\r
- // Ticks\r
- // Time = --------- x 1,000,000,000\r
- // Frequency\r
- //\r
- NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);\r
-\r
- //\r
- // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.\r
- // Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,\r
- // i.e. highest bit set in Remainder should <= 33.\r
- //\r
- Shift = MAX (0, HighBitSet64 (Remainder) - 33);\r
- Remainder = RShiftU64 (Remainder, (UINTN) Shift);\r
- Frequency = RShiftU64 (Frequency, (UINTN) Shift);\r
- NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);\r
-\r
- return NanoSeconds;\r
-}\r
-\r
+++ /dev/null
-## @file\r
-# ACPI Timer Library Instance.\r
-#\r
-# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
-# SPDX-License-Identifier: BSD-2-Clause-Patent\r
-#\r
-##\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = AcpiTimerLib\r
- FILE_GUID = A41BF616-EF77-4658-9992-D813071C34CF\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = TimerLib\r
-\r
- CONSTRUCTOR = AcpiTimerLibConstructor\r
-\r
-#\r
-# The following information is for reference only and not required by the build tools.\r
-#\r
-# VALID_ARCHITECTURES = IA32 X64 EBC\r
-#\r
-\r
-[Sources]\r
- AcpiTimerLib.c\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- CorebootModulePkg/CorebootModulePkg.dec\r
-\r
-[LibraryClasses] \r
- BaseLib\r
- IoLib\r
- HobLib\r
- DebugLib\r
- \r
-[Guids] \r
- gUefiAcpiBoardInfoGuid\r
+++ /dev/null
-/** @file\r
- Header file of PciHostBridgeLib.\r
-\r
- Copyright (C) 2016, Red Hat, Inc.\r
- Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
-\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#ifndef _PCI_HOST_BRIDGE_H\r
-#define _PCI_HOST_BRIDGE_H\r
-\r
-typedef struct {\r
- ACPI_HID_DEVICE_PATH AcpiDevicePath;\r
- EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
-} CB_PCI_ROOT_BRIDGE_DEVICE_PATH;\r
-\r
-PCI_ROOT_BRIDGE *\r
-ScanForRootBridges (\r
- UINTN *NumberOfRootBridges\r
-);\r
-\r
-/**\r
- Initialize a PCI_ROOT_BRIDGE structure.\r
-\r
- @param[in] Supports Supported attributes.\r
-\r
- @param[in] Attributes Initial attributes.\r
-\r
- @param[in] AllocAttributes Allocation attributes.\r
-\r
- @param[in] RootBusNumber The bus number to store in RootBus.\r
-\r
- @param[in] MaxSubBusNumber The inclusive maximum bus number that can be\r
- assigned to any subordinate bus found behind any\r
- PCI bridge hanging off this root bus.\r
-\r
- The caller is responsible for ensuring that\r
- RootBusNumber <= MaxSubBusNumber. If\r
- RootBusNumber equals MaxSubBusNumber, then the\r
- root bus has no room for subordinate buses.\r
-\r
- @param[in] Io IO aperture.\r
-\r
- @param[in] Mem MMIO aperture.\r
-\r
- @param[in] MemAbove4G MMIO aperture above 4G.\r
-\r
- @param[in] PMem Prefetchable MMIO aperture.\r
-\r
- @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G.\r
-\r
- @param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated by the\r
- caller) that should be filled in by this\r
- function.\r
-\r
- @retval EFI_SUCCESS Initialization successful. A device path\r
- consisting of an ACPI device path node, with\r
- UID = RootBusNumber, has been allocated and\r
- linked into RootBus.\r
-\r
- @retval EFI_OUT_OF_RESOURCES Memory allocation failed.\r
-**/\r
-EFI_STATUS\r
-InitRootBridge (\r
- IN UINT64 Supports,\r
- IN UINT64 Attributes,\r
- IN UINT64 AllocAttributes,\r
- IN UINT8 RootBusNumber,\r
- IN UINT8 MaxSubBusNumber,\r
- IN PCI_ROOT_BRIDGE_APERTURE *Io,\r
- IN PCI_ROOT_BRIDGE_APERTURE *Mem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,\r
- OUT PCI_ROOT_BRIDGE *RootBus\r
-);\r
-\r
-#endif\r
+++ /dev/null
-/** @file\r
- Library instance of PciHostBridgeLib library class for coreboot.\r
-\r
- Copyright (C) 2016, Red Hat, Inc.\r
- Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
-\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-#include <PiDxe.h>\r
-\r
-#include <IndustryStandard/Pci.h>\r
-#include <Protocol/PciHostBridgeResourceAllocation.h>\r
-#include <Protocol/PciRootBridgeIo.h>\r
-\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/DevicePathLib.h>\r
-#include <Library/MemoryAllocationLib.h>\r
-#include <Library/PciHostBridgeLib.h>\r
-#include <Library/PciLib.h>\r
-\r
-#include "PciHostBridge.h"\r
-\r
-STATIC\r
-CONST\r
-CB_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = {\r
- {\r
- {\r
- ACPI_DEVICE_PATH,\r
- ACPI_DP,\r
- {\r
- (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),\r
- (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)\r
- }\r
- },\r
- EISA_PNP_ID(0x0A03), // HID\r
- 0 // UID\r
- },\r
-\r
- {\r
- END_DEVICE_PATH_TYPE,\r
- END_ENTIRE_DEVICE_PATH_SUBTYPE,\r
- {\r
- END_DEVICE_PATH_LENGTH,\r
- 0\r
- }\r
- }\r
-};\r
-\r
-\r
-/**\r
- Initialize a PCI_ROOT_BRIDGE structure.\r
-\r
- @param[in] Supports Supported attributes.\r
-\r
- @param[in] Attributes Initial attributes.\r
-\r
- @param[in] AllocAttributes Allocation attributes.\r
-\r
- @param[in] RootBusNumber The bus number to store in RootBus.\r
-\r
- @param[in] MaxSubBusNumber The inclusive maximum bus number that can be\r
- assigned to any subordinate bus found behind any\r
- PCI bridge hanging off this root bus.\r
-\r
- The caller is responsible for ensuring that\r
- RootBusNumber <= MaxSubBusNumber. If\r
- RootBusNumber equals MaxSubBusNumber, then the\r
- root bus has no room for subordinate buses.\r
-\r
- @param[in] Io IO aperture.\r
-\r
- @param[in] Mem MMIO aperture.\r
-\r
- @param[in] MemAbove4G MMIO aperture above 4G.\r
-\r
- @param[in] PMem Prefetchable MMIO aperture.\r
-\r
- @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G.\r
-\r
- @param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated by the\r
- caller) that should be filled in by this\r
- function.\r
-\r
- @retval EFI_SUCCESS Initialization successful. A device path\r
- consisting of an ACPI device path node, with\r
- UID = RootBusNumber, has been allocated and\r
- linked into RootBus.\r
-\r
- @retval EFI_OUT_OF_RESOURCES Memory allocation failed.\r
-**/\r
-EFI_STATUS\r
-InitRootBridge (\r
- IN UINT64 Supports,\r
- IN UINT64 Attributes,\r
- IN UINT64 AllocAttributes,\r
- IN UINT8 RootBusNumber,\r
- IN UINT8 MaxSubBusNumber,\r
- IN PCI_ROOT_BRIDGE_APERTURE *Io,\r
- IN PCI_ROOT_BRIDGE_APERTURE *Mem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,\r
- OUT PCI_ROOT_BRIDGE *RootBus\r
-)\r
-{\r
- CB_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;\r
-\r
- //\r
- // Be safe if other fields are added to PCI_ROOT_BRIDGE later.\r
- //\r
- ZeroMem (RootBus, sizeof *RootBus);\r
-\r
- RootBus->Segment = 0;\r
-\r
- RootBus->Supports = Supports;\r
- RootBus->Attributes = Attributes;\r
-\r
- RootBus->DmaAbove4G = FALSE;\r
-\r
- RootBus->AllocationAttributes = AllocAttributes;\r
- RootBus->Bus.Base = RootBusNumber;\r
- RootBus->Bus.Limit = MaxSubBusNumber;\r
- CopyMem (&RootBus->Io, Io, sizeof (*Io));\r
- CopyMem (&RootBus->Mem, Mem, sizeof (*Mem));\r
- CopyMem (&RootBus->MemAbove4G, MemAbove4G, sizeof (*MemAbove4G));\r
- CopyMem (&RootBus->PMem, PMem, sizeof (*PMem));\r
- CopyMem (&RootBus->PMemAbove4G, PMemAbove4G, sizeof (*PMemAbove4G));\r
-\r
- RootBus->NoExtendedConfigSpace = FALSE;\r
-\r
- DevicePath = AllocateCopyPool (sizeof (mRootBridgeDevicePathTemplate),\r
- &mRootBridgeDevicePathTemplate);\r
- if (DevicePath == NULL) {\r
- DEBUG ((EFI_D_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES));\r
- return EFI_OUT_OF_RESOURCES;\r
- }\r
- DevicePath->AcpiDevicePath.UID = RootBusNumber;\r
- RootBus->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePath;\r
-\r
- DEBUG ((EFI_D_INFO,\r
- "%a: populated root bus %d, with room for %d subordinate bus(es)\n",\r
- __FUNCTION__, RootBusNumber, MaxSubBusNumber - RootBusNumber));\r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-/**\r
- Return all the root bridge instances in an array.\r
-\r
- @param Count Return the count of root bridge instances.\r
-\r
- @return All the root bridge instances in an array.\r
- The array should be passed into PciHostBridgeFreeRootBridges()\r
- when it's not used.\r
-**/\r
-PCI_ROOT_BRIDGE *\r
-EFIAPI\r
-PciHostBridgeGetRootBridges (\r
- UINTN *Count\r
-)\r
-{\r
- return ScanForRootBridges (Count);\r
-}\r
-\r
-\r
-/**\r
- Free the root bridge instances array returned from\r
- PciHostBridgeGetRootBridges().\r
-\r
- @param The root bridge instances array.\r
- @param The count of the array.\r
-**/\r
-VOID\r
-EFIAPI\r
-PciHostBridgeFreeRootBridges (\r
- PCI_ROOT_BRIDGE *Bridges,\r
- UINTN Count\r
-)\r
-{\r
- if (Bridges == NULL && Count == 0) {\r
- return;\r
- }\r
- ASSERT (Bridges != NULL && Count > 0);\r
-\r
- do {\r
- --Count;\r
- FreePool (Bridges[Count].DevicePath);\r
- } while (Count > 0);\r
-\r
- FreePool (Bridges);\r
-}\r
-\r
-\r
-/**\r
- Inform the platform that the resource conflict happens.\r
-\r
- @param HostBridgeHandle Handle of the Host Bridge.\r
- @param Configuration Pointer to PCI I/O and PCI memory resource\r
- descriptors. The Configuration contains the resources\r
- for all the root bridges. The resource for each root\r
- bridge is terminated with END descriptor and an\r
- additional END is appended indicating the end of the\r
- entire resources. The resource descriptor field\r
- values follow the description in\r
- EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
- .SubmitResources().\r
-**/\r
-VOID\r
-EFIAPI\r
-PciHostBridgeResourceConflict (\r
- EFI_HANDLE HostBridgeHandle,\r
- VOID *Configuration\r
-)\r
-{\r
- //\r
- // coreboot UEFI Payload does not do PCI enumeration and should not call this\r
- // library interface.\r
- //\r
- ASSERT (FALSE);\r
-}\r
+++ /dev/null
-## @file\r
-# Library instance of PciHostBridgeLib library class for coreboot.\r
-#\r
-# Copyright (C) 2016, Red Hat, Inc.\r
-# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>\r
-#\r
-# SPDX-License-Identifier: BSD-2-Clause-Patent\r
-#\r
-#\r
-##\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = PciHostBridgeLib\r
- FILE_GUID = 62EE5269-CFFD-43a3-BE3F-622FC79F467E\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = PciHostBridgeLib\r
-\r
-#\r
-# The following information is for reference only and not required by the build\r
-# tools.\r
-#\r
-# VALID_ARCHITECTURES = IA32 X64 EBC\r
-#\r
-\r
-[Sources]\r
- PciHostBridge.h\r
- PciHostBridgeLib.c\r
- PciHostBridgeSupport.c\r
-\r
-[Packages]\r
- MdeModulePkg/MdeModulePkg.dec\r
- MdePkg/MdePkg.dec\r
-\r
-[LibraryClasses]\r
- BaseMemoryLib\r
- DebugLib\r
- DevicePathLib\r
- MemoryAllocationLib\r
- PciLib\r
+++ /dev/null
-/** @file\r
- Scan the entire PCI bus for root bridges to support coreboot UEFI payload.\r
-\r
- Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
-\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#include <PiDxe.h>\r
-#include <IndustryStandard/Pci.h>\r
-#include <Protocol/PciHostBridgeResourceAllocation.h>\r
-#include <Protocol/PciRootBridgeIo.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/MemoryAllocationLib.h>\r
-#include <Library/PciHostBridgeLib.h>\r
-#include <Library/PciLib.h>\r
-#include "PciHostBridge.h"\r
-\r
-/**\r
- Adjust the collected PCI resource.\r
-\r
- @param[in] Io IO aperture.\r
-\r
- @param[in] Mem MMIO aperture.\r
-\r
- @param[in] MemAbove4G MMIO aperture above 4G.\r
-\r
- @param[in] PMem Prefetchable MMIO aperture.\r
-\r
- @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G.\r
-**/\r
-VOID\r
-AdjustRootBridgeResource (\r
- IN PCI_ROOT_BRIDGE_APERTURE *Io,\r
- IN PCI_ROOT_BRIDGE_APERTURE *Mem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G\r
-)\r
-{\r
- UINT64 Mask;\r
-\r
- //\r
- // For now try to downgrade everything into MEM32 since\r
- // - coreboot does not assign resource above 4GB\r
- // - coreboot might allocate interleaved MEM32 and PMEM32 resource\r
- // in some cases\r
- //\r
- if (PMem->Base < Mem->Base) {\r
- Mem->Base = PMem->Base;\r
- }\r
-\r
- if (PMem->Limit > Mem->Limit) {\r
- Mem->Limit = PMem->Limit;\r
- }\r
-\r
- PMem->Base = MAX_UINT64;\r
- PMem->Limit = 0;\r
-\r
- if (MemAbove4G->Base < 0x100000000ULL) {\r
- if (MemAbove4G->Base < Mem->Base) {\r
- Mem->Base = MemAbove4G->Base;\r
- }\r
- if (MemAbove4G->Limit > Mem->Limit) {\r
- Mem->Limit = MemAbove4G->Limit;\r
- }\r
- MemAbove4G->Base = MAX_UINT64;\r
- MemAbove4G->Limit = 0;\r
- }\r
-\r
- if (PMemAbove4G->Base < 0x100000000ULL) {\r
- if (PMemAbove4G->Base < Mem->Base) {\r
- Mem->Base = PMemAbove4G->Base;\r
- }\r
- if (PMemAbove4G->Limit > Mem->Limit) {\r
- Mem->Limit = PMemAbove4G->Limit;\r
- }\r
- PMemAbove4G->Base = MAX_UINT64;\r
- PMemAbove4G->Limit = 0;\r
- }\r
-\r
- //\r
- // Align IO resource at 4K boundary\r
- //\r
- Mask = 0xFFFULL;\r
- Io->Limit = ((Io->Limit + Mask) & ~Mask) - 1;\r
- if (Io->Base != MAX_UINT64) {\r
- Io->Base &= ~Mask;\r
- }\r
-\r
- //\r
- // Align MEM resource at 1MB boundary\r
- //\r
- Mask = 0xFFFFFULL;\r
- Mem->Limit = ((Mem->Limit + Mask) & ~Mask) - 1;\r
- if (Mem->Base != MAX_UINT64) {\r
- Mem->Base &= ~Mask;\r
- }\r
-}\r
-\r
-/**\r
- Probe a bar is existed or not.\r
-\r
- @param[in] Address PCI address for the BAR.\r
- @param[out] OriginalValue The original bar value returned.\r
- @param[out] Value The probed bar value returned.\r
-**/\r
-STATIC\r
-VOID\r
-PcatPciRootBridgeBarExisted (\r
- IN UINT64 Address,\r
- OUT UINT32 *OriginalValue,\r
- OUT UINT32 *Value\r
-)\r
-{\r
- UINTN PciAddress;\r
-\r
- PciAddress = (UINTN)Address;\r
-\r
- //\r
- // Preserve the original value\r
- //\r
- *OriginalValue = PciRead32 (PciAddress);\r
-\r
- //\r
- // Disable timer interrupt while the BAR is probed\r
- //\r
- DisableInterrupts ();\r
-\r
- PciWrite32 (PciAddress, 0xFFFFFFFF);\r
- *Value = PciRead32 (PciAddress);\r
- PciWrite32 (PciAddress, *OriginalValue);\r
-\r
- //\r
- // Enable interrupt\r
- //\r
- EnableInterrupts ();\r
-}\r
-\r
-/**\r
- Parse PCI bar and collect the assigned PCI resource information.\r
-\r
- @param[in] Command Supported attributes.\r
-\r
- @param[in] Bus PCI bus number.\r
-\r
- @param[in] Device PCI device number.\r
-\r
- @param[in] Function PCI function number.\r
-\r
- @param[in] BarOffsetBase PCI bar start offset.\r
-\r
- @param[in] BarOffsetEnd PCI bar end offset.\r
-\r
- @param[in] Io IO aperture.\r
-\r
- @param[in] Mem MMIO aperture.\r
-\r
- @param[in] MemAbove4G MMIO aperture above 4G.\r
-\r
- @param[in] PMem Prefetchable MMIO aperture.\r
-\r
- @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G.\r
-**/\r
-STATIC\r
-VOID\r
-PcatPciRootBridgeParseBars (\r
- IN UINT16 Command,\r
- IN UINTN Bus,\r
- IN UINTN Device,\r
- IN UINTN Function,\r
- IN UINTN BarOffsetBase,\r
- IN UINTN BarOffsetEnd,\r
- IN PCI_ROOT_BRIDGE_APERTURE *Io,\r
- IN PCI_ROOT_BRIDGE_APERTURE *Mem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G\r
-\r
-)\r
-{\r
- UINT32 OriginalValue;\r
- UINT32 Value;\r
- UINT32 OriginalUpperValue;\r
- UINT32 UpperValue;\r
- UINT64 Mask;\r
- UINTN Offset;\r
- UINTN LowBit;\r
- UINT64 Base;\r
- UINT64 Length;\r
- UINT64 Limit;\r
- PCI_ROOT_BRIDGE_APERTURE *MemAperture;\r
-\r
- for (Offset = BarOffsetBase; Offset < BarOffsetEnd; Offset += sizeof (UINT32)) {\r
- PcatPciRootBridgeBarExisted (\r
- PCI_LIB_ADDRESS (Bus, Device, Function, Offset),\r
- &OriginalValue, &Value\r
- );\r
- if (Value == 0) {\r
- continue;\r
- }\r
- if ((Value & BIT0) == BIT0) {\r
- //\r
- // IO Bar\r
- //\r
- if (Command & EFI_PCI_COMMAND_IO_SPACE) {\r
- Mask = 0xfffffffc;\r
- Base = OriginalValue & Mask;\r
- Length = ((~(Value & Mask)) & Mask) + 0x04;\r
- if (!(Value & 0xFFFF0000)) {\r
- Length &= 0x0000FFFF;\r
- }\r
- Limit = Base + Length - 1;\r
-\r
- if ((Base > 0) && (Base < Limit)) {\r
- if (Io->Base > Base) {\r
- Io->Base = Base;\r
- }\r
- if (Io->Limit < Limit) {\r
- Io->Limit = Limit;\r
- }\r
- }\r
- }\r
- } else {\r
- //\r
- // Mem Bar\r
- //\r
- if (Command & EFI_PCI_COMMAND_MEMORY_SPACE) {\r
-\r
- Mask = 0xfffffff0;\r
- Base = OriginalValue & Mask;\r
- Length = Value & Mask;\r
-\r
- if ((Value & (BIT1 | BIT2)) == 0) {\r
- //\r
- // 32bit\r
- //\r
- Length = ((~Length) + 1) & 0xffffffff;\r
-\r
- if ((Value & BIT3) == BIT3) {\r
- MemAperture = PMem;\r
- } else {\r
- MemAperture = Mem;\r
- }\r
- } else {\r
- //\r
- // 64bit\r
- //\r
- Offset += 4;\r
- PcatPciRootBridgeBarExisted (\r
- PCI_LIB_ADDRESS (Bus, Device, Function, Offset),\r
- &OriginalUpperValue,\r
- &UpperValue\r
- );\r
-\r
- Base = Base | LShiftU64 ((UINT64) OriginalUpperValue, 32);\r
- Length = Length | LShiftU64 ((UINT64) UpperValue, 32);\r
- if (Length != 0) {\r
- LowBit = LowBitSet64 (Length);\r
- Length = LShiftU64 (1ULL, LowBit);\r
- }\r
-\r
- if ((Value & BIT3) == BIT3) {\r
- MemAperture = PMemAbove4G;\r
- } else {\r
- MemAperture = MemAbove4G;\r
- }\r
- }\r
-\r
- Limit = Base + Length - 1;\r
- if ((Base > 0) && (Base < Limit)) {\r
- if (MemAperture->Base > Base) {\r
- MemAperture->Base = Base;\r
- }\r
- if (MemAperture->Limit < Limit) {\r
- MemAperture->Limit = Limit;\r
- }\r
- }\r
- }\r
- }\r
- }\r
-}\r
-\r
-/**\r
- Scan for all root bridges in platform.\r
-\r
- @param[out] NumberOfRootBridges Number of root bridges detected\r
-\r
- @retval Pointer to the allocated PCI_ROOT_BRIDGE structure array.\r
-**/\r
-PCI_ROOT_BRIDGE *\r
-ScanForRootBridges (\r
- OUT UINTN *NumberOfRootBridges\r
-)\r
-{\r
- UINTN PrimaryBus;\r
- UINTN SubBus;\r
- UINT8 Device;\r
- UINT8 Function;\r
- UINTN NumberOfDevices;\r
- UINTN Address;\r
- PCI_TYPE01 Pci;\r
- UINT64 Attributes;\r
- UINT64 Base;\r
- UINT64 Limit;\r
- UINT64 Value;\r
- PCI_ROOT_BRIDGE_APERTURE Io, Mem, MemAbove4G, PMem, PMemAbove4G, *MemAperture;\r
- PCI_ROOT_BRIDGE *RootBridges;\r
- UINTN BarOffsetEnd;\r
-\r
-\r
- *NumberOfRootBridges = 0;\r
- RootBridges = NULL;\r
-\r
- //\r
- // After scanning all the PCI devices on the PCI root bridge's primary bus,\r
- // update the Primary Bus Number for the next PCI root bridge to be this PCI\r
- // root bridge's subordinate bus number + 1.\r
- //\r
- for (PrimaryBus = 0; PrimaryBus <= PCI_MAX_BUS; PrimaryBus = SubBus + 1) {\r
- SubBus = PrimaryBus;\r
- Attributes = 0;\r
-\r
- ZeroMem (&Io, sizeof (Io));\r
- ZeroMem (&Mem, sizeof (Mem));\r
- ZeroMem (&MemAbove4G, sizeof (MemAbove4G));\r
- ZeroMem (&PMem, sizeof (PMem));\r
- ZeroMem (&PMemAbove4G, sizeof (PMemAbove4G));\r
- Io.Base = Mem.Base = MemAbove4G.Base = PMem.Base = PMemAbove4G.Base = MAX_UINT64;\r
- //\r
- // Scan all the PCI devices on the primary bus of the PCI root bridge\r
- //\r
- for (Device = 0, NumberOfDevices = 0; Device <= PCI_MAX_DEVICE; Device++) {\r
-\r
- for (Function = 0; Function <= PCI_MAX_FUNC; Function++) {\r
-\r
- //\r
- // Compute the PCI configuration address of the PCI device to probe\r
- //\r
- Address = PCI_LIB_ADDRESS (PrimaryBus, Device, Function, 0);\r
-\r
- //\r
- // Read the Vendor ID from the PCI Configuration Header\r
- //\r
- if (PciRead16 (Address) == MAX_UINT16) {\r
- if (Function == 0) {\r
- //\r
- // If the PCI Configuration Read fails, or a PCI device does not\r
- // exist, then skip this entire PCI device\r
- //\r
- break;\r
- } else {\r
- //\r
- // If PCI function != 0, VendorId == 0xFFFF, we continue to search\r
- // PCI function.\r
- //\r
- continue;\r
- }\r
- }\r
-\r
- //\r
- // Read the entire PCI Configuration Header\r
- //\r
- PciReadBuffer (Address, sizeof (Pci), &Pci);\r
-\r
- //\r
- // Increment the number of PCI device found on the primary bus of the\r
- // PCI root bridge\r
- //\r
- NumberOfDevices++;\r
-\r
- //\r
- // Look for devices with the VGA Palette Snoop enabled in the COMMAND\r
- // register of the PCI Config Header\r
- //\r
- if ((Pci.Hdr.Command & EFI_PCI_COMMAND_VGA_PALETTE_SNOOP) != 0) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;\r
- }\r
-\r
- BarOffsetEnd = 0;\r
-\r
- //\r
- // PCI-PCI Bridge\r
- //\r
- if (IS_PCI_BRIDGE (&Pci)) {\r
- //\r
- // Get the Bus range that the PPB is decoding\r
- //\r
- if (Pci.Bridge.SubordinateBus > SubBus) {\r
- //\r
- // If the subordinate bus number of the PCI-PCI bridge is greater\r
- // than the PCI root bridge's current subordinate bus number,\r
- // then update the PCI root bridge's subordinate bus number\r
- //\r
- SubBus = Pci.Bridge.SubordinateBus;\r
- }\r
-\r
- //\r
- // Get the I/O range that the PPB is decoding\r
- //\r
- Value = Pci.Bridge.IoBase & 0x0f;\r
- Base = ((UINT32) Pci.Bridge.IoBase & 0xf0) << 8;\r
- Limit = (((UINT32) Pci.Bridge.IoLimit & 0xf0) << 8) | 0x0fff;\r
- if (Value == BIT0) {\r
- Base |= ((UINT32) Pci.Bridge.IoBaseUpper16 << 16);\r
- Limit |= ((UINT32) Pci.Bridge.IoLimitUpper16 << 16);\r
- }\r
- if ((Base > 0) && (Base < Limit)) {\r
- if (Io.Base > Base) {\r
- Io.Base = Base;\r
- }\r
- if (Io.Limit < Limit) {\r
- Io.Limit = Limit;\r
- }\r
- }\r
-\r
- //\r
- // Get the Memory range that the PPB is decoding\r
- //\r
- Base = ((UINT32) Pci.Bridge.MemoryBase & 0xfff0) << 16;\r
- Limit = (((UINT32) Pci.Bridge.MemoryLimit & 0xfff0) << 16) | 0xfffff;\r
- if ((Base > 0) && (Base < Limit)) {\r
- if (Mem.Base > Base) {\r
- Mem.Base = Base;\r
- }\r
- if (Mem.Limit < Limit) {\r
- Mem.Limit = Limit;\r
- }\r
- }\r
-\r
- //\r
- // Get the Prefetchable Memory range that the PPB is decoding\r
- //\r
- Value = Pci.Bridge.PrefetchableMemoryBase & 0x0f;\r
- Base = ((UINT32) Pci.Bridge.PrefetchableMemoryBase & 0xfff0) << 16;\r
- Limit = (((UINT32) Pci.Bridge.PrefetchableMemoryLimit & 0xfff0)\r
- << 16) | 0xfffff;\r
- MemAperture = &PMem;\r
- if (Value == BIT0) {\r
- Base |= LShiftU64 (Pci.Bridge.PrefetchableBaseUpper32, 32);\r
- Limit |= LShiftU64 (Pci.Bridge.PrefetchableLimitUpper32, 32);\r
- MemAperture = &PMemAbove4G;\r
- }\r
- if ((Base > 0) && (Base < Limit)) {\r
- if (MemAperture->Base > Base) {\r
- MemAperture->Base = Base;\r
- }\r
- if (MemAperture->Limit < Limit) {\r
- MemAperture->Limit = Limit;\r
- }\r
- }\r
-\r
- //\r
- // Look at the PPB Configuration for legacy decoding attributes\r
- //\r
- if ((Pci.Bridge.BridgeControl & EFI_PCI_BRIDGE_CONTROL_ISA)\r
- == EFI_PCI_BRIDGE_CONTROL_ISA) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO;\r
- Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO_16;\r
- Attributes |= EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO;\r
- }\r
- if ((Pci.Bridge.BridgeControl & EFI_PCI_BRIDGE_CONTROL_VGA)\r
- == EFI_PCI_BRIDGE_CONTROL_VGA) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;\r
- if ((Pci.Bridge.BridgeControl & EFI_PCI_BRIDGE_CONTROL_VGA_16)\r
- != 0) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO_16;\r
- }\r
- }\r
-\r
- BarOffsetEnd = OFFSET_OF (PCI_TYPE01, Bridge.Bar[2]);\r
- } else {\r
- //\r
- // Parse the BARs of the PCI device to get what I/O Ranges, Memory\r
- // Ranges, and Prefetchable Memory Ranges the device is decoding\r
- //\r
- if ((Pci.Hdr.HeaderType & HEADER_LAYOUT_CODE) == HEADER_TYPE_DEVICE) {\r
- BarOffsetEnd = OFFSET_OF (PCI_TYPE00, Device.Bar[6]);\r
- }\r
- }\r
-\r
- PcatPciRootBridgeParseBars (\r
- Pci.Hdr.Command,\r
- PrimaryBus,\r
- Device,\r
- Function,\r
- OFFSET_OF (PCI_TYPE00, Device.Bar),\r
- BarOffsetEnd,\r
- &Io,\r
- &Mem, &MemAbove4G,\r
- &PMem, &PMemAbove4G\r
- );\r
-\r
- //\r
- // See if the PCI device is an IDE controller\r
- //\r
- if (IS_CLASS2 (&Pci, PCI_CLASS_MASS_STORAGE,\r
- PCI_CLASS_MASS_STORAGE_IDE)) {\r
- if (Pci.Hdr.ClassCode[0] & 0x80) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO;\r
- Attributes |= EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO;\r
- }\r
- if (Pci.Hdr.ClassCode[0] & 0x01) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO;\r
- }\r
- if (Pci.Hdr.ClassCode[0] & 0x04) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO;\r
- }\r
- }\r
-\r
- //\r
- // See if the PCI device is a legacy VGA controller or\r
- // a standard VGA controller\r
- //\r
- if (IS_CLASS2 (&Pci, PCI_CLASS_OLD, PCI_CLASS_OLD_VGA) ||\r
- IS_CLASS2 (&Pci, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA)\r
- ) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;\r
- Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO_16;\r
- }\r
-\r
- //\r
- // See if the PCI Device is a PCI - ISA or PCI - EISA\r
- // or ISA_POSITIVE_DECODE Bridge device\r
- //\r
- if (Pci.Hdr.ClassCode[2] == PCI_CLASS_BRIDGE) {\r
- if (Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA ||\r
- Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_EISA ||\r
- Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA_PDECODE) {\r
- Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO;\r
- Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO_16;\r
- Attributes |= EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO;\r
- }\r
- }\r
-\r
- //\r
- // If this device is not a multi function device, then skip the rest\r
- // of this PCI device\r
- //\r
- if (Function == 0 && !IS_PCI_MULTI_FUNC (&Pci)) {\r
- break;\r
- }\r
- }\r
- }\r
-\r
- //\r
- // If at least one PCI device was found on the primary bus of this PCI\r
- // root bridge, then the PCI root bridge exists.\r
- //\r
- if (NumberOfDevices > 0) {\r
- RootBridges = ReallocatePool (\r
- (*NumberOfRootBridges) * sizeof (PCI_ROOT_BRIDGE),\r
- (*NumberOfRootBridges + 1) * sizeof (PCI_ROOT_BRIDGE),\r
- RootBridges\r
- );\r
- ASSERT (RootBridges != NULL);\r
-\r
- AdjustRootBridgeResource (&Io, &Mem, &MemAbove4G, &PMem, &PMemAbove4G);\r
-\r
- InitRootBridge (\r
- Attributes, Attributes, 0,\r
- (UINT8) PrimaryBus, (UINT8) SubBus,\r
- &Io, &Mem, &MemAbove4G, &PMem, &PMemAbove4G,\r
- &RootBridges[*NumberOfRootBridges]\r
- );\r
- RootBridges[*NumberOfRootBridges].ResourceAssigned = TRUE;\r
- //\r
- // Increment the index for the next PCI Root Bridge\r
- //\r
- (*NumberOfRootBridges)++;\r
- }\r
- }\r
-\r
- return RootBridges;\r
-}\r
+++ /dev/null
-/** @file\r
- This file include all platform action which can be customized\r
- by IBV/OEM.\r
-\r
-Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#include "PlatformBootManager.h"\r
-#include "PlatformConsole.h"\r
-\r
-VOID\r
-InstallReadyToLock (\r
- VOID\r
- )\r
-{\r
- EFI_STATUS Status;\r
- EFI_HANDLE Handle;\r
- EFI_SMM_ACCESS2_PROTOCOL *SmmAccess;\r
-\r
- DEBUG((DEBUG_INFO,"InstallReadyToLock entering......\n"));\r
- //\r
- // Inform the SMM infrastructure that we're entering BDS and may run 3rd party code hereafter\r
- // Since PI1.2.1, we need signal EndOfDxe as ExitPmAuth\r
- //\r
- EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid);\r
- DEBUG((DEBUG_INFO,"All EndOfDxe callbacks have returned successfully\n"));\r
-\r
- //\r
- // Install DxeSmmReadyToLock protocol in order to lock SMM\r
- //\r
- Status = gBS->LocateProtocol (&gEfiSmmAccess2ProtocolGuid, NULL, (VOID **) &SmmAccess);\r
- if (!EFI_ERROR (Status)) {\r
- Handle = NULL;\r
- Status = gBS->InstallProtocolInterface (\r
- &Handle,\r
- &gEfiDxeSmmReadyToLockProtocolGuid,\r
- EFI_NATIVE_INTERFACE,\r
- NULL\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
-\r
- DEBUG((DEBUG_INFO,"InstallReadyToLock end\n"));\r
- return;\r
-}\r
-\r
-/**\r
- Return the index of the load option in the load option array.\r
-\r
- The function consider two load options are equal when the\r
- OptionType, Attributes, Description, FilePath and OptionalData are equal.\r
-\r
- @param Key Pointer to the load option to be found.\r
- @param Array Pointer to the array of load options to be found.\r
- @param Count Number of entries in the Array.\r
-\r
- @retval -1 Key wasn't found in the Array.\r
- @retval 0 ~ Count-1 The index of the Key in the Array.\r
-**/\r
-INTN\r
-PlatformFindLoadOption (\r
- IN CONST EFI_BOOT_MANAGER_LOAD_OPTION *Key,\r
- IN CONST EFI_BOOT_MANAGER_LOAD_OPTION *Array,\r
- IN UINTN Count\r
-)\r
-{\r
- UINTN Index;\r
-\r
- for (Index = 0; Index < Count; Index++) {\r
- if ((Key->OptionType == Array[Index].OptionType) &&\r
- (Key->Attributes == Array[Index].Attributes) &&\r
- (StrCmp (Key->Description, Array[Index].Description) == 0) &&\r
- (CompareMem (Key->FilePath, Array[Index].FilePath, GetDevicePathSize (Key->FilePath)) == 0) &&\r
- (Key->OptionalDataSize == Array[Index].OptionalDataSize) &&\r
- (CompareMem (Key->OptionalData, Array[Index].OptionalData, Key->OptionalDataSize) == 0)) {\r
- return (INTN) Index;\r
- }\r
- }\r
-\r
- return -1;\r
-}\r
-\r
-/**\r
- Register a boot option using a file GUID in the FV.\r
-\r
- @param FileGuid The file GUID name in FV.\r
- @param Description The boot option description.\r
- @param Attributes The attributes used for the boot option loading.\r
-**/\r
-VOID\r
-PlatformRegisterFvBootOption (\r
- EFI_GUID *FileGuid,\r
- CHAR16 *Description,\r
- UINT32 Attributes\r
-)\r
-{\r
- EFI_STATUS Status;\r
- UINTN OptionIndex;\r
- EFI_BOOT_MANAGER_LOAD_OPTION NewOption;\r
- EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;\r
- UINTN BootOptionCount;\r
- MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode;\r
- EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;\r
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
-\r
- Status = gBS->HandleProtocol (gImageHandle, &gEfiLoadedImageProtocolGuid, (VOID **) &LoadedImage);\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid);\r
- DevicePath = AppendDevicePathNode (\r
- DevicePathFromHandle (LoadedImage->DeviceHandle),\r
- (EFI_DEVICE_PATH_PROTOCOL *) &FileNode\r
- );\r
-\r
- Status = EfiBootManagerInitializeLoadOption (\r
- &NewOption,\r
- LoadOptionNumberUnassigned,\r
- LoadOptionTypeBoot,\r
- Attributes,\r
- Description,\r
- DevicePath,\r
- NULL,\r
- 0\r
- );\r
- if (!EFI_ERROR (Status)) {\r
- BootOptions = EfiBootManagerGetLoadOptions (&BootOptionCount, LoadOptionTypeBoot);\r
-\r
- OptionIndex = PlatformFindLoadOption (&NewOption, BootOptions, BootOptionCount);\r
-\r
- if (OptionIndex == -1) {\r
- Status = EfiBootManagerAddLoadOptionVariable (&NewOption, (UINTN) -1);\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
- EfiBootManagerFreeLoadOption (&NewOption);\r
- EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);\r
- }\r
-}\r
-\r
-/**\r
- Do the platform specific action before the console is connected.\r
-\r
- Such as:\r
- Update console variable;\r
- Register new Driver#### or Boot####;\r
- Signal ReadyToLock event.\r
-**/\r
-VOID\r
-EFIAPI\r
-PlatformBootManagerBeforeConsole (\r
- VOID\r
-)\r
-{\r
- EFI_INPUT_KEY Enter;\r
- EFI_INPUT_KEY F2;\r
- EFI_INPUT_KEY Down;\r
- EFI_BOOT_MANAGER_LOAD_OPTION BootOption;\r
-\r
- PlatformConsoleInit ();\r
-\r
- //\r
- // Register ENTER as CONTINUE key\r
- //\r
- Enter.ScanCode = SCAN_NULL;\r
- Enter.UnicodeChar = CHAR_CARRIAGE_RETURN;\r
- EfiBootManagerRegisterContinueKeyOption (0, &Enter, NULL);\r
-\r
- //\r
- // Map F2 to Boot Manager Menu\r
- //\r
- F2.ScanCode = SCAN_F2;\r
- F2.UnicodeChar = CHAR_NULL;\r
- EfiBootManagerGetBootManagerMenu (&BootOption);\r
- EfiBootManagerAddKeyOptionVariable (NULL, (UINT16) BootOption.OptionNumber, 0, &F2, NULL);\r
-\r
- //\r
- // Also add Down key to Boot Manager Menu since some serial terminals don't support F2 key.\r
- //\r
- Down.ScanCode = SCAN_DOWN;\r
- Down.UnicodeChar = CHAR_NULL;\r
- EfiBootManagerGetBootManagerMenu (&BootOption);\r
- EfiBootManagerAddKeyOptionVariable (NULL, (UINT16) BootOption.OptionNumber, 0, &Down, NULL);\r
-\r
- //\r
- // Install ready to lock.\r
- // This needs to be done before option rom dispatched.\r
- //\r
- InstallReadyToLock ();\r
-\r
- //\r
- // Dispatch deferred images after EndOfDxe event and ReadyToLock installation.\r
- //\r
- EfiBootManagerDispatchDeferredImages ();\r
-}\r
-\r
-/**\r
- Do the platform specific action after the console is connected.\r
-\r
- Such as:\r
- Dynamically switch output mode;\r
- Signal console ready platform customized event;\r
- Run diagnostics like memory testing;\r
- Connect certain devices;\r
- Dispatch additional option roms.\r
-**/\r
-VOID\r
-EFIAPI\r
-PlatformBootManagerAfterConsole (\r
- VOID\r
-)\r
-{\r
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL Black;\r
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL White;\r
-\r
- Black.Blue = Black.Green = Black.Red = Black.Reserved = 0;\r
- White.Blue = White.Green = White.Red = White.Reserved = 0xFF;\r
-\r
- EfiBootManagerConnectAll ();\r
- EfiBootManagerRefreshAllBootOption ();\r
-\r
- //\r
- // Register UEFI Shell\r
- //\r
- PlatformRegisterFvBootOption (PcdGetPtr (PcdShellFile), L"UEFI Shell", LOAD_OPTION_ACTIVE);\r
- \r
- Print (\r
- L"\n"\r
- L"F2 or Down to enter Boot Manager Menu.\n"\r
- L"ENTER to boot directly.\n"\r
- L"\n"\r
- );\r
-\r
-}\r
-\r
-/**\r
- This function is called each second during the boot manager waits the timeout.\r
-\r
- @param TimeoutRemain The remaining timeout.\r
-**/\r
-VOID\r
-EFIAPI\r
-PlatformBootManagerWaitCallback (\r
- UINT16 TimeoutRemain\r
-)\r
-{\r
- return;\r
-}\r
-\r
-/**\r
- The function is called when no boot option could be launched,\r
- including platform recovery options and options pointing to applications\r
- built into firmware volumes.\r
-\r
- If this function returns, BDS attempts to enter an infinite loop.\r
-**/\r
-VOID\r
-EFIAPI\r
-PlatformBootManagerUnableToBoot (\r
- VOID\r
- )\r
-{\r
- return;\r
-}\r
-\r
+++ /dev/null
-/**@file\r
- Head file for BDS Platform specific code\r
-\r
-Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-**/\r
-\r
-#ifndef _PLATFORM_BOOT_MANAGER_H\r
-#define _PLATFORM_BOOT_MANAGER_H\r
-\r
-#include <PiDxe.h>\r
-#include <Protocol/LoadedImage.h>\r
-\r
-#include <Library/DebugLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/UefiBootServicesTableLib.h>\r
-#include <Library/UefiRuntimeServicesTableLib.h>\r
-#include <Library/MemoryAllocationLib.h>\r
-#include <Library/BaseLib.h>\r
-#include <Library/UefiRuntimeServicesTableLib.h>\r
-#include <Library/UefiLib.h>\r
-#include <Library/UefiBootManagerLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/DevicePathLib.h>\r
-#include <Library/HiiLib.h>\r
-#include <Library/PrintLib.h>\r
-#include <Library/DxeServicesLib.h>\r
-#include <Library/BootLogoLib.h>\r
-#include <Protocol/SmmAccess2.h>\r
-\r
-typedef struct {\r
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
- UINTN ConnectType;\r
-} PLATFORM_CONSOLE_CONNECT_ENTRY;\r
-\r
-extern PLATFORM_CONSOLE_CONNECT_ENTRY gPlatformConsole[];\r
-\r
-#define gEndEntire \\r
- { \\r
- END_DEVICE_PATH_TYPE,\\r
- END_ENTIRE_DEVICE_PATH_SUBTYPE,\\r
- { END_DEVICE_PATH_LENGTH, 0 },\\r
- }\r
-\r
-#define CONSOLE_OUT BIT0\r
-#define CONSOLE_IN BIT1\r
-#define STD_ERROR BIT2\r
-\r
-typedef struct {\r
- VENDOR_DEVICE_PATH VendorDevicePath;\r
- UINT32 Instance;\r
-} WIN_NT_VENDOR_DEVICE_PATH_NODE;\r
-\r
-//\r
-// Below is the platform console device path\r
-//\r
-typedef struct {\r
- VENDOR_DEVICE_PATH NtBus;\r
- WIN_NT_VENDOR_DEVICE_PATH_NODE SerialDevice;\r
- UART_DEVICE_PATH Uart;\r
- VENDOR_DEVICE_PATH TerminalType;\r
- EFI_DEVICE_PATH_PROTOCOL End;\r
-} NT_ISA_SERIAL_DEVICE_PATH;\r
-\r
-typedef struct {\r
- VENDOR_DEVICE_PATH NtBus;\r
- WIN_NT_VENDOR_DEVICE_PATH_NODE NtGopDevice;\r
- EFI_DEVICE_PATH_PROTOCOL End;\r
-} NT_PLATFORM_GOP_DEVICE_PATH;\r
-\r
-/**\r
- Use SystemTable Conout to stop video based Simple Text Out consoles from going\r
- to the video device. Put up LogoFile on every video device that is a console.\r
-\r
- @param[in] LogoFile File name of logo to display on the center of the screen.\r
-\r
- @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and logo displayed.\r
- @retval EFI_UNSUPPORTED Logo not found\r
-\r
-**/\r
-EFI_STATUS\r
-PlatformBootManagerEnableQuietBoot (\r
- IN EFI_GUID *LogoFile\r
-);\r
-\r
-/**\r
- Use SystemTable Conout to turn on video based Simple Text Out consoles. The\r
- Simple Text Out screens will now be synced up with all non video output devices\r
-\r
- @retval EFI_SUCCESS UGA devices are back in text mode and synced up.\r
-\r
-**/\r
-EFI_STATUS\r
-PlatformBootManagerDisableQuietBoot (\r
- VOID\r
-);\r
-\r
-/**\r
- Show progress bar with title above it. It only works in Graphics mode.\r
-\r
- @param TitleForeground Foreground color for Title.\r
- @param TitleBackground Background color for Title.\r
- @param Title Title above progress bar.\r
- @param ProgressColor Progress bar color.\r
- @param Progress Progress (0-100)\r
- @param PreviousValue The previous value of the progress.\r
-\r
- @retval EFI_STATUS Success update the progress bar\r
-\r
-**/\r
-EFI_STATUS\r
-PlatformBootManagerShowProgress (\r
- IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleForeground,\r
- IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleBackground,\r
- IN CHAR16 *Title,\r
- IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL ProgressColor,\r
- IN UINTN Progress,\r
- IN UINTN PreviousValue\r
-);\r
-\r
-#endif // _PLATFORM_BOOT_MANAGER_H\r
+++ /dev/null
-## @file\r
-# Include all platform action which can be customized by IBV/OEM.\r
-#\r
-# Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>\r
-# SPDX-License-Identifier: BSD-2-Clause-Patent\r
-#\r
-##\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = PlatformBootManagerLib\r
- FILE_GUID = F0D9063A-DADB-4185-85E2-D7ACDA93F7A6\r
- MODULE_TYPE = DXE_DRIVER\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = PlatformBootManagerLib|DXE_DRIVER\r
-\r
-\r
-#\r
-# The following information is for reference only and not required by the build tools.\r
-#\r
-# VALID_ARCHITECTURES = IA32 X64 EBC\r
-#\r
-\r
-[Sources]\r
- PlatformData.c\r
- PlatformConsole.c\r
- PlatformConsole.h\r
- PlatformBootManager.c\r
- PlatformBootManager.h\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec\r
- CorebootPayloadPkg/CorebootPayloadPkg.dec\r
-\r
-[LibraryClasses]\r
- BaseLib\r
- UefiBootServicesTableLib\r
- UefiRuntimeServicesTableLib\r
- UefiLib\r
- UefiBootManagerLib\r
- PcdLib\r
- DxeServicesLib\r
- MemoryAllocationLib\r
- DevicePathLib\r
- HiiLib\r
- PrintLib\r
- PlatformHookLib\r
-\r
-[Guids]\r
- gEfiEndOfDxeEventGroupGuid\r
-\r
-[Protocols]\r
- gEfiGenericMemTestProtocolGuid ## CONSUMES\r
- gEfiGraphicsOutputProtocolGuid ## CONSUMES\r
- gEfiUgaDrawProtocolGuid ## CONSUMES\r
- gEfiBootLogoProtocolGuid ## CONSUMES\r
- gEfiDxeSmmReadyToLockProtocolGuid\r
- gEfiSmmAccess2ProtocolGuid\r
-\r
-[Pcd]\r
- gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut\r
- gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdConInConnectOnDemand\r
- gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdBootlogoOnlyEnable\r
- gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile\r
- gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile\r
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate\r
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits\r
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity\r
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits\r
+++ /dev/null
-/** @file\r
-This file include all platform action which can be customized by IBV/OEM.\r
-\r
-Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#include "PlatformBootManager.h"\r
-#include "PlatformConsole.h"\r
-\r
-#define PCI_DEVICE_PATH_NODE(Func, Dev) \\r
- { \\r
- { \\r
- HARDWARE_DEVICE_PATH, \\r
- HW_PCI_DP, \\r
- { \\r
- (UINT8) (sizeof (PCI_DEVICE_PATH)), \\r
- (UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8) \\r
- } \\r
- }, \\r
- (Func), \\r
- (Dev) \\r
- }\r
-\r
-#define PNPID_DEVICE_PATH_NODE(PnpId) \\r
- { \\r
- { \\r
- ACPI_DEVICE_PATH, \\r
- ACPI_DP, \\r
- { \\r
- (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)), \\r
- (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8) \\r
- }, \\r
- }, \\r
- EISA_PNP_ID((PnpId)), \\r
- 0 \\r
- }\r
-\r
-#define gPciRootBridge \\r
- PNPID_DEVICE_PATH_NODE(0x0A03)\r
-\r
-#define gPnp16550ComPort \\r
- PNPID_DEVICE_PATH_NODE(0x0501)\r
-\r
-#define gUartVendor \\r
- { \\r
- { \\r
- HARDWARE_DEVICE_PATH, \\r
- HW_VENDOR_DP, \\r
- { \\r
- (UINT8) (sizeof (VENDOR_DEVICE_PATH)), \\r
- (UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8) \\r
- } \\r
- }, \\r
- {0xD3987D4B, 0x971A, 0x435F, {0x8C, 0xAF, 0x49, 0x67, 0xEB, 0x62, 0x72, 0x41}} \\r
- }\r
-\r
-#define gUart \\r
- { \\r
- { \\r
- MESSAGING_DEVICE_PATH, \\r
- MSG_UART_DP, \\r
- { \\r
- (UINT8) (sizeof (UART_DEVICE_PATH)), \\r
- (UINT8) ((sizeof (UART_DEVICE_PATH)) >> 8) \\r
- } \\r
- }, \\r
- 0, \\r
- 115200, \\r
- 8, \\r
- 1, \\r
- 1 \\r
- }\r
-\r
-#define gPcAnsiTerminal \\r
- { \\r
- { \\r
- MESSAGING_DEVICE_PATH, \\r
- MSG_VENDOR_DP, \\r
- { \\r
- (UINT8) (sizeof (VENDOR_DEVICE_PATH)), \\r
- (UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8) \\r
- } \\r
- }, \\r
- DEVICE_PATH_MESSAGING_PC_ANSI \\r
- }\r
-\r
-\r
-ACPI_HID_DEVICE_PATH gPnp16550ComPortDeviceNode = gPnp16550ComPort;\r
-UART_DEVICE_PATH gUartDeviceNode = gUart;\r
-VENDOR_DEVICE_PATH gTerminalTypeDeviceNode = gPcAnsiTerminal;\r
-VENDOR_DEVICE_PATH gUartDeviceVendorNode = gUartVendor;\r
-\r
-//\r
-// Predefined platform root bridge\r
-//\r
-PLATFORM_ROOT_BRIDGE_DEVICE_PATH gPlatformRootBridge0 = {\r
- gPciRootBridge,\r
- gEndEntire\r
-};\r
-\r
-EFI_DEVICE_PATH_PROTOCOL *gPlatformRootBridges[] = {\r
- (EFI_DEVICE_PATH_PROTOCOL *) &gPlatformRootBridge0,\r
- NULL\r
-};\r
-\r
-BOOLEAN mDetectVgaOnly;\r
-\r
-/**\r
- Add UART to ConOut, ConIn, ErrOut.\r
-\r
- @param[in] DeviceHandle - LPC device path.\r
-\r
- @retval EFI_SUCCESS - Serial console is added to ConOut, ConIn, and ErrOut.\r
- @retval EFI_STATUS - No serial console is added.\r
-**/\r
-EFI_STATUS\r
-PrepareLpcBridgeDevicePath (\r
- IN EFI_HANDLE DeviceHandle\r
-)\r
-{\r
- EFI_STATUS Status;\r
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
-\r
- DevicePath = NULL;\r
- Status = gBS->HandleProtocol (\r
- DeviceHandle,\r
- &gEfiDevicePathProtocolGuid,\r
- (VOID*)&DevicePath\r
- );\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- //\r
- // Register COM1\r
- //\r
- DevicePath = AppendDevicePathNode ((EFI_DEVICE_PATH_PROTOCOL *)NULL, (EFI_DEVICE_PATH_PROTOCOL *)&gUartDeviceVendorNode);\r
- DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gUartDeviceNode);\r
- DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gTerminalTypeDeviceNode);\r
-\r
- EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);\r
- EfiBootManagerUpdateConsoleVariable (ConIn, DevicePath, NULL);\r
- EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-/**\r
- Return the GOP device path in the platform.\r
-\r
- @param[in] PciDevicePath - Device path for the PCI graphics device.\r
- @param[out] GopDevicePath - Return the device path with GOP installed.\r
-\r
- @retval EFI_SUCCESS - PCI VGA is added to ConOut.\r
- @retval EFI_INVALID_PARAMETER - The device path parameter is invalid.\r
- @retval EFI_STATUS - No GOP device found.\r
-**/\r
-EFI_STATUS\r
-GetGopDevicePath (\r
- IN EFI_DEVICE_PATH_PROTOCOL *PciDevicePath,\r
- OUT EFI_DEVICE_PATH_PROTOCOL **GopDevicePath\r
-)\r
-{\r
- UINTN Index;\r
- EFI_STATUS Status;\r
- EFI_HANDLE PciDeviceHandle;\r
- EFI_DEVICE_PATH_PROTOCOL *TempDevicePath;\r
- EFI_DEVICE_PATH_PROTOCOL *TempPciDevicePath;\r
- UINTN GopHandleCount;\r
- EFI_HANDLE *GopHandleBuffer;\r
- ACPI_ADR_DEVICE_PATH AcpiAdr;\r
- EFI_DEVICE_PATH_PROTOCOL *MyDevicePath;\r
-\r
- if (PciDevicePath == NULL || GopDevicePath == NULL) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
-\r
- MyDevicePath = NULL;\r
-\r
- //\r
- // Initialize the GopDevicePath to be PciDevicePath\r
- //\r
- *GopDevicePath = PciDevicePath;\r
- TempPciDevicePath = PciDevicePath;\r
-\r
- Status = gBS->LocateDevicePath (\r
- &gEfiDevicePathProtocolGuid,\r
- &TempPciDevicePath,\r
- &PciDeviceHandle\r
- );\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- //\r
- // Try to connect this handle, so that GOP driver could start on this\r
- // device and create child handles with GraphicsOutput Protocol installed\r
- // on them, then we get device paths of these child handles and select\r
- // them as possible console device.\r
- //\r
- AcpiAdr.Header.Type = ACPI_DEVICE_PATH;\r
- AcpiAdr.Header.SubType = ACPI_ADR_DP;\r
- AcpiAdr.ADR= ACPI_DISPLAY_ADR (1, 0, 0, 1, 0, ACPI_ADR_DISPLAY_TYPE_INTERNAL_DIGITAL, 8, 0);\r
-\r
- SetDevicePathNodeLength (&AcpiAdr.Header, sizeof (ACPI_ADR_DEVICE_PATH));\r
-\r
- MyDevicePath = AppendDevicePathNode(MyDevicePath, (EFI_DEVICE_PATH_PROTOCOL*)&AcpiAdr);\r
-\r
- gBS->ConnectController (PciDeviceHandle, NULL, MyDevicePath, FALSE);\r
-\r
- FreePool(MyDevicePath);\r
-\r
- Status = gBS->LocateHandleBuffer (\r
- ByProtocol,\r
- &gEfiGraphicsOutputProtocolGuid,\r
- NULL,\r
- &GopHandleCount,\r
- &GopHandleBuffer\r
- );\r
- if (!EFI_ERROR (Status)) {\r
- //\r
- // Add all the child handles as possible Console Device\r
- //\r
- for (Index = 0; Index < GopHandleCount; Index++) {\r
- Status = gBS->HandleProtocol (GopHandleBuffer[Index], &gEfiDevicePathProtocolGuid, (VOID*)&TempDevicePath);\r
- if (EFI_ERROR (Status)) {\r
- continue;\r
- }\r
- if (CompareMem (\r
- PciDevicePath,\r
- TempDevicePath,\r
- GetDevicePathSize (PciDevicePath) - END_DEVICE_PATH_LENGTH\r
- ) == 0) {\r
- //\r
- // In current implementation, we only enable one of the child handles\r
- // as console device, i.e. sotre one of the child handle's device\r
- // path to variable "ConOut"\r
- // In future, we could select all child handles to be console device\r
- //\r
- *GopDevicePath = TempDevicePath;\r
-\r
- //\r
- // Delete the PCI device's path that added by GetPlugInPciVgaDevicePath()\r
- // Add the integrity GOP device path.\r
- //\r
- EfiBootManagerUpdateConsoleVariable (ConOut, NULL, PciDevicePath);\r
- EfiBootManagerUpdateConsoleVariable (ConOut, TempDevicePath, NULL);\r
- }\r
- }\r
- gBS->FreePool (GopHandleBuffer);\r
- }\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-/**\r
- Add PCI VGA to ConOut, ConIn, ErrOut.\r
-\r
- @param[in] DeviceHandle - Handle of PciIo protocol.\r
-\r
- @retval EFI_SUCCESS - PCI VGA is added to ConOut.\r
- @retval EFI_STATUS - No PCI VGA device is added.\r
-\r
-**/\r
-EFI_STATUS\r
-PreparePciVgaDevicePath (\r
- IN EFI_HANDLE DeviceHandle\r
-)\r
-{\r
- EFI_STATUS Status;\r
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
- EFI_DEVICE_PATH_PROTOCOL *GopDevicePath;\r
-\r
- DevicePath = NULL;\r
- Status = gBS->HandleProtocol (\r
- DeviceHandle,\r
- &gEfiDevicePathProtocolGuid,\r
- (VOID*)&DevicePath\r
- );\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- GetGopDevicePath (DevicePath, &GopDevicePath);\r
- DevicePath = GopDevicePath;\r
-\r
- EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-/**\r
- Add PCI Serial to ConOut, ConIn, ErrOut.\r
-\r
- @param[in] DeviceHandle - Handle of PciIo protocol.\r
-\r
- @retval EFI_SUCCESS - PCI Serial is added to ConOut, ConIn, and ErrOut.\r
- @retval EFI_STATUS - No PCI Serial device is added.\r
-\r
-**/\r
-EFI_STATUS\r
-PreparePciSerialDevicePath (\r
- IN EFI_HANDLE DeviceHandle\r
-)\r
-{\r
- EFI_STATUS Status;\r
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
-\r
- DevicePath = NULL;\r
- Status = gBS->HandleProtocol (\r
- DeviceHandle,\r
- &gEfiDevicePathProtocolGuid,\r
- (VOID*)&DevicePath\r
- );\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gUartDeviceNode);\r
- DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gTerminalTypeDeviceNode);\r
-\r
- EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);\r
- EfiBootManagerUpdateConsoleVariable (ConIn, DevicePath, NULL);\r
- EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-/**\r
- For every PCI instance execute a callback function.\r
-\r
- @param[in] Id - The protocol GUID for callback\r
- @param[in] CallBackFunction - The callback function\r
- @param[in] Context - The context of the callback\r
-\r
- @retval EFI_STATUS - Callback function failed.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-VisitAllInstancesOfProtocol (\r
- IN EFI_GUID *Id,\r
- IN PROTOCOL_INSTANCE_CALLBACK CallBackFunction,\r
- IN VOID *Context\r
-)\r
-{\r
- EFI_STATUS Status;\r
- UINTN HandleCount;\r
- EFI_HANDLE *HandleBuffer;\r
- UINTN Index;\r
- VOID *Instance;\r
-\r
- //\r
- // Start to check all the PciIo to find all possible device\r
- //\r
- HandleCount = 0;\r
- HandleBuffer = NULL;\r
- Status = gBS->LocateHandleBuffer (\r
- ByProtocol,\r
- Id,\r
- NULL,\r
- &HandleCount,\r
- &HandleBuffer\r
- );\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- for (Index = 0; Index < HandleCount; Index++) {\r
- Status = gBS->HandleProtocol (HandleBuffer[Index], Id, &Instance);\r
- if (EFI_ERROR (Status)) {\r
- continue;\r
- }\r
-\r
- Status = (*CallBackFunction) (\r
- HandleBuffer[Index],\r
- Instance,\r
- Context\r
- );\r
- }\r
-\r
- gBS->FreePool (HandleBuffer);\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-/**\r
- For every PCI instance execute a callback function.\r
-\r
- @param[in] Handle - The PCI device handle\r
- @param[in] Instance - The instance of the PciIo protocol\r
- @param[in] Context - The context of the callback\r
-\r
- @retval EFI_STATUS - Callback function failed.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-VisitingAPciInstance (\r
- IN EFI_HANDLE Handle,\r
- IN VOID *Instance,\r
- IN VOID *Context\r
-)\r
-{\r
- EFI_STATUS Status;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- PCI_TYPE00 Pci;\r
-\r
- PciIo = (EFI_PCI_IO_PROTOCOL*) Instance;\r
-\r
- //\r
- // Check for all PCI device\r
- //\r
- Status = PciIo->Pci.Read (\r
- PciIo,\r
- EfiPciIoWidthUint32,\r
- 0,\r
- sizeof (Pci) / sizeof (UINT32),\r
- &Pci\r
- );\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- return (*(VISIT_PCI_INSTANCE_CALLBACK)(UINTN) Context) (\r
- Handle,\r
- PciIo,\r
- &Pci\r
- );\r
-\r
-}\r
-\r
-\r
-/**\r
- For every PCI instance execute a callback function.\r
-\r
- @param[in] CallBackFunction - Callback function pointer\r
-\r
- @retval EFI_STATUS - Callback function failed.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-VisitAllPciInstances (\r
- IN VISIT_PCI_INSTANCE_CALLBACK CallBackFunction\r
-)\r
-{\r
- return VisitAllInstancesOfProtocol (\r
- &gEfiPciIoProtocolGuid,\r
- VisitingAPciInstance,\r
- (VOID*)(UINTN) CallBackFunction\r
- );\r
-}\r
-\r
-\r
-/**\r
- Do platform specific PCI Device check and add them to\r
- ConOut, ConIn, ErrOut.\r
-\r
- @param[in] Handle - Handle of PCI device instance\r
- @param[in] PciIo - PCI IO protocol instance\r
- @param[in] Pci - PCI Header register block\r
-\r
- @retval EFI_SUCCESS - PCI Device check and Console variable update successfully.\r
- @retval EFI_STATUS - PCI Device check or Console variable update fail.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-DetectAndPreparePlatformPciDevicePath (\r
- IN EFI_HANDLE Handle,\r
- IN EFI_PCI_IO_PROTOCOL *PciIo,\r
- IN PCI_TYPE00 *Pci\r
-)\r
-{\r
- EFI_STATUS Status;\r
-\r
- Status = PciIo->Attributes (\r
- PciIo,\r
- EfiPciIoAttributeOperationEnable,\r
- EFI_PCI_DEVICE_ENABLE,\r
- NULL\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- if (!mDetectVgaOnly) {\r
- //\r
- // Here we decide whether it is LPC Bridge\r
- //\r
- if ((IS_PCI_LPC (Pci)) ||\r
- ((IS_PCI_ISA_PDECODE (Pci)) &&\r
- (Pci->Hdr.VendorId == 0x8086)\r
- )\r
- ) {\r
- //\r
- // Add IsaKeyboard to ConIn,\r
- // add IsaSerial to ConOut, ConIn, ErrOut\r
- //\r
- DEBUG ((EFI_D_INFO, "Found LPC Bridge device\n"));\r
- PrepareLpcBridgeDevicePath (Handle);\r
- return EFI_SUCCESS;\r
- }\r
- //\r
- // Here we decide which Serial device to enable in PCI bus\r
- //\r
- if (IS_PCI_16550SERIAL (Pci)) {\r
- //\r
- // Add them to ConOut, ConIn, ErrOut.\r
- //\r
- DEBUG ((EFI_D_INFO, "Found PCI 16550 SERIAL device\n"));\r
- PreparePciSerialDevicePath (Handle);\r
- return EFI_SUCCESS;\r
- }\r
- }\r
-\r
- //\r
- // Here we decide which VGA device to enable in PCI bus\r
- //\r
- if (IS_PCI_VGA (Pci)) {\r
- //\r
- // Add them to ConOut.\r
- //\r
- DEBUG ((EFI_D_INFO, "Found PCI VGA device\n"));\r
- PreparePciVgaDevicePath (Handle);\r
- return EFI_SUCCESS;\r
- }\r
-\r
- return Status;\r
-}\r
-\r
-\r
-/**\r
- Do platform specific PCI Device check and add them to ConOut, ConIn, ErrOut\r
-\r
- @param[in] DetectVgaOnly - Only detect VGA device if it's TRUE.\r
-\r
- @retval EFI_SUCCESS - PCI Device check and Console variable update successfully.\r
- @retval EFI_STATUS - PCI Device check or Console variable update fail.\r
-\r
-**/\r
-EFI_STATUS\r
-DetectAndPreparePlatformPciDevicePaths (\r
- BOOLEAN DetectVgaOnly\r
-)\r
-{\r
- mDetectVgaOnly = DetectVgaOnly;\r
- return VisitAllPciInstances (DetectAndPreparePlatformPciDevicePath);\r
-}\r
-\r
-\r
-/**\r
- The function will connect root bridge\r
-\r
- @return EFI_SUCCESS Connect RootBridge successfully.\r
-\r
-**/\r
-EFI_STATUS\r
-ConnectRootBridge (\r
- VOID\r
-)\r
-{\r
- EFI_STATUS Status;\r
- EFI_HANDLE RootHandle;\r
-\r
- //\r
- // Make all the PCI_IO protocols on PCI Seg 0 show up\r
- //\r
- Status = gBS->LocateDevicePath (\r
- &gEfiDevicePathProtocolGuid,\r
- &gPlatformRootBridges[0],\r
- &RootHandle\r
- );\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- Status = gBS->ConnectController (RootHandle, NULL, NULL, FALSE);\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-/**\r
- Platform console init. Include the platform firmware vendor, revision\r
- and so crc check.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-PlatformConsoleInit (\r
- VOID\r
-)\r
-{\r
- gUartDeviceNode.BaudRate = PcdGet64 (PcdUartDefaultBaudRate);\r
- gUartDeviceNode.DataBits = PcdGet8 (PcdUartDefaultDataBits);\r
- gUartDeviceNode.Parity = PcdGet8 (PcdUartDefaultParity);\r
- gUartDeviceNode.StopBits = PcdGet8 (PcdUartDefaultStopBits);\r
-\r
- ConnectRootBridge ();\r
-\r
- //\r
- // Do platform specific PCI Device check and add them to ConOut, ConIn, ErrOut\r
- //\r
- DetectAndPreparePlatformPciDevicePaths (FALSE);\r
-}\r
+++ /dev/null
-/** @file\r
-Head file for BDS Platform specific code\r
-\r
-Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-**/\r
-\r
-#ifndef _PLATFORM_CONSOLE_H\r
-#define _PLATFORM_CONSOLE_H\r
-\r
-#include <PiDxe.h>\r
-#include <IndustryStandard/Pci.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/UefiBootServicesTableLib.h>\r
-#include <Library/MemoryAllocationLib.h>\r
-#include <Library/BaseLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/UefiLib.h>\r
-#include <Library/DevicePathLib.h>\r
-#include <Protocol/PciIo.h>\r
-\r
-#define IS_PCI_ISA_PDECODE(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)\r
-#define IS_PCI_16550SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)\r
-\r
-//\r
-// Type definitions\r
-//\r
-\r
-//\r
-// Platform Root Bridge\r
-//\r
-typedef struct {\r
- ACPI_HID_DEVICE_PATH PciRootBridge;\r
- EFI_DEVICE_PATH_PROTOCOL End;\r
-} PLATFORM_ROOT_BRIDGE_DEVICE_PATH;\r
-\r
-typedef\r
-EFI_STATUS\r
-(EFIAPI *PROTOCOL_INSTANCE_CALLBACK)(\r
- IN EFI_HANDLE Handle,\r
- IN VOID *Instance,\r
- IN VOID *Context\r
-);\r
-\r
-/**\r
- @param[in] Handle - Handle of PCI device instance\r
- @param[in] PciIo - PCI IO protocol instance\r
- @param[in] Pci - PCI Header register block\r
-**/\r
-typedef\r
-EFI_STATUS\r
-(EFIAPI *VISIT_PCI_INSTANCE_CALLBACK)(\r
- IN EFI_HANDLE Handle,\r
- IN EFI_PCI_IO_PROTOCOL *PciIo,\r
- IN PCI_TYPE00 *Pci\r
-);\r
-\r
-/**\r
- Platform console init. Include the platform firmware vendor, revision\r
- and so crc check.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-PlatformConsoleInit (\r
- VOID\r
-);\r
-\r
-#endif\r
+++ /dev/null
-/**@file\r
- Defined the platform specific device path which will be filled to\r
- ConIn/ConOut variables.\r
-\r
-Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-**/\r
-\r
-#include "PlatformBootManager.h"\r
-\r
-///\r
-/// Predefined platform default console device path\r
-///\r
-PLATFORM_CONSOLE_CONNECT_ENTRY gPlatformConsole[] = {\r
- {\r
- NULL,\r
- 0\r
- }\r
-};\r
+++ /dev/null
-/** @file\r
- Platform Hook Library instance for UART device upon coreboot.\r
-\r
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#include <Base.h>\r
-#include <Uefi/UefiBaseType.h>\r
-#include <Library/PciLib.h>\r
-#include <Library/PlatformHookLib.h>\r
-#include <Library/CbParseLib.h>\r
-#include <Library/PcdLib.h>\r
-\r
-typedef struct {\r
- UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries.\r
- UINT16 DeviceId; ///< Device ID to match the PCI device\r
- UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz\r
- UINT64 Offset; ///< The byte offset into to the BAR\r
- UINT8 BarIndex; ///< Which BAR to get the UART base address\r
- UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte.\r
- UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.\r
- UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.\r
- UINT8 Reserved[2];\r
-} PCI_SERIAL_PARAMETER;\r
-\r
-/**\r
- Performs platform specific initialization required for the CPU to access\r
- the hardware associated with a SerialPortLib instance. This function does\r
- not initialize the serial port hardware itself. Instead, it initializes\r
- hardware devices that are required for the CPU to access the serial port\r
- hardware. This function may be called more than once.\r
-\r
- @retval RETURN_SUCCESS The platform specific initialization succeeded.\r
- @retval RETURN_DEVICE_ERROR The platform specific initialization could not be completed.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-PlatformHookSerialPortInitialize (\r
- VOID\r
- )\r
-{\r
- RETURN_STATUS Status;\r
- UINT32 SerialRegBase;\r
- UINT32 SerialRegAccessType;\r
- UINT32 BaudRate;\r
- UINT32 RegWidth;\r
- UINT32 InputHertz;\r
- UINT32 PayloadParam;\r
- UINT32 DeviceVendor;\r
- PCI_SERIAL_PARAMETER *SerialParam;\r
-\r
- Status = CbParseSerialInfo (&SerialRegBase, &SerialRegAccessType,\r
- &RegWidth, &BaudRate, &InputHertz,\r
- &PayloadParam);\r
- if (RETURN_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- if (SerialRegAccessType == 2) { //MMIO\r
- Status = PcdSetBoolS (PcdSerialUseMmio, TRUE);\r
- } else { //IO\r
- Status = PcdSetBoolS (PcdSerialUseMmio, FALSE);\r
- }\r
- if (RETURN_ERROR (Status)) {\r
- return Status;\r
- }\r
- Status = PcdSet64S (PcdSerialRegisterBase, (UINT64) SerialRegBase);\r
- if (RETURN_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- Status = PcdSet32S (PcdSerialRegisterStride, RegWidth);\r
- if (RETURN_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- Status = PcdSet32S (PcdSerialBaudRate, BaudRate);\r
- if (RETURN_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- Status = PcdSet64S (PcdUartDefaultBaudRate, BaudRate);\r
- if (RETURN_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- Status = PcdSet32S (PcdSerialClockRate, InputHertz);\r
- if (RETURN_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- if (PayloadParam >= 0x80000000) {\r
- DeviceVendor = PciRead32 (PayloadParam & 0x0ffff000);\r
- SerialParam = PcdGetPtr(PcdPciSerialParameters);\r
- SerialParam->VendorId = (UINT16)DeviceVendor;\r
- SerialParam->DeviceId = DeviceVendor >> 16;\r
- SerialParam->ClockRate = InputHertz;\r
- SerialParam->RegisterStride = (UINT8)RegWidth;\r
- }\r
-\r
- return RETURN_SUCCESS;\r
-}\r
+++ /dev/null
-## @file\r
-# Platform Hook Library instance for UART device upon coreboot.\r
-#\r
-# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
-#\r
-# SPDX-License-Identifier: BSD-2-Clause-Patent\r
-#\r
-##\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = PlatformHookLib\r
- FILE_GUID = 40A2CBC6-CFB8-447b-A90E-198E88FD345E\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = PlatformHookLib\r
- CONSTRUCTOR = PlatformHookSerialPortInitialize
-\r
-[Sources]\r
- PlatformHookLib.c\r
-\r
-[LibraryClasses]\r
- CbParseLib\r
- PcdLib\r
- PciLib
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- CorebootModulePkg/CorebootModulePkg.dec\r
-\r
-[Pcd]\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## PRODUCES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase ## PRODUCES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate ## PRODUCES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride ## PRODUCES
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate ## PRODUCES
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate ## PRODUCES
- gEfiMdeModulePkgTokenSpaceGuid.PcdPciSerialParameters ## PRODUCES
+++ /dev/null
-/** @file\r
- Reset System Library functions for coreboot\r
-\r
- Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#include <PiDxe.h>\r
-#include <Library/BaseLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/IoLib.h>\r
-#include <Library/HobLib.h>\r
-\r
-#include <Guid/AcpiBoardInfoGuid.h>\r
-\r
-VOID\r
-AcpiPmControl (\r
- UINTN SuspendType\r
- )\r
-{\r
- EFI_HOB_GUID_TYPE *GuidHob;\r
- ACPI_BOARD_INFO *pAcpiBoardInfo; \r
- UINTN PmCtrlReg = 0;\r
- \r
- ASSERT (SuspendType <= 7); \r
- //\r
- // Find the acpi board information guid hob\r
- //\r
- GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);\r
- ASSERT (GuidHob != NULL);\r
- pAcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob); \r
- \r
- PmCtrlReg = (UINTN)pAcpiBoardInfo->PmCtrlRegBase; \r
- IoAndThenOr16 (PmCtrlReg, (UINT16) ~0x3c00, (UINT16) (SuspendType << 10));\r
- IoOr16 (PmCtrlReg, BIT13);\r
- CpuDeadLoop ();\r
-}\r
-\r
-/**\r
- Calling this function causes a system-wide reset. This sets\r
- all circuitry within the system to its initial state. This type of reset\r
- is asynchronous to system operation and operates without regard to\r
- cycle boundaries.\r
-\r
- System reset should not return, if it returns, it means the system does\r
- not support cold reset.\r
-**/\r
-VOID\r
-EFIAPI\r
-ResetCold (\r
- VOID\r
- )\r
-{\r
- EFI_HOB_GUID_TYPE *GuidHob;\r
- ACPI_BOARD_INFO *pAcpiBoardInfo; \r
- \r
- //\r
- // Find the acpi board information guid hob\r
- //\r
- GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);\r
- ASSERT (GuidHob != NULL);\r
- pAcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob); \r
- \r
- IoWrite8 ((UINTN)pAcpiBoardInfo->ResetRegAddress, pAcpiBoardInfo->ResetValue);\r
- CpuDeadLoop ();\r
-}\r
-\r
-/**\r
- Calling this function causes a system-wide initialization. The processors\r
- are set to their initial state, and pending cycles are not corrupted.\r
-\r
- System reset should not return, if it returns, it means the system does\r
- not support warm reset.\r
-**/\r
-VOID\r
-EFIAPI\r
-ResetWarm (\r
- VOID\r
- )\r
-{\r
- EFI_HOB_GUID_TYPE *GuidHob;\r
- ACPI_BOARD_INFO *pAcpiBoardInfo; \r
- \r
- //\r
- // Find the acpi board information guid hob\r
- //\r
- GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);\r
- ASSERT (GuidHob != NULL);\r
- pAcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob); \r
- \r
- IoWrite8 ((UINTN)pAcpiBoardInfo->ResetRegAddress, pAcpiBoardInfo->ResetValue);\r
- CpuDeadLoop ();\r
-}\r
-\r
-/**\r
- Calling this function causes the system to enter a power state equivalent\r
- to the ACPI G2/S5 or G3 states.\r
-\r
- System shutdown should not return, if it returns, it means the system does\r
- not support shut down reset.\r
-**/\r
-VOID\r
-EFIAPI\r
-ResetShutdown (\r
- VOID\r
- )\r
-{\r
- EFI_HOB_GUID_TYPE *GuidHob;\r
- ACPI_BOARD_INFO *pAcpiBoardInfo;\r
- UINTN PmCtrlReg;\r
-\r
- //\r
- // Find the acpi board information guid hob\r
- //\r
- GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);\r
- ASSERT (GuidHob != NULL);\r
- pAcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob); \r
- \r
- //\r
- // GPE0_EN should be disabled to avoid any GPI waking up the system from S5\r
- //\r
- IoWrite16 ((UINTN)pAcpiBoardInfo->PmGpeEnBase, 0);\r
-\r
- //\r
- // Clear Power Button Status\r
- //\r
- IoWrite16((UINTN) pAcpiBoardInfo->PmEvtBase, BIT8);\r
- \r
- //\r
- // Transform system into S5 sleep state\r
- //\r
- PmCtrlReg = (UINTN)pAcpiBoardInfo->PmCtrlRegBase; \r
- IoAndThenOr16 (PmCtrlReg, (UINT16) ~0x3c00, (UINT16) (7 << 10));\r
- IoOr16 (PmCtrlReg, BIT13);\r
- CpuDeadLoop ();\r
-\r
- ASSERT (FALSE);\r
-}\r
-\r
-/**\r
- Calling this function causes the system to enter a power state for capsule\r
- update.\r
-\r
- Reset update should not return, if it returns, it means the system does\r
- not support capsule update.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-EnterS3WithImmediateWake (\r
- VOID\r
- )\r
-{\r
- AcpiPmControl (5);\r
- ASSERT (FALSE);\r
-}\r
-\r
-/**\r
- This function causes a systemwide reset. The exact type of the reset is\r
- defined by the EFI_GUID that follows the Null-terminated Unicode string passed\r
- into ResetData. If the platform does not recognize the EFI_GUID in ResetData\r
- the platform must pick a supported reset type to perform.The platform may\r
- optionally log the parameters from any non-normal reset that occurs.\r
-\r
- @param[in] DataSize The size, in bytes, of ResetData.\r
- @param[in] ResetData The data buffer starts with a Null-terminated string,\r
- followed by the EFI_GUID.\r
-**/\r
-VOID\r
-EFIAPI\r
-ResetPlatformSpecific (\r
- IN UINTN DataSize,\r
- IN VOID *ResetData\r
- )\r
-{\r
- ResetCold ();\r
-}\r
-\r
-/**\r
- The ResetSystem function resets the entire platform.\r
-\r
- @param[in] ResetType The type of reset to perform.\r
- @param[in] ResetStatus The status code for the reset.\r
- @param[in] DataSize The size, in bytes, of ResetData.\r
- @param[in] ResetData For a ResetType of EfiResetCold, EfiResetWarm, or EfiResetShutdown\r
- the data buffer starts with a Null-terminated string, optionally\r
- followed by additional binary data. The string is a description\r
- that the caller may use to further indicate the reason for the\r
- system reset.\r
-**/\r
-VOID\r
-EFIAPI\r
-ResetSystem (\r
- IN EFI_RESET_TYPE ResetType,\r
- IN EFI_STATUS ResetStatus,\r
- IN UINTN DataSize,\r
- IN VOID *ResetData OPTIONAL\r
- )\r
-{\r
- switch (ResetType) {\r
- case EfiResetWarm:\r
- ResetWarm ();\r
- break;\r
-\r
- case EfiResetCold:\r
- ResetCold ();\r
- break;\r
-\r
- case EfiResetShutdown:\r
- ResetShutdown ();\r
- return;\r
-\r
- case EfiResetPlatformSpecific:\r
- ResetPlatformSpecific (DataSize, ResetData);\r
- return;\r
-\r
- default:\r
- return;\r
- }\r
-}\r
+++ /dev/null
-## @file\r
-# Library instance for ResetSystem library class for coreboot\r
-#\r
-# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
-# SPDX-License-Identifier: BSD-2-Clause-Patent\r
-#\r
-##\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = ResetSystemLib\r
- FILE_GUID = C5CD4EEE-527F-47df-9C92-B41414AF7479\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = ResetSystemLib\r
-\r
-#\r
-# The following information is for reference only and not required by the build tools.\r
-#\r
-# VALID_ARCHITECTURES = IA32 X64\r
-#\r
-\r
-[Sources]\r
- ResetSystemLib.c\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- CorebootModulePkg/CorebootModulePkg.dec\r
- \r
-[LibraryClasses]\r
- DebugLib\r
- IoLib\r
- HobLib\r
- \r
-[Guids] \r
- gUefiAcpiBoardInfoGuid\r
-\r
projects / mirror_edk2.git / commitdiff