UefiCpuPkg/MpInitLib: Set the SW exit fields when performing VMGEXIT

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008

All fields that are set in the GHCB should have their associated bit in
the GHCB ValidBitmap field set. Add support to set the bits for the
software exit information fields when performing a VMGEXIT (SwExitCode,
SwExitInfo1, SwExitInfo2).

Fixes: 20da7ca42a33d3ef767ce4129f11496af7f67c9f
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Acked-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <6e11dd7e161bddeacc3fb4817467cef24510c31c.1604685192.git.thomas.lendacky@amd.com>

diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
index 5d30f35b201c5520ea881f98974378aa6e9382a6..5532a1d391bc78f0931bac3d8971a4287e35d8a7 100644 (file)
--- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
@@ -533,6 +533,12 @@ BITS 64
 \r
     mov        rax, 0x80000004   ; VMGEXIT AP_RESET_HOLD\r
     mov        [rdx + 0x390], rax\r
+    mov        rax, 114          ; Set SwExitCode valid bit\r
+    bts        [rdx + 0x3f0], rax\r
+    inc        rax               ; Set SwExitInfo1 valid bit\r
+    bts        [rdx + 0x3f0], rax\r
+    inc        rax               ; Set SwExitInfo2 valid bit\r
+    bts        [rdx + 0x3f0], rax\r
 \r
     pop        rdx\r
     pop        rcx\r