OvmfPkg/CloudHv: Remove Q35 specifics

Anything specific to the QEMU Q35 platform is not relevant for the
CloudHv target.

Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>

diff --git a/OvmfPkg/CloudHv/CloudHvX64.dsc b/OvmfPkg/CloudHv/CloudHvX64.dsc
index d9dcde9f3deffae52a4254ee478995162a090cdc..961b1775c4021b6e4244a5c6764e001b14660d13 100644 (file)
--- a/OvmfPkg/CloudHv/CloudHvX64.dsc
+++ b/OvmfPkg/CloudHv/CloudHvX64.dsc
@@ -533,14 +533,6 @@
   gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F\r
 !endif\r
 \r
-  # This PCD is used to set the base address of the PCI express hierarchy. It\r
-  # is only consulted when OVMF runs on Q35. In that case it is programmed into\r
-  # the PCIEXBAR register.\r
-  #\r
-  # On Q35 machine types that QEMU intends to support in the long term, QEMU\r
-  # never lets the RAM below 4 GB exceed 2816 MB.\r
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000\r
-\r
 !if $(SOURCE_DEBUG_ENABLE) == TRUE\r
   gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2\r
 !endif\r
@@ -631,8 +623,6 @@
   gUefiCpuPkgTokenSpaceGuid.PcdSevEsIsEnabled|0\r
 \r
 !if $(SMM_REQUIRE) == TRUE\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase|FALSE\r
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x01\r
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|100000\r
 !endif\r