--- /dev/null
+/** @file \r
+ Defines library APIs used by modules to save EFI Boot Script Opcodes. \r
+ These OpCode will be restored by S3 related modules. \r
+ Note that some of the API defined in the Library class may not \r
+ be provided in the Framework version library instance, which means some of these \r
+ APIs cannot be used if the underlying firmware is Framework and not PI.\r
+\r
+ Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions\r
+ of the BSD License which accompanies this distribution. The\r
+ full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef _S3_BOOT_SCRIPT_LIB_H_\r
+#define _S3_BOOT_SCRIPT_LIB_H_\r
+\r
+#include <Library/BaseLib.h>\r
+#include <IndustryStandard/SmBus.h>\r
+\r
+/**\r
+ Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an\r
+ address that can be passed to the S3 Boot Script Library PCI functions.\r
+\r
+ @param Bus PCI Bus number. Range 0..255.\r
+ @param Device PCI Device number. Range 0..31.\r
+ @param Function PCI Function number. Range 0..7.\r
+ @param Register PCI Register number. Range 0..255 for PCI. Range 0..4095\r
+ for PCI Express.\r
+\r
+ @return The encoded PCI address.\r
+\r
+**/\r
+#define S3_BOOT_SCRIPT_LIB_PCI_ADDRESS(Bus,Device,Function,Register) \\r
+ (UINT64) ( \\r
+ (((UINTN) Bus) << 24) | \\r
+ (((UINTN) Device) << 16) | \\r
+ (((UINTN) Function) << 8) | \\r
+ (((UINTN) (Register)) < 256 ? ((UINTN) (Register)) : (UINT64) (LShiftU64 ((UINT64) (Register), 32))))\r
+ \r
+///\r
+/// S3 Boot Script Width.\r
+///\r
+typedef enum {\r
+ S3BootScriptWidthUint8, ///< 8-bit operation.\r
+ S3BootScriptWidthUint16, ///< 16-bit operation.\r
+ S3BootScriptWidthUint32, ///< 32-bit operation. \r
+ S3BootScriptWidthUint64, ///< 64-bit operation.\r
+ S3BootScriptWidthFifoUint8, ///< 8-bit FIFO operation.\r
+ S3BootScriptWidthFifoUint16, ///< 16-bit FIFO operation.\r
+ S3BootScriptWidthFifoUint32, ///< 32-bit FIFO operation.\r
+ S3BootScriptWidthFifoUint64, ///< 64-bit FIFO operation.\r
+ S3BootScriptWidthFillUint8, ///< 8-bit Fill operation.\r
+ S3BootScriptWidthFillUint16, ///< 16-bit Fill operation.\r
+ S3BootScriptWidthFillUint32, ///< 32-bit Fill operation.\r
+ S3BootScriptWidthFillUint64, ///< 64-bit Fill operation.\r
+ S3BootScriptWidthMaximum\r
+} S3_BOOT_SCRIPT_LIB_WIDTH;\r
+\r
+/**\r
+ Save I/O write to boot script.\r
+\r
+ @param[in] Width The width of the I/O operations.\r
+ @param[in] Address The base address of the I/O operations.\r
+ @param[in] Count The number of I/O operations to perform.\r
+ @param[in] Buffer The source buffer from which to write data.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform \r
+ the operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveIoWrite (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN VOID *Buffer\r
+ );\r
+\r
+/**\r
+ Adds a record for an I/O modify operation into a S3 boot script table.\r
+\r
+ @param[in] Width The width of the I/O operations.\r
+ @param[in] Address The base address of the I/O operations.\r
+ @param[in] Data A pointer to the data to be OR-ed.\r
+ @param[in] DataMask A pointer to the data mask to be AND-ed with the data\r
+ read from the register.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform \r
+ the operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveIoReadWrite (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN VOID *Data,\r
+ IN VOID *DataMask\r
+ );\r
+\r
+/**\r
+ Adds a record for a memory write operation into a specified boot script table.\r
+\r
+ @param[in] Width The width of the I/O operations.\r
+ @param[in] Address The base address of the memory operations\r
+ @param[in] Count The number of memory operations to perform.\r
+ @param[in] Buffer The source buffer from which to write the data.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform \r
+ the operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveMemWrite (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN VOID *Buffer\r
+ );\r
+\r
+/**\r
+ Adds a record for a memory modify operation into a specified boot script table.\r
+\r
+ @param[in] Width The width of the I/O operations.\r
+ @param[in] Address The base address of the memory operations. Address needs \r
+ alignment, if required\r
+ @param[in] Data A pointer to the data to be OR-ed.\r
+ @param[in] DataMask A pointer to the data mask to be AND-ed with the data \r
+ read from the register.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform \r
+ the operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveMemReadWrite (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN VOID *Data,\r
+ IN VOID *DataMask\r
+ );\r
+\r
+/**\r
+ Adds a record for a PCI configuration space write operation into a specified boot script table.\r
+\r
+ @param[in] Width The width of the I/O operations.\r
+ @param[in] Address The address within the PCI configuration space.\r
+ @param[in] Count The number of PCI operations to perform.\r
+ @param[in] Buffer The source buffer from which to write the data.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform \r
+ the operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSavePciCfgWrite (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN VOID *Buffer\r
+ );\r
+\r
+/**\r
+ Adds a record for a PCI configuration space modify operation into a specified boot script table.\r
+\r
+ @param[in] Width The width of the I/O operations.\r
+ @param[in] Address The address within the PCI configuration space.\r
+ @param[in] Data A pointer to the data to be OR-ed.The size depends on Width.\r
+ @param[in] DataMask A pointer to the data mask to be AND-ed.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform \r
+ the operation.\r
+ @retval RETURN__SUCCESS The opcode was added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSavePciCfgReadWrite (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN VOID *Data,\r
+ IN VOID *DataMask\r
+ );\r
+\r
+/**\r
+ Adds a record for a PCI configuration space modify operation into a specified boot script table.\r
+\r
+ @param[in] Width The width of the I/O operations.\r
+ @param[in] Segment The PCI segment number for Address.\r
+ @param[in] Address The address within the PCI configuration space.\r
+ @param[in] Count The number of PCI operations to perform.\r
+ @param[in] Buffer The source buffer from which to write the data.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform \r
+ the operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSavePciCfg2Write (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT16 Segment,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN VOID *Buffer\r
+ );\r
+\r
+/**\r
+ Adds a record for a PCI configuration space modify operation into a specified boot script table.\r
+\r
+ @param[in] Width The width of the I/O operations.\r
+ @param[in] Segment The PCI segment number for Address.\r
+ @param[in] Address The address within the PCI configuration space.\r
+ @param[in] Data A pointer to the data to be OR-ed. The size depends on Width.\r
+ @param[in] DataMask A pointer to the data mask to be AND-ed.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform \r
+ the operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSavePciCfg2ReadWrite (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT16 Segment,\r
+ IN UINT64 Address,\r
+ IN VOID *Data,\r
+ IN VOID *DataMask\r
+ );\r
+\r
+/**\r
+ Adds a record for an SMBus command execution into a specified boot script table.\r
+\r
+ @param[in] SmBusAddress Address that encodes the SMBUS Slave Address, SMBUS \r
+ Command, SMBUS Data Length, and PEC.\r
+ @param[in] Operation Indicates which particular SMBus protocol it will use \r
+ to execute the SMBus transactions.\r
+ @param[in] Length A pointer to signify the number of bytes that this \r
+ operation will do.\r
+ @param[in] Buffer Contains the value of data to execute to the SMBUS \r
+ slave device.\r
+ \r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform \r
+ the operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveSmbusExecute (\r
+ IN UINTN SmBusAddress, \r
+ IN EFI_SMBUS_OPERATION Operation,\r
+ IN UINTN *Length,\r
+ IN VOID *Buffer\r
+ );\r
+\r
+/**\r
+ Adds a record for an execution stall on the processor into a specified boot script table.\r
+\r
+ @param[in] Duration The duration in microseconds of the stall.\r
+ \r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform \r
+ the operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveStall (\r
+ IN UINTN Duration\r
+ );\r
+\r
+/**\r
+ Adds a record for an execution stall on the processor into a specified boot script table.\r
+\r
+ @param[in] EntryPoint The entry point of the code to be dispatched.\r
+ @param[in] Context The argument to be passed into the EntryPoint of the code \r
+ to be dispatched.\r
+ \r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform \r
+ the operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveDispatch2 (\r
+ IN VOID *EntryPoint,\r
+ IN VOID *Context\r
+ );\r
+\r
+/**\r
+ Adds a record for dispatching specified arbitrary code into a specified boot script table.\r
+\r
+ @param[in] EntryPoint The entry point of the code to be dispatched.\r
+ \r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform \r
+ the operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveDispatch (\r
+ IN VOID *EntryPoint\r
+ );\r
+\r
+/**\r
+ Adds a record for memory reads of the memory location and continues when the exit \r
+ criteria is satisfied, or after a defined duration.\r
+ \r
+ @param[in] Width The width of the memory operations.\r
+ @param[in] Address The base address of the memory operations.\r
+ @param[in] BitMask A pointer to the bit mask to be AND-ed with the data read \r
+ from the register.\r
+ @param[in] BitValue A pointer to the data value after to be Masked.\r
+ @param[in] Duration The duration in microseconds of the stall.\r
+ @param[in] LoopTimes The times of the register polling.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform \r
+ the operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveMemPoll (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN VOID *BitMask,\r
+ IN VOID *BitValue,\r
+ IN UINTN Duration,\r
+ IN UINTN LoopTimes\r
+ );\r
+\r
+/**\r
+ Store arbitrary information in the boot script table. This opcode is a no-op on \r
+ dispatch and is only used for debugging script issues.\r
+ \r
+ @param[in] InformationLength Length of the data in bytes\r
+ @param[in] Information Information to be logged in the boot scrpit\r
+ \r
+ @retval RETURN_UNSUPPORTED In runtime, this method is not supported.\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform \r
+ the operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveInformation (\r
+ IN UINT32 InformationLength, \r
+ IN VOID *Information\r
+ );\r
+/**\r
+ Adds a record for I/O reads the I/O location and continues when the exit criteria\r
+ is satisfied, or after a defined duration.\r
+ \r
+ @param Width The width of the I/O operations. \r
+ @param Address The base address of the I/O operations.\r
+ @param Data The comparison value used for the polling exit criteria.\r
+ @param DataMask The mask used for the polling criteria. The bits in \r
+ the bytes below Width which are zero in Data are \r
+ ignored when polling the memory address.\r
+ @param Delay The number of 100ns units to poll. Note that timer \r
+ available may be of insufficient granularity, so the \r
+ delay may be longer.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform the \r
+ operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+ @note The FRAMEWORK version implementation does not support this API \r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveIoPoll (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN VOID *Data,\r
+ IN VOID *DataMask, \r
+ IN UINT64 Delay \r
+ );\r
+\r
+/**\r
+ Adds a record for PCI configuration space reads and continues when the exit \r
+ criteria is satisfied ,or after a defined duration.\r
+\r
+ @param Width The width of the I/O operations. \r
+ @param Address The address within the PCI configuration space.\r
+ @param Data The comparison value used for the polling exit \r
+ criteria.\r
+ @param DataMask Mask used for the polling criteria. The bits in \r
+ the bytes below Width which are zero in Data are\r
+ ignored when polling the memory address.\r
+ @param Delay The number of 100ns units to poll. Note that timer \r
+ available may be of insufficient granularity, so the \r
+ delay may be longer.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform the \r
+ operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+ @note The FRAMEWORK version implementation does not support this API \r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSavePciPoll (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN VOID *Data,\r
+ IN VOID *DataMask,\r
+ IN UINT64 Delay\r
+ );\r
+/**\r
+ Adds a record for PCI configuration space reads and continues when the exit criteria \r
+ is satisfied, or after a defined duration.\r
+\r
+ @param Width The width of the I/O operations. \r
+ @param Segment The PCI segment number for Address.\r
+ @param Address The address within the PCI configuration space.\r
+ @param Data The comparison value used for the polling exit \r
+ criteria.\r
+ @param DataMask Mask used for the polling criteria. The bits in \r
+ the bytes below Width which are zero\r
+ in Data are ignored when polling the memory address\r
+ @param Delay The number of 100ns units to poll. Note that timer \r
+ available may be of insufficient granularity so the delay \r
+ may be longer.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform the \r
+ operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+ @note A known Limitations in the implementation: When interpreting the opcode \r
+ EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE, EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE\r
+ and EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE, the 'Segment' parameter is assumed as \r
+ Zero, or else, assert.\r
+ The FRAMEWORK version implementation does not support this API.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSavePci2Poll (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT16 Segment,\r
+ IN UINT64 Address,\r
+ IN VOID *Data,\r
+ IN VOID *DataMask,\r
+ IN UINT64 Delay\r
+ );\r
+/**\r
+ Save ASCII string information specified by Buffer to boot script with opcode \r
+ EFI_BOOT_SCRIPT_INFORMATION_OPCODE.\r
+\r
+ @param[in] String The Null-terminated ASCII string to store into the S3 boot \r
+ script table.\r
+\r
+ @retval RETURN_UNSUPPORTED In runtime, this method is not supported.\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform \r
+ the operation.\r
+ @retval RETURN_SUCCESS The opcode was added.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveInformationAsciiString (\r
+ IN CONST CHAR8 *String\r
+ );\r
+\r
+/**\r
+ This is an function to close the S3 boot script table. The function could only \r
+ be called in BOOT time phase. To comply with the Framework spec definition on \r
+ EFI_BOOT_SCRIPT_SAVE_PROTOCOL.CloseTable(), this function will fulfill following things:\r
+ 1. Closes the specified boot script table\r
+ 2. It allocates a new memory pool to duplicate all the boot scripts in the specified table. \r
+ Once this function is called, the table maintained by the library will be destroyed \r
+ after it is copied into the allocated pool.\r
+ 3. Any attempts to add a script record after calling this function will cause a \r
+ new table to be created by the library.\r
+ 4. The base address of the allocated pool will be returned in Address. Note that \r
+ after using the boot script table, the CALLER is responsible for freeing the \r
+ pool that is allocated by this function. \r
+\r
+ In Spec PI1.1, this EFI_BOOT_SCRIPT_SAVE_PROTOCOL.CloseTable() is retired. This \r
+ API is supplied here to meet the requirements of the Framework Spec.\r
+ \r
+ If anyone does call CloseTable() on a real platform, then the caller is responsible\r
+ for figuring out how to get the script to run on an S3 resume because the boot script \r
+ maintained by the lib will be destroyed.\r
+ \r
+ @return the base address of the new copy of the boot script tble. \r
+\r
+**/\r
+UINT8*\r
+EFIAPI\r
+S3BootScriptCloseTable (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Executes the S3 boot script table.\r
+\r
+ @retval RETURN_SUCCESS The boot script table was executed successfully.\r
+ @retval RETURN_UNSUPPORTED Invalid script table or opcode. \r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptExecute (\r
+ VOID\r
+ );\r
+/**\r
+ Move the last boot script entry to the position \r
+\r
+ @param BeforeOrAfter Specifies whether the opcode is stored before \r
+ (TRUE) or after (FALSE) the positionin the boot \r
+ script table specified by Position. If Position \r
+ is NULL or points to NULL then the new opcode is \r
+ inserted at the beginning of the table (if TRUE) \r
+ or end of the table (if FALSE).\r
+ @param Position On entry, specifies the position in the boot script \r
+ table where the opcode will be inserted, either \r
+ before or after, depending on BeforeOrAfter. On \r
+ exit, specifies the position of the inserted opcode \r
+ in the boot script table.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES The table is not available.\r
+ @retval RETURN_INVALID_PARAMETER The Position is not a valid position in the \r
+ boot script table.\r
+ @retval RETURN_SUCCESS The opcode was inserted.\r
+ @note The FRAMEWORK version implementation does not support this API. \r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptMoveLastOpcode (\r
+ IN BOOLEAN BeforeOrAfter,\r
+ IN OUT VOID **Position OPTIONAL\r
+ );\r
+/**\r
+ Find a label within the boot script table and, if not present, optionally create it.\r
+\r
+ @param BeforeOrAfter Specifies whether the opcode is stored before (TRUE)\r
+ or after (FALSE) the position in the boot script table \r
+ specified by Position.\r
+ @param CreateIfNotFound Specifies whether the label will be created if the \r
+ label does not exists (TRUE) or not (FALSE).\r
+ @param Position On entry, specifies the position in the boot script \r
+ table where the opcode will be inserted, either \r
+ before or after, depending on BeforeOrAfter. On exit, \r
+ specifies the positionof the inserted opcode in \r
+ the boot script table.\r
+ @param Label Points to the label which will be inserted in the \r
+ boot script table.\r
+ @retval EFI_SUCCESS The operation succeeded. A record was added into \r
+ the specified script table.\r
+ @retval EFI_INVALID_PARAMETER The parameter is illegal or the given boot script \r
+ is not supported. If the opcode is unknow or not \r
+ supported because of the PCD Feature Flags.\r
+ @retval EFI_OUT_OF_RESOURCES There is insufficient memory to store the boot script.\r
+ @note The FRAMEWORK version implementation does not support this API \r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI \r
+S3BootScriptLabel (\r
+ IN BOOLEAN BeforeOrAfter,\r
+ IN BOOLEAN CreateIfNotFound,\r
+ IN OUT VOID **Position OPTIONAL,\r
+ IN CONST CHAR8 *Label\r
+ );\r
+/**\r
+ Compare two positions in the boot script table and return their relative position.\r
+ @param Position1 The positions in the boot script table to compare\r
+ @param Position2 The positions in the boot script table to compare\r
+ @param RelativePosition On return, points to the result of the comparison\r
+\r
+ @retval EFI_SUCCESS The operation succeeded. A record was added into the\r
+ specified script table.\r
+ @retval EFI_INVALID_PARAMETER The parameter is illegal or the given boot script \r
+ is not supported. If the opcode is unknow or not s\r
+ upported because of the PCD Feature Flags.\r
+ @retval EFI_OUT_OF_RESOURCES There is insufficient memory to store the boot script.\r
+ @note The FRAMEWORK version implementation does not support this API \r
+**/\r
+RETURN_STATUS\r
+EFIAPI \r
+S3BootScriptCompare (\r
+ IN UINT8 *Position1,\r
+ IN UINT8 *Position2,\r
+ OUT UINTN *RelativePosition\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ I/O and MMIO Library Services that do I/O and also enable the I/O operation\r
+ to be replayed during an S3 resume. This library class maps directly on top\r
+ of the IoLib class. \r
+\r
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions\r
+ of the BSD License which accompanies this distribution. The\r
+ full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef __S3_IO_LIB_H__\r
+#define __S3_IO_LIB_H__\r
+\r
+/**\r
+ Reads an 8-bit I/O port and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r
+ This function must guarantee that all I/O read and write operations are\r
+ serialized.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to read.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoRead8 (\r
+ IN UINTN Port\r
+ );\r
+\r
+/**\r
+ Writes an 8-bit I/O port, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Writes the 8-bit I/O port specified by Port with the value specified by Value\r
+ and returns Value. This function must guarantee that all I/O read and write\r
+ operations are serialized.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] Value The value to write to the I/O port.\r
+\r
+ @return The value written the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoWrite8 (\r
+ IN UINTN Port,\r
+ IN UINT8 Value\r
+ );\r
+\r
+/**\r
+ Reads an 8-bit I/O port, performs a bitwise OR, writes the\r
+ result back to the 8-bit I/O port, and saves the value in the S3 script to be\r
+ replayed on S3 resume.\r
+\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise OR\r
+ between the read result and the value specified by OrData, and writes the\r
+ result to the 8-bit I/O port specified by Port. The value written to the I/O\r
+ port is returned. This function must guarantee that all I/O read and write\r
+ operations are serialized.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] OrData The value to OR with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoOr8 (\r
+ IN UINTN Port,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads an 8-bit I/O port, performs a bitwise AND, writes the result back\r
+ to the 8-bit I/O port, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, and writes the result to\r
+ the 8-bit I/O port specified by Port. The value written to the I/O port is\r
+ returned. This function must guarantee that all I/O read and write operations\r
+ are serialized.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] AndData The value to AND with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoAnd8 (\r
+ IN UINTN Port,\r
+ IN UINT8 AndData\r
+ );\r
+\r
+/**\r
+ Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise\r
+ inclusive OR, writes the result back to the 8-bit I/O port, and saves \r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, performs a bitwise OR\r
+ between the result of the AND operation and the value specified by OrData,\r
+ and writes the result to the 8-bit I/O port specified by Port. The value\r
+ written to the I/O port is returned. This function must guarantee that all\r
+ I/O read and write operations are serialized.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] AndData The value to AND with the read value from the I/O port.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoAndThenOr8 (\r
+ IN UINTN Port,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of an I/O register, and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Reads the bit field in an 8-bit I/O register. The bit field is specified by\r
+ the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to read.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoBitFieldRead8 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to an I/O register and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the I/O register. The bit field is specified\r
+ by the StartBit and the EndBit. All other bits in the destination I/O\r
+ register are preserved. The value written to the I/O port is returned. \r
+ Remaining bits in Value are stripped.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] Value New value of the bit field.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoBitFieldWrite8 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit port, performs a bitwise OR, writes the\r
+ result back to the bit field in the 8-bit port, and saves the value in the \r
+ S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise OR\r
+ between the read result and the value specified by OrData, and writes the\r
+ result to the 8-bit I/O port specified by Port. The value written to the I/O\r
+ port is returned. This function must guarantee that all I/O read and write\r
+ operations are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] OrData The value to OR with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoBitFieldOr8 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit port, performs a bitwise AND, writes the\r
+ result back to the bit field in the 8-bit port, and saves the value in the \r
+ S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, and writes the result to\r
+ the 8-bit I/O port specified by Port. The value written to the I/O port is\r
+ returned. This function must guarantee that all I/O read and write operations\r
+ are serialized. Extra left bits in AndData are stripped.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] AndData The value to AND with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoBitFieldAnd8 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
+ bitwise OR, writes the result back to the bit field in the\r
+ 8-bit port, and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed\r
+ by a bitwise OR between the read result and the value specified by\r
+ AndData, and writes the result to the 8-bit I/O port specified by Port. The\r
+ value written to the I/O port is returned. This function must guarantee that\r
+ all I/O read and write operations are serialized. Extra left bits in both\r
+ AndData and OrData are stripped.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] AndData The value to AND with the read value from the I/O port.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoBitFieldAndThenOr8 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 16-bit I/O port, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r
+ This function must guarantee that all I/O read and write operations are\r
+ serialized.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to read.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoRead16 (\r
+ IN UINTN Port\r
+ );\r
+\r
+/**\r
+ Writes a 16-bit I/O port, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Writes the 16-bit I/O port specified by Port with the value specified by Value\r
+ and returns Value. This function must guarantee that all I/O read and write\r
+ operations are serialized.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] Value The value to write to the I/O port.\r
+\r
+ @return The value written the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoWrite16 (\r
+ IN UINTN Port,\r
+ IN UINT16 Value\r
+ );\r
+\r
+/**\r
+ Reads a 16-bit I/O port, performs a bitwise OR, writes the\r
+ result back to the 16-bit I/O port, and saves the value in the S3 script to \r
+ be replayed on S3 resume.\r
+\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise OR\r
+ between the read result and the value specified by OrData, and writes the\r
+ result to the 16-bit I/O port specified by Port. The value written to the I/O\r
+ port is returned. This function must guarantee that all I/O read and write\r
+ operations are serialized.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] OrData The value to OR with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoOr16 (\r
+ IN UINTN Port,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 16-bit I/O port, performs a bitwise AND, writes the result back\r
+ to the 16-bit I/O port , and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, and writes the result to\r
+ the 16-bit I/O port specified by Port. The value written to the I/O port is\r
+ returned. This function must guarantee that all I/O read and write operations\r
+ are serialized.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] AndData The value to AND with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoAnd16 (\r
+ IN UINTN Port,\r
+ IN UINT16 AndData\r
+ );\r
+\r
+/**\r
+ Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise\r
+ inclusive OR, writes the result back to the 16-bit I/O port, and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, performs a bitwise OR\r
+ between the result of the AND operation and the value specified by OrData,\r
+ and writes the result to the 16-bit I/O port specified by Port. The value\r
+ written to the I/O port is returned. This function must guarantee that all\r
+ I/O read and write operations are serialized.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] AndData The value to AND with the read value from the I/O port.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoAndThenOr16 (\r
+ IN UINTN Port,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of an I/O register saves the value in the S3 script to be\r
+ replayed on S3 resume.\r
+\r
+ Reads the bit field in a 16-bit I/O register. The bit field is specified by\r
+ the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to read.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoBitFieldRead16 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to an I/O register, and saves the value in the S3 script \r
+ to be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the I/O register. The bit field is specified\r
+ by the StartBit and the EndBit. All other bits in the destination I/O\r
+ register are preserved. The value written to the I/O port is returned. Extra\r
+ left bits in Value are stripped.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] Value New value of the bit field.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoBitFieldWrite16 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit port, performs a bitwise OR, writes the\r
+ result back to the bit field in the 16-bit port, and saves the value in the \r
+ S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise OR\r
+ between the read result and the value specified by OrData, and writes the\r
+ result to the 16-bit I/O port specified by Port. The value written to the I/O\r
+ port is returned. This function must guarantee that all I/O read and write\r
+ operations are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] OrData The value to OR with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoBitFieldOr16 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit port, performs a bitwise AND, writes the\r
+ result back to the bit field in the 16-bit port, and saves the value in the \r
+ S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, and writes the result to\r
+ the 16-bit I/O port specified by Port. The value written to the I/O port is\r
+ returned. This function must guarantee that all I/O read and write operations\r
+ are serialized. Extra left bits in AndData are stripped.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] AndData The value to AND with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoBitFieldAnd16 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
+ bitwise OR, writes the result back to the bit field in the\r
+ 16-bit port, and saves the value in the S3 script to be replayed on S3 \r
+ resume.\r
+\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed\r
+ by a bitwise OR between the read result and the value specified by\r
+ AndData, and writes the result to the 16-bit I/O port specified by Port. The\r
+ value written to the I/O port is returned. This function must guarantee that\r
+ all I/O read and write operations are serialized. Extra left bits in both\r
+ AndData and OrData are stripped.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] AndData The value to AND with the read value from the I/O port.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoBitFieldAndThenOr16 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 32-bit I/O port, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r
+ This function must guarantee that all I/O read and write operations are\r
+ serialized.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to read.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoRead32 (\r
+ IN UINTN Port\r
+ );\r
+\r
+/**\r
+ Writes a 32-bit I/O port, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Writes the 32-bit I/O port specified by Port with the value specified by Value\r
+ and returns Value. This function must guarantee that all I/O read and write\r
+ operations are serialized.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] Value The value to write to the I/O port.\r
+\r
+ @return The value written the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoWrite32 (\r
+ IN UINTN Port,\r
+ IN UINT32 Value\r
+ );\r
+\r
+/**\r
+ Reads a 32-bit I/O port, performs a bitwise OR, writes the\r
+ result back to the 32-bit I/O port, and saves the value in the S3 script to \r
+ be replayed on S3 resume.\r
+\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise OR\r
+ between the read result and the value specified by OrData, and writes the\r
+ result to the 32-bit I/O port specified by Port. The value written to the I/O\r
+ port is returned. This function must guarantee that all I/O read and write\r
+ operations are serialized.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] OrData The value to OR with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoOr32 (\r
+ IN UINTN Port,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 32-bit I/O port, performs a bitwise AND, writes the result back\r
+ to the 32-bit I/O port, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, and writes the result to\r
+ the 32-bit I/O port specified by Port. The value written to the I/O port is\r
+ returned. This function must guarantee that all I/O read and write operations\r
+ are serialized.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] AndData The value to AND with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoAnd32 (\r
+ IN UINTN Port,\r
+ IN UINT32 AndData\r
+ );\r
+\r
+/**\r
+ Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise\r
+ inclusive OR, writes the result back to the 32-bit I/O port, and saves \r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, performs a bitwise OR\r
+ between the result of the AND operation and the value specified by OrData,\r
+ and writes the result to the 32-bit I/O port specified by Port. The value\r
+ written to the I/O port is returned. This function must guarantee that all\r
+ I/O read and write operations are serialized.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] AndData The value to AND with the read value from the I/O port.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoAndThenOr32 (\r
+ IN UINTN Port,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of an I/O register, and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Reads the bit field in a 32-bit I/O register. The bit field is specified by\r
+ the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to read.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoBitFieldRead32 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to an I/O register, and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the I/O register. The bit field is specified\r
+ by the StartBit and the EndBit. All other bits in the destination I/O\r
+ register are preserved. The value written to the I/O port is returned. Extra\r
+ left bits in Value are stripped.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] Value New value of the bit field.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoBitFieldWrite32 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit port, performs a bitwise OR, writes the\r
+ result back to the bit field in the 32-bit port, and saves the value in the \r
+ S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise OR\r
+ between the read result and the value specified by OrData, and writes the\r
+ result to the 32-bit I/O port specified by Port. The value written to the I/O\r
+ port is returned. This function must guarantee that all I/O read and write\r
+ operations are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] OrData The value to OR with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoBitFieldOr32 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit port, performs a bitwise AND, writes the\r
+ result back to the bit field in the 32-bit port, and saves the value in the \r
+ S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, and writes the result to\r
+ the 32-bit I/O port specified by Port. The value written to the I/O port is\r
+ returned. This function must guarantee that all I/O read and write operations\r
+ are serialized. Extra left bits in AndData are stripped.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] AndData The value to AND with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoBitFieldAnd32 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
+ bitwise OR, writes the result back to the bit field in the\r
+ 32-bit port, and saves the value in the S3 script to be replayed on S3 \r
+ resume.\r
+\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed\r
+ by a bitwise OR between the read result and the value specified by\r
+ AndData, and writes the result to the 32-bit I/O port specified by Port. The\r
+ value written to the I/O port is returned. This function must guarantee that\r
+ all I/O read and write operations are serialized. Extra left bits in both\r
+ AndData and OrData are stripped.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] AndData The value to AND with the read value from the I/O port.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoBitFieldAndThenOr32 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 64-bit I/O port, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r
+ This function must guarantee that all I/O read and write operations are\r
+ serialized.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to read.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoRead64 (\r
+ IN UINTN Port\r
+ );\r
+\r
+/**\r
+ Writes a 64-bit I/O port, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Writes the 64-bit I/O port specified by Port with the value specified by Value\r
+ and returns Value. This function must guarantee that all I/O read and write\r
+ operations are serialized.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] Value The value to write to the I/O port.\r
+\r
+ @return The value written to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoWrite64 (\r
+ IN UINTN Port,\r
+ IN UINT64 Value\r
+ );\r
+\r
+/**\r
+ Reads a 64-bit I/O port, performs a bitwise OR, writes the\r
+ result back to the 64-bit I/O port, and saves the value in the S3 script to \r
+ be replayed on S3 resume.\r
+\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise OR\r
+ between the read result and the value specified by OrData, and writes the\r
+ result to the 64-bit I/O port specified by Port. The value written to the I/O\r
+ port is returned. This function must guarantee that all I/O read and write\r
+ operations are serialized.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] OrData The value to OR with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoOr64 (\r
+ IN UINTN Port,\r
+ IN UINT64 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 64-bit I/O port, performs a bitwise AND, writes the result back\r
+ to the 64-bit I/O port, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, and writes the result to\r
+ the 64-bit I/O port specified by Port. The value written to the I/O port is\r
+ returned. This function must guarantee that all I/O read and write operations\r
+ are serialized.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] AndData The value to AND with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoAnd64 (\r
+ IN UINTN Port,\r
+ IN UINT64 AndData\r
+ );\r
+\r
+/**\r
+ Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise\r
+ inclusive OR, writes the result back to the 64-bit I/O port, and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, performs a bitwise OR\r
+ between the result of the AND operation and the value specified by OrData,\r
+ and writes the result to the 64-bit I/O port specified by Port. The value\r
+ written to the I/O port is returned. This function must guarantee that all\r
+ I/O read and write operations are serialized.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] AndData The value to AND with the read value from the I/O port.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoAndThenOr64 (\r
+ IN UINTN Port,\r
+ IN UINT64 AndData,\r
+ IN UINT64 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of an I/O register, and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Reads the bit field in a 64-bit I/O register. The bit field is specified by\r
+ the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to read.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoBitFieldRead64 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to an I/O register, and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the I/O register. The bit field is specified\r
+ by the StartBit and the EndBit. All other bits in the destination I/O\r
+ register are preserved. The value written to the I/O port is returned. Extra\r
+ left bits in Value are stripped.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] Value New value of the bit field.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoBitFieldWrite64 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 64-bit port, performs a bitwise OR, writes the\r
+ result back to the bit field in the 64-bit port, and saves the value in the \r
+ S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise OR\r
+ between the read result and the value specified by OrData, and writes the\r
+ result to the 64-bit I/O port specified by Port. The value written to the I/O\r
+ port is returned. This function must guarantee that all I/O read and write\r
+ operations are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] OrData The value to OR with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoBitFieldOr64 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 64-bit port, performs a bitwise AND, writes the\r
+ result back to the bit field in the 64-bit port, and saves the value in the \r
+ S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, and writes the result to\r
+ the 64-bit I/O port specified by Port. The value written to the I/O port is\r
+ returned. This function must guarantee that all I/O read and write operations\r
+ are serialized. Extra left bits in AndData are stripped.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] AndData The value to AND with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoBitFieldAnd64 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 64-bit port, performs a bitwise AND followed by a\r
+ bitwise OR, writes the result back to the bit field in the\r
+ 64-bit port, and saves the value in the S3 script to be replayed on S3 \r
+ resume.\r
+\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed\r
+ by a bitwise OR between the read result and the value specified by\r
+ AndData, and writes the result to the 64-bit I/O port specified by Port. The\r
+ value written to the I/O port is returned. This function must guarantee that\r
+ all I/O read and write operations are serialized. Extra left bits in both\r
+ AndData and OrData are stripped.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Port The I/O port to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] AndData The value to AND with the read value from the I/O port.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoBitFieldAndThenOr64 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 AndData,\r
+ IN UINT64 OrData\r
+ );\r
+\r
+/**\r
+ Reads an 8-bit MMIO register, and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r
+ returned. This function must guarantee that all MMIO read and write\r
+ operations are serialized.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to read.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioRead8 (\r
+ IN UINTN Address\r
+ );\r
+\r
+/**\r
+ Writes an 8-bit MMIO register, and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Writes the 8-bit MMIO register specified by Address with the value specified\r
+ by Value and returns Value. This function must guarantee that all MMIO read\r
+ and write operations are serialized.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] Value The value to write to the MMIO register.\r
+\r
+ @return The value written the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioWrite8 (\r
+ IN UINTN Address,\r
+ IN UINT8 Value\r
+ );\r
+\r
+/**\r
+ Reads an 8-bit MMIO register, performs a bitwise OR, writes the\r
+ result back to the 8-bit MMIO register, and saves the value in the S3 script \r
+ to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise\r
+ inclusive OR between the read result and the value specified by OrData, and\r
+ writes the result to the 8-bit MMIO register specified by Address. The value\r
+ written to the MMIO register is returned. This function must guarantee that\r
+ all MMIO read and write operations are serialized.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] OrData The value to OR with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioOr8 (\r
+ IN UINTN Address,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads an 8-bit MMIO register, performs a bitwise AND, writes the result\r
+ back to the 8-bit MMIO register, and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, and writes the\r
+ result to the 8-bit MMIO register specified by Address. The value written to\r
+ the MMIO register is returned. This function must guarantee that all MMIO\r
+ read and write operations are serialized.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] AndData The value to AND with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioAnd8 (\r
+ IN UINTN Address,\r
+ IN UINT8 AndData\r
+ );\r
+\r
+/**\r
+ Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise\r
+ inclusive OR, writes the result back to the 8-bit MMIO register, and saves \r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, performs a\r
+ bitwise OR between the result of the AND operation and the value specified by\r
+ OrData, and writes the result to the 8-bit MMIO register specified by\r
+ Address. The value written to the MMIO register is returned. This function\r
+ must guarantee that all MMIO read and write operations are serialized.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] AndData The value to AND with the read value from the MMIO register.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioAndThenOr8 (\r
+ IN UINTN Address,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of a MMIO register, and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Reads the bit field in an 8-bit MMIO register. The bit field is specified by\r
+ the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address MMIO register to read.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioBitFieldRead8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to an MMIO register, and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the MMIO register. The bit field is\r
+ specified by the StartBit and the EndBit. All other bits in the destination\r
+ MMIO register are preserved. The new value of the 8-bit register is returned.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] Value New value of the bit field.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioBitFieldWrite8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, \r
+ writes the result back to the bit field in the 8-bit MMIO register, and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise\r
+ inclusive OR between the read result and the value specified by OrData, and\r
+ writes the result to the 8-bit MMIO register specified by Address. The value\r
+ written to the MMIO register is returned. This function must guarantee that\r
+ all MMIO read and write operations are serialized. Extra left bits in OrData\r
+ are stripped.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] OrData The value to OR with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioBitFieldOr8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and\r
+ writes the result back to the bit field in the 8-bit MMIO register, and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, and writes the\r
+ result to the 8-bit MMIO register specified by Address. The value written to\r
+ the MMIO register is returned. This function must guarantee that all MMIO\r
+ read and write operations are serialized. Extra left bits in AndData are\r
+ stripped.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] AndData The value to AND with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioBitFieldAnd8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed\r
+ by a bitwise OR, writes the result back to the bit field in the\r
+ 8-bit MMIO register, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
+ followed by a bitwise OR between the read result and the value\r
+ specified by AndData, and writes the result to the 8-bit MMIO register\r
+ specified by Address. The value written to the MMIO register is returned.\r
+ This function must guarantee that all MMIO read and write operations are\r
+ serialized. Extra left bits in both AndData and OrData are stripped.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] AndData The value to AND with the read value from the MMIO register.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioBitFieldAndThenOr8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 16-bit MMIO register, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r
+ returned. This function must guarantee that all MMIO read and write\r
+ operations are serialized.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to read.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioRead16 (\r
+ IN UINTN Address\r
+ );\r
+\r
+/**\r
+ Writes a 16-bit MMIO register, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Writes the 16-bit MMIO register specified by Address with the value specified\r
+ by Value and returns Value. This function must guarantee that all MMIO read\r
+ and write operations are serialized, and saves the value in the S3 script to be\r
+ replayed on S3 resume.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] Value The value to write to the MMIO register.\r
+\r
+ @return The value written the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioWrite16 (\r
+ IN UINTN Address,\r
+ IN UINT16 Value\r
+ );\r
+\r
+/**\r
+ Reads a 16-bit MMIO register, performs a bitwise OR, writes the\r
+ result back to the 16-bit MMIO register, and saves the value in the S3 script \r
+ to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise\r
+ inclusive OR between the read result and the value specified by OrData, and\r
+ writes the result to the 16-bit MMIO register specified by Address. The value\r
+ written to the MMIO register is returned. This function must guarantee that\r
+ all MMIO read and write operations are serialized.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] OrData The value to OR with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioOr16 (\r
+ IN UINTN Address,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 16-bit MMIO register, performs a bitwise AND, writes the result\r
+ back to the 16-bit MMIO register, and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, and writes the\r
+ result to the 16-bit MMIO register specified by Address. The value written to\r
+ the MMIO register is returned. This function must guarantee that all MMIO\r
+ read and write operations are serialized.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] AndData The value to AND with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioAnd16 (\r
+ IN UINTN Address,\r
+ IN UINT16 AndData\r
+ );\r
+\r
+/**\r
+ Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise\r
+ inclusive OR, writes the result back to the 16-bit MMIO register, and \r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, performs a\r
+ bitwise OR between the result of the AND operation and the value specified by\r
+ OrData, and writes the result to the 16-bit MMIO register specified by\r
+ Address. The value written to the MMIO register is returned. This function\r
+ must guarantee that all MMIO read and write operations are serialized.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] AndData The value to AND with the read value from the MMIO register.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioAndThenOr16 (\r
+ IN UINTN Address,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of a MMIO register, and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Reads the bit field in a 16-bit MMIO register. The bit field is specified by\r
+ the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address MMIO register to read.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioBitFieldRead16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to a MMIO register, and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the MMIO register. The bit field is\r
+ specified by the StartBit and the EndBit. All other bits in the destination\r
+ MMIO register are preserved. The new value of the 16-bit register is returned.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] Value New value of the bit field.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioBitFieldWrite16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, \r
+ writes the result back to the bit field in the 16-bit MMIO register, and \r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise\r
+ inclusive OR between the read result and the value specified by OrData, and\r
+ writes the result to the 16-bit MMIO register specified by Address. The value\r
+ written to the MMIO register is returned. This function must guarantee that\r
+ all MMIO read and write operations are serialized. Extra left bits in OrData\r
+ are stripped.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] OrData The value to OR with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioBitFieldOr16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and\r
+ writes the result back to the bit field in the 16-bit MMIO register and \r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, and writes the\r
+ result to the 16-bit MMIO register specified by Address. The value written to\r
+ the MMIO register is returned. This function must guarantee that all MMIO\r
+ read and write operations are serialized. Extra left bits in AndData are\r
+ stripped.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] AndData The value to AND with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioBitFieldAnd16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed\r
+ by a bitwise OR, writes the result back to the bit field in the\r
+ 16-bit MMIO register, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
+ followed by a bitwise OR between the read result and the value\r
+ specified by AndData, and writes the result to the 16-bit MMIO register\r
+ specified by Address. The value written to the MMIO register is returned.\r
+ This function must guarantee that all MMIO read and write operations are\r
+ serialized. Extra left bits in both AndData and OrData are stripped.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] AndData The value to AND with the read value from the MMIO register.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioBitFieldAndThenOr16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 32-bit MMIO register saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r
+ returned. This function must guarantee that all MMIO read and write\r
+ operations are serialized.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to read.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioRead32 (\r
+ IN UINTN Address\r
+ );\r
+\r
+/**\r
+ Writes a 32-bit MMIO register, and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Writes the 32-bit MMIO register specified by Address with the value specified\r
+ by Value and returns Value. This function must guarantee that all MMIO read\r
+ and write operations are serialized.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] Value The value to write to the MMIO register.\r
+\r
+ @return The value written the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioWrite32 (\r
+ IN UINTN Address,\r
+ IN UINT32 Value\r
+ );\r
+\r
+/**\r
+ Reads a 32-bit MMIO register, performs a bitwise OR, writes the\r
+ result back to the 32-bit MMIO register, and saves the value in the S3 script \r
+ to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise\r
+ inclusive OR between the read result and the value specified by OrData, and\r
+ writes the result to the 32-bit MMIO register specified by Address. The value\r
+ written to the MMIO register is returned. This function must guarantee that\r
+ all MMIO read and write operations are serialized.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] OrData The value to OR with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioOr32 (\r
+ IN UINTN Address,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 32-bit MMIO register, performs a bitwise AND, writes the result\r
+ back to the 32-bit MMIO register, and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, and writes the\r
+ result to the 32-bit MMIO register specified by Address. The value written to\r
+ the MMIO register is returned. This function must guarantee that all MMIO\r
+ read and write operations are serialized.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] AndData The value to AND with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioAnd32 (\r
+ IN UINTN Address,\r
+ IN UINT32 AndData\r
+ );\r
+\r
+/**\r
+ Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise\r
+ inclusive OR, writes the result back to the 32-bit MMIO register, and \r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, performs a\r
+ bitwise OR between the result of the AND operation and the value specified by\r
+ OrData, and writes the result to the 32-bit MMIO register specified by\r
+ Address. The value written to the MMIO register is returned. This function\r
+ must guarantee that all MMIO read and write operations are serialized.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] AndData The value to AND with the read value from the MMIO register.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioAndThenOr32 (\r
+ IN UINTN Address,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of a MMIO register, and saves the value in the S3 script \r
+ to be replayed on S3 resume.\r
+\r
+ Reads the bit field in a 32-bit MMIO register. The bit field is specified by\r
+ the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address MMIO register to read.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioBitFieldRead32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to a MMIO register, and saves the value in the S3 script \r
+ to be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the MMIO register. The bit field is\r
+ specified by the StartBit and the EndBit. All other bits in the destination\r
+ MMIO register are preserved. The new value of the 32-bit register is returned.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] Value New value of the bit field.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioBitFieldWrite32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, \r
+ writes the result back to the bit field in the 32-bit MMIO register, and \r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise\r
+ inclusive OR between the read result and the value specified by OrData, and\r
+ writes the result to the 32-bit MMIO register specified by Address. The value\r
+ written to the MMIO register is returned. This function must guarantee that\r
+ all MMIO read and write operations are serialized. Extra left bits in OrData\r
+ are stripped.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] OrData The value to OR with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioBitFieldOr32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and\r
+ writes the result back to the bit field in the 32-bit MMIO register and \r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, and writes the\r
+ result to the 32-bit MMIO register specified by Address. The value written to\r
+ the MMIO register is returned. This function must guarantee that all MMIO\r
+ read and write operations are serialized. Extra left bits in AndData are\r
+ stripped.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] AndData The value to AND with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioBitFieldAnd32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed\r
+ by a bitwise OR, writes the result back to the bit field in the\r
+ 32-bit MMIO register, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
+ followed by a bitwise OR between the read result and the value\r
+ specified by AndData, and writes the result to the 32-bit MMIO register\r
+ specified by Address. The value written to the MMIO register is returned.\r
+ This function must guarantee that all MMIO read and write operations are\r
+ serialized. Extra left bits in both AndData and OrData are stripped.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] AndData The value to AND with the read value from the MMIO register.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioBitFieldAndThenOr32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 64-bit MMIO register, and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r
+ returned. This function must guarantee that all MMIO read and write\r
+ operations are serialized.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to read.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioRead64 (\r
+ IN UINTN Address\r
+ );\r
+\r
+/**\r
+ Writes a 64-bit MMIO register, and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Writes the 64-bit MMIO register specified by Address with the value specified\r
+ by Value and returns Value. This function must guarantee that all MMIO read\r
+ and write operations are serialized.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] Value The value to write to the MMIO register.\r
+\r
+ @return The value written the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioWrite64 (\r
+ IN UINTN Address,\r
+ IN UINT64 Value\r
+ );\r
+\r
+/**\r
+ Reads a 64-bit MMIO register, performs a bitwise OR, writes the\r
+ result back to the 64-bit MMIO register, and saves the value in the S3 script \r
+ to be replayed on S3 resume.\r
+\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise\r
+ inclusive OR between the read result and the value specified by OrData, and\r
+ writes the result to the 64-bit MMIO register specified by Address. The value\r
+ written to the MMIO register is returned. This function must guarantee that\r
+ all MMIO read and write operations are serialized.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] OrData The value to OR with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioOr64 (\r
+ IN UINTN Address,\r
+ IN UINT64 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 64-bit MMIO register, performs a bitwise AND, writes the result\r
+ back to the 64-bit MMIO register, and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, and writes the\r
+ result to the 64-bit MMIO register specified by Address. The value written to\r
+ the MMIO register is returned. This function must guarantee that all MMIO\r
+ read and write operations are serialized.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] AndData The value to AND with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioAnd64 (\r
+ IN UINTN Address,\r
+ IN UINT64 AndData\r
+ );\r
+\r
+/**\r
+ Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise\r
+ inclusive OR, writes the result back to the 64-bit MMIO register, and \r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, performs a\r
+ bitwise OR between the result of the AND operation and the value specified by\r
+ OrData, and writes the result to the 64-bit MMIO register specified by\r
+ Address. The value written to the MMIO register is returned. This function\r
+ must guarantee that all MMIO read and write operations are serialized.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] AndData The value to AND with the read value from the MMIO register.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioAndThenOr64 (\r
+ IN UINTN Address,\r
+ IN UINT64 AndData,\r
+ IN UINT64 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of a MMIO register saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Reads the bit field in a 64-bit MMIO register. The bit field is specified by\r
+ the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address MMIO register to read.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioBitFieldRead64 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to a MMIO register, and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the MMIO register. The bit field is\r
+ specified by the StartBit and the EndBit. All other bits in the destination\r
+ MMIO register are preserved. The new value of the 64-bit register is returned.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] Value New value of the bit field.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioBitFieldWrite64 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, \r
+ writes the result back to the bit field in the 64-bit MMIO register, and \r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise\r
+ inclusive OR between the read result and the value specified by OrData, and\r
+ writes the result to the 64-bit MMIO register specified by Address. The value\r
+ written to the MMIO register is returned. This function must guarantee that\r
+ all MMIO read and write operations are serialized. Extra left bits in OrData\r
+ are stripped.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] OrData The value to OR with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioBitFieldOr64 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and\r
+ writes the result back to the bit field in the 64-bit MMIO register, and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, and writes the\r
+ result to the 64-bit MMIO register specified by Address. The value written to\r
+ the MMIO register is returned. This function must guarantee that all MMIO\r
+ read and write operations are serialized. Extra left bits in AndData are\r
+ stripped.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] AndData The value to AND with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioBitFieldAnd64 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed\r
+ by a bitwise OR, writes the result back to the bit field in the\r
+ 64-bit MMIO register, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
+ followed by a bitwise OR between the read result and the value\r
+ specified by AndData, and writes the result to the 64-bit MMIO register\r
+ specified by Address. The value written to the MMIO register is returned.\r
+ This function must guarantee that all MMIO read and write operations are\r
+ serialized. Extra left bits in both AndData and OrData are stripped.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The MMIO register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+ @param[in] AndData The value to AND with the read value from the MMIO register.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioBitFieldAndThenOr64 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 AndData,\r
+ IN UINT64 OrData\r
+ );\r
+\r
+/**\r
+ Copies data from MMIO region to system memory by using 8-bit access,\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Copy data from MMIO region specified by starting address StartAddress \r
+ to system memory specified by Buffer by using 8-bit access. The total \r
+ number of bytes to be copied is specified by Length. Buffer is returned.\r
+ \r
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+\r
+ @param[in] StartAddress Starting address for the MMIO region to be copied from.\r
+ @param[in] Length Size in bytes of the copy.\r
+ @param[out] Buffer Pointer to a system memory buffer receiving the data read.\r
+\r
+ @return Buffer.\r
+\r
+**/\r
+UINT8 *\r
+EFIAPI\r
+S3MmioReadBuffer8 (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Length,\r
+ OUT UINT8 *Buffer\r
+ );\r
+\r
+/**\r
+ Copies data from MMIO region to system memory by using 16-bit access,\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Copy data from MMIO region specified by starting address StartAddress \r
+ to system memory specified by Buffer by using 16-bit access. The total \r
+ number of bytes to be copied is specified by Length. Buffer is returned.\r
+ \r
+ If StartAddress is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+ If Length is not aligned on a 16-bit boundary, then ASSERT().\r
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param[in] StartAddress Starting address for the MMIO region to be copied from.\r
+ @param[in] Length Size in bytes of the copy.\r
+ @param[out] Buffer Pointer to a system memory buffer receiving the data read.\r
+\r
+ @return Buffer.\r
+\r
+**/\r
+UINT16 *\r
+EFIAPI\r
+S3MmioReadBuffer16 (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Length,\r
+ OUT UINT16 *Buffer\r
+ );\r
+\r
+/**\r
+ Copies data from MMIO region to system memory by using 32-bit access,\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Copy data from MMIO region specified by starting address StartAddress \r
+ to system memory specified by Buffer by using 32-bit access. The total \r
+ number of byte to be copied is specified by Length. Buffer is returned.\r
+ \r
+ If StartAddress is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+ If Length is not aligned on a 32-bit boundary, then ASSERT().\r
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param[in] StartAddress Starting address for the MMIO region to be copied from.\r
+ @param[in] Length Size in bytes of the copy.\r
+ @param[out] Buffer Pointer to a system memory buffer receiving the data read.\r
+\r
+ @return Buffer.\r
+\r
+**/\r
+UINT32 *\r
+EFIAPI\r
+S3MmioReadBuffer32 (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Length,\r
+ OUT UINT32 *Buffer\r
+ );\r
+\r
+/**\r
+ Copies data from MMIO region to system memory by using 64-bit access,\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Copy data from MMIO region specified by starting address StartAddress \r
+ to system memory specified by Buffer by using 64-bit access. The total \r
+ number of byte to be copied is specified by Length. Buffer is returned.\r
+ \r
+ If StartAddress is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+ If Length is not aligned on a 64-bit boundary, then ASSERT().\r
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+ @param[in] StartAddress Starting address for the MMIO region to be copied from.\r
+ @param[in] Length Size in bytes of the copy.\r
+ @param[out] Buffer Pointer to a system memory buffer receiving the data read.\r
+\r
+ @return Buffer.\r
+\r
+**/\r
+UINT64 *\r
+EFIAPI\r
+S3MmioReadBuffer64 (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Length,\r
+ OUT UINT64 *Buffer\r
+ );\r
+\r
+/**\r
+ Copies data from system memory to MMIO region by using 8-bit access,\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Copy data from system memory specified by Buffer to MMIO region specified \r
+ by starting address StartAddress by using 8-bit access. The total number \r
+ of byte to be copied is specified by Length. Buffer is returned.\r
+ \r
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().\r
+\r
+\r
+ @param[in] StartAddress Starting address for the MMIO region to be copied to.\r
+ @param[in] Length Size in bytes of the copy.\r
+ @param[in] Buffer Pointer to a system memory buffer containing the data to write.\r
+\r
+ @return Buffer.\r
+\r
+**/\r
+UINT8 *\r
+EFIAPI\r
+S3MmioWriteBuffer8 (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Length,\r
+ IN CONST UINT8 *Buffer\r
+ );\r
+\r
+/**\r
+ Copies data from system memory to MMIO region by using 16-bit access,\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Copy data from system memory specified by Buffer to MMIO region specified \r
+ by starting address StartAddress by using 16-bit access. The total number \r
+ of bytes to be copied is specified by Length. Buffer is returned.\r
+ \r
+ If StartAddress is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().\r
+\r
+ If Length is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param[in] StartAddress Starting address for the MMIO region to be copied to.\r
+ @param[in] Length Size in bytes of the copy.\r
+ @param[in] Buffer Pointer to a system memory buffer containing the data to write.\r
+\r
+ @return Buffer.\r
+\r
+**/\r
+UINT16 *\r
+EFIAPI\r
+S3MmioWriteBuffer16 (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Length,\r
+ IN CONST UINT16 *Buffer\r
+ );\r
+\r
+/**\r
+ Copies data from system memory to MMIO region by using 32-bit access,\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Copy data from system memory specified by Buffer to MMIO region specified \r
+ by starting address StartAddress by using 32-bit access. The total number \r
+ of bytes to be copied is specified by Length. Buffer is returned.\r
+ \r
+ If StartAddress is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().\r
+\r
+ If Length is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param[in] StartAddress Starting address for the MMIO region to be copied to.\r
+ @param[in] Length Size in bytes of the copy.\r
+ @param[in] Buffer Pointer to a system memory buffer containing the data to write.\r
+\r
+ @return Buffer.\r
+\r
+**/\r
+UINT32 *\r
+EFIAPI\r
+S3MmioWriteBuffer32 (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Length,\r
+ IN CONST UINT32 *Buffer\r
+ );\r
+\r
+/**\r
+ Copies data from system memory to MMIO region by using 64-bit access, \r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Copy data from system memory specified by Buffer to MMIO region specified \r
+ by starting address StartAddress by using 64-bit access. The total number \r
+ of bytes to be copied is specified by Length. Buffer is returned.\r
+ \r
+ If StartAddress is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().\r
+\r
+ If Length is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+ @param[in] StartAddress Starting address for the MMIO region to be copied to.\r
+ @param[in] Length Size in bytes of the copy.\r
+ @param[in] Buffer Pointer to a system memory buffer containing the data to write.\r
+\r
+ @return Buffer.\r
+\r
+**/\r
+UINT64 *\r
+EFIAPI\r
+S3MmioWriteBuffer64 (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Length,\r
+ IN CONST UINT64 *Buffer\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ The PCI configuration Library Services that carry out PCI configuration and enable\r
+ the PCI operations to be replayed during an S3 resume. This library class\r
+ maps directly on top of the PciLib class. \r
+\r
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions\r
+ of the BSD License which accompanies this distribution. The\r
+ full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef __S3_PCI_LIB_H__\r
+#define __S3_PCI_LIB_H__\r
+\r
+/**\r
+ Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an\r
+ address that can be passed to the S3 PCI Library functions.\r
+\r
+ @param Bus The PCI Bus number. Range 0..255.\r
+ @param Device The PCI Device number. Range 0..31.\r
+ @param Function The PCI Function number. Range 0..7.\r
+ @param Register The PCI Register number. Range 0..255 for PCI. Range 0..4095\r
+ for PCI Express.\r
+\r
+ @return The encoded PCI address.\r
+\r
+**/\r
+#define S3_PCI_LIB_ADDRESS(Bus,Device,Function,Register) \\r
+ (((Register) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))\r
+\r
+/**\r
+ \r
+ Reads and returns the 8-bit PCI configuration register specified by Address, \r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+\r
+ @return The value read from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciRead8 (\r
+ IN UINTN Address\r
+ );\r
+\r
+/**\r
+ Writes an 8-bit PCI configuration register, and saves the value in the S3\r
+ script to be replayed on S3 resume.\r
+\r
+ Writes the 8-bit PCI configuration register specified by Address with the\r
+ value specified by Value. Value is returned. This function must guarantee\r
+ that all PCI read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param[in] Value The value to write.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciWrite8 (\r
+ IN UINTN Address,\r
+ IN UINT8 Value\r
+ );\r
+\r
+/**\r
+ Performs a bitwise OR of an 8-bit PCI configuration register with\r
+ an 8-bit value, and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise OR between the read result and the value specified by\r
+ OrData, and writes the result to the 8-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param[in] OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciOr8 (\r
+ IN UINTN Address,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+ value, and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 8-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param[in] AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciAnd8 (\r
+ IN UINTN Address,\r
+ IN UINT8 AndData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+ value, followed a bitwise OR with another 8-bit value, and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise OR between the result of the AND operation and\r
+ the value specified by OrData, and writes the result to the 8-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param[in] AndData The value to AND with the PCI configuration register.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciAndThenOr8 (\r
+ IN UINTN Address,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register, and saves the value in\r
+ the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is\r
+ specified by the StartBit and the EndBit. The value of the bit field is\r
+ returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The PCI configuration register to read.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+\r
+ @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciBitFieldRead8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register, and saves the value in\r
+ the S3 script to be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the PCI configuration register. The bit\r
+ field is specified by the StartBit and the EndBit. All other bits in the\r
+ destination PCI configuration register are preserved. The new value of the\r
+ 8-bit register is returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The PCI configuration register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] Value New value of the bit field.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciBitFieldWrite8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 8-bit port, and saves the value\r
+ in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise OR between the read result and the value specified by\r
+ OrData, and writes the result to the 8-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The PCI configuration register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciBitFieldOr8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise\r
+ AND, and writes the result back to the bit field in the 8-bit register and\r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 8-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized. Extra left bits in AndData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The PCI configuration register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciBitFieldAnd8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit Address, performs a bitwise AND followed by a\r
+ bitwise OR, and writes the result back to the bit field in the\r
+ 8-bit port, and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND followed by a bitwise OR between the read result and\r
+ the value specified by AndData, and writes the result to the 8-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized. Extra left bits in both AndData and\r
+ OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The PCI configuration register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param[in] AndData The value to AND with the PCI configuration register.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciBitFieldAndThenOr8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 16-bit PCI configuration register, and saves the value in the S3\r
+ script to be replayed on S3 resume.\r
+\r
+ Reads and returns the 16-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+\r
+ @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciRead16 (\r
+ IN UINTN Address\r
+ );\r
+\r
+/**\r
+ Writes a 16-bit PCI configuration register, and saves the value in the S3\r
+ script to be replayed on S3 resume.\r
+\r
+ Writes the 16-bit PCI configuration register specified by Address with the\r
+ value specified by Value. Value is returned. This function must guarantee\r
+ that all PCI read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param[in] Value The value to write.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciWrite16 (\r
+ IN UINTN Address,\r
+ IN UINT16 Value\r
+ );\r
+\r
+/**\r
+ Performs a bitwise OR of a 16-bit PCI configuration register with\r
+ a 16-bit value, and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise OR between the read result and the value specified by\r
+ OrData, and writes the result to the 16-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param[in] OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciOr16 (\r
+ IN UINTN Address,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+ value, and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 16-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param[in] AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciAnd16 (\r
+ IN UINTN Address,\r
+ IN UINT16 AndData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+ value, followed a bitwise OR with another 16-bit value, and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise OR between the result of the AND operation and\r
+ the value specified by OrData, and writes the result to the 16-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param[in] AndData The value to AND with the PCI configuration register.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciAndThenOr16 (\r
+ IN UINTN Address,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register, and saves the value in\r
+ the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is\r
+ specified by the StartBit and the EndBit. The value of the bit field is\r
+ returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The PCI configuration register to read.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+\r
+ @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciBitFieldRead16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register, and saves the value in\r
+ the S3 script to be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the PCI configuration register. The bit\r
+ field is specified by the StartBit and the EndBit. All other bits in the\r
+ destination PCI configuration register are preserved. The new value of the\r
+ 16-bit register is returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The PCI configuration register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] Value New value of the bit field.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciBitFieldWrite16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 16-bit port, and saves the value\r
+ in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise OR between the read result and the value specified by\r
+ OrData, and writes the result to the 16-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The PCI configuration register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciBitFieldOr16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise\r
+ AND, and writes the result back to the bit field in the 16-bit register and\r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 16-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized. Extra left bits in AndData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The PCI configuration register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciBitFieldAnd16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit Address, performs a bitwise AND followed by a\r
+ bitwise OR, and writes the result back to the bit field in the\r
+ 16-bit port, and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND followed by a bitwise OR between the read result and\r
+ the value specified by AndData, and writes the result to the 16-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized. Extra left bits in both AndData and\r
+ OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The PCI configuration register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param[in] AndData The value to AND with the PCI configuration register.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciBitFieldAndThenOr16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 32-bit PCI configuration register, and saves the value in the S3\r
+ script to be replayed on S3 resume.\r
+\r
+ Reads and returns the 32-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+\r
+ @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciRead32 (\r
+ IN UINTN Address\r
+ );\r
+\r
+/**\r
+ Writes a 32-bit PCI configuration register, and saves the value in the S3\r
+ script to be replayed on S3 resume.\r
+\r
+ Writes the 32-bit PCI configuration register specified by Address with the\r
+ value specified by Value. Value is returned. This function must guarantee\r
+ that all PCI read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param[in] Value The value to write.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciWrite32 (\r
+ IN UINTN Address,\r
+ IN UINT32 Value\r
+ );\r
+\r
+/**\r
+ Performs a bitwise OR of a 32-bit PCI configuration register with\r
+ a 32-bit value, and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise OR between the read result and the value specified by\r
+ OrData, and writes the result to the 32-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param[in] OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciOr32 (\r
+ IN UINTN Address,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+ value, and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 32-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param[in] AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciAnd32 (\r
+ IN UINTN Address,\r
+ IN UINT32 AndData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+ value, followed a bitwise OR with another 32-bit value, and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise OR between the result of the AND operation and\r
+ the value specified by OrData, and writes the result to the 32-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param[in] AndData The value to AND with the PCI configuration register.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciAndThenOr32 (\r
+ IN UINTN Address,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register, and saves the value in\r
+ the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is\r
+ specified by the StartBit and the EndBit. The value of the bit field is\r
+ returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The PCI configuration register to read.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+\r
+ @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciBitFieldRead32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register, and saves the value in\r
+ the S3 script to be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the PCI configuration register. The bit\r
+ field is specified by the StartBit and the EndBit. All other bits in the\r
+ destination PCI configuration register are preserved. The new value of the\r
+ 32-bit register is returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The PCI configuration register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] Value New value of the bit field.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciBitFieldWrite32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 32-bit port, and saves the value\r
+ in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise OR between the read result and the value specified by\r
+ OrData, and writes the result to the 32-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The PCI configuration register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciBitFieldOr32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise\r
+ AND, and writes the result back to the bit field in the 32-bit register and\r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 32-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized. Extra left bits in AndData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The PCI configuration register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciBitFieldAnd32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit Address, performs a bitwise AND followed by a\r
+ bitwise OR, and writes the result back to the bit field in the\r
+ 32-bit port, and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND followed by a bitwise OR between the read result and\r
+ the value specified by AndData, and writes the result to the 32-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized. Extra left bits in both AndData and\r
+ OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param[in] Address The PCI configuration register to write.\r
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param[in] AndData The value to AND with the PCI configuration register.\r
+ @param[in] OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciBitFieldAndThenOr32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a range of PCI configuration registers into a caller supplied buffer,\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the range of PCI configuration registers specified by StartAddress and\r
+ Size into the buffer specified by Buffer. This function only allows the PCI\r
+ configuration registers from a single PCI function to be read. Size is\r
+ returned. When possible 32-bit PCI configuration read cycles are used to read\r
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
+ and 16-bit PCI configuration read cycles may be used at the beginning and the\r
+ end of the range.\r
+\r
+ If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
+ If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+ @param[in] StartAddress Starting address that encodes the PCI Bus, Device,\r
+ Function and Register.\r
+ @param[in] Size Size in bytes of the transfer.\r
+ @param[out] Buffer The pointer to a buffer receiving the data read.\r
+\r
+ @return Size.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+S3PciReadBuffer (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Size,\r
+ OUT VOID *Buffer\r
+ );\r
+\r
+/**\r
+ Copies the data in a caller supplied buffer to a specified range of PCI\r
+ configuration space, and saves the value in the S3 script to be replayed on S3\r
+ resume.\r
+\r
+ Writes the range of PCI configuration registers specified by StartAddress and\r
+ Size from the buffer specified by Buffer. This function only allows the PCI\r
+ configuration registers from a single PCI function to be written. Size is\r
+ returned. When possible 32-bit PCI configuration write cycles are used to\r
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,\r
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
+ and the end of the range.\r
+\r
+ If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
+ If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+ @param[in] StartAddress Starting address that encodes the PCI Bus, Device,\r
+ Function and Register.\r
+ @param[in] Size Size in bytes of the transfer.\r
+ @param[in] Buffer The pointer to a buffer containing the data to write.\r
+\r
+ @return Size.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+S3PciWriteBuffer (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Size,\r
+ IN VOID *Buffer\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Smbus Library Services that conduct SMBus transactions and enable the operatation\r
+ to be replayed during an S3 resume. This library class maps directly on top\r
+ of the SmbusLib class.\r
+\r
+ Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions\r
+ of the BSD License which accompanies this distribution. The\r
+ full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef __S3_SMBUS_LIB_H__\r
+#define __S3_SMBUS_LIB_H__\r
+\r
+/**\r
+ Executes an SMBUS quick read command, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address field of SmBusAddress is required.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If PEC is set in SmBusAddress, then ASSERT().\r
+ If Command in SmBusAddress is not zero, then ASSERT().\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param[out] Status The return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+ RETURN_SUCCESS The SMBUS command was executed.\r
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r
+ RETURN_DEVICE_ERROR The request was not completed because a failure\r
+ was recorded in the Host Status Register bit. Device errors are a result\r
+ of a transaction collision, illegal command field, unclaimed cycle\r
+ (host initiated), or bus error (collision).\r
+ RETURN_UNSUPPORTED The SMBus operation is not supported.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+S3SmBusQuickRead (\r
+ IN UINTN SmBusAddress,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ );\r
+\r
+/**\r
+ Executes an SMBUS quick write command, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address field of SmBusAddress is required.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If PEC is set in SmBusAddress, then ASSERT().\r
+ If Command in SmBusAddress is not zero, then ASSERT().\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param[out] Status The return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+ RETURN_SUCCESS The SMBUS command was executed.\r
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r
+ RETURN_DEVICE_ERROR The request was not completed because a failure\r
+ was recorded in the Host Status Register bit. Device errors are a result\r
+ of a transaction collision, illegal command field, unclaimed cycle\r
+ (host initiated), or bus error (collision).\r
+ RETURN_UNSUPPORTED The SMBus operation is not supported.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+S3SmBusQuickWrite (\r
+ IN UINTN SmBusAddress,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ );\r
+\r
+/**\r
+ Executes an SMBUS receive byte command, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address field of SmBusAddress is required.\r
+ The byte received from the SMBUS is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Command in SmBusAddress is not zero, then ASSERT().\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param[out] Status The return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+ RETURN_SUCCESS The SMBUS command was executed.\r
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r
+ RETURN_DEVICE_ERROR The request was not completed because a failure\r
+ was recorded in the Host Status Register bit. Device errors are a result\r
+ of a transaction collision, illegal command field, unclaimed cycle\r
+ (host initiated), or bus error (collision).\r
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).\r
+ RETURN_UNSUPPORTED The SMBus operation is not supported.\r
+\r
+ @return The byte received from the SMBUS.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3SmBusReceiveByte (\r
+ IN UINTN SmBusAddress,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ );\r
+\r
+/**\r
+ Executes an SMBUS send byte command, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress.\r
+ The byte specified by Value is sent.\r
+ Only the SMBUS slave address field of SmBusAddress is required. Value is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Command in SmBusAddress is not zero, then ASSERT().\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param[in] Value The 8-bit value to send.\r
+ @param[out] Status The return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+ RETURN_SUCCESS The SMBUS command was executed.\r
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r
+ RETURN_DEVICE_ERROR The request was not completed because a failure\r
+ was recorded in the Host Status Register bit. Device errors are a result\r
+ of a transaction collision, illegal command field, unclaimed cycle\r
+ (host initiated), or bus errors (collisions).\r
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).\r
+ RETURN_UNSUPPORTED The SMBus operation is not supported.\r
+\r
+ @return The parameter of Value.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3SmBusSendByte (\r
+ IN UINTN SmBusAddress,\r
+ IN UINT8 Value,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ );\r
+\r
+/**\r
+ Executes an SMBUS read data byte command, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ The 8-bit value read from the SMBUS is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param[out] Status The return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+ RETURN_SUCCESS The SMBUS command was executed.\r
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r
+ RETURN_DEVICE_ERROR The request was not completed because a failure\r
+ was recorded in the Host Status Register bit. Device errors are a result\r
+ of a transaction collision, illegal command field, unclaimed cycle\r
+ (host initiated), or bus error (collision).\r
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).\r
+ RETURN_UNSUPPORTED The SMBus operation is not supported.\r
+\r
+ @return The byte read from the SMBUS.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3SmBusReadDataByte (\r
+ IN UINTN SmBusAddress,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ );\r
+\r
+/**\r
+ Executes an SMBUS write data byte command, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress.\r
+ The 8-bit value specified by Value is written.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ Value is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param[in] Value The 8-bit value to write.\r
+ @param[out] Status The return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+ RETURN_SUCCESS The SMBUS command was executed.\r
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r
+ RETURN_DEVICE_ERROR The request was not completed because a failure\r
+ was recorded in the Host Status Register bit. Device errors are a result\r
+ of a transaction collision, illegal command field, unclaimed cycle\r
+ (host initiated), or bus error (collision).\r
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).\r
+ RETURN_UNSUPPORTED The SMBus operation is not supported.\r
+\r
+ @return The parameter of Value.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3SmBusWriteDataByte (\r
+ IN UINTN SmBusAddress,\r
+ IN UINT8 Value,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ );\r
+\r
+/**\r
+ Executes an SMBUS read data word command, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ The 16-bit value read from the SMBUS is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param[out] Status The return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+ RETURN_SUCCESS The SMBUS command was executed.\r
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r
+ RETURN_DEVICE_ERROR The request was not completed because a failure\r
+ was recorded in the Host Status Register bit. Device errors are a result\r
+ of a transaction collision, illegal command field, unclaimed cycle\r
+ (host initiated), or bus error (collision).\r
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).\r
+ RETURN_UNSUPPORTED The SMBus operation is not supported.\r
+\r
+ @return The byte read from the SMBUS.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3SmBusReadDataWord (\r
+ IN UINTN SmBusAddress,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ );\r
+\r
+/**\r
+ Executes an SMBUS write data word command, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress.\r
+ The 16-bit value specified by Value is written.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ Value is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param[in] Value The 16-bit value to write.\r
+ @param[out] Status The return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+ RETURN_SUCCESS The SMBUS command was executed.\r
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r
+ RETURN_DEVICE_ERROR The request was not completed because a failure\r
+ was recorded in the Host Status Register bit. Device errors are a result\r
+ of a transaction collision, illegal command field, unclaimed cycle\r
+ (host initiated), or bus error (collision).\r
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).\r
+ RETURN_UNSUPPORTED The SMBus operation is not supported.\r
+\r
+ @return The parameter of Value.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3SmBusWriteDataWord (\r
+ IN UINTN SmBusAddress,\r
+ IN UINT16 Value,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ );\r
+\r
+/**\r
+ Executes an SMBUS process call command, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress.\r
+ The 16-bit value specified by Value is written.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ The 16-bit value returned by the process call command is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param[in] Value The 16-bit value to write.\r
+ @param[out] Status The return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+ RETURN_SUCCESS The SMBUS command was executed.\r
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r
+ RETURN_DEVICE_ERROR The request was not completed because a failure\r
+ was recorded in the Host Status Register bit. Device errors are a result\r
+ of a transaction collision, illegal command field, unclaimed cycle\r
+ (host initiated), or bus error (collision).\r
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).\r
+ RETURN_UNSUPPORTED The SMBus operation is not supported.\r
+\r
+ @return The 16-bit value returned by the process call command.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3SmBusProcessCall (\r
+ IN UINTN SmBusAddress,\r
+ IN UINT16 Value,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ );\r
+\r
+/**\r
+ Executes an SMBUS read block command, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ Bytes are read from the SMBUS and stored in Buffer.\r
+ The number of bytes read is returned, and will never return a value larger than 32-bytes.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.\r
+ SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If Buffer is NULL, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param[out] Buffer The pointer to the buffer to store the bytes read from the SMBUS.\r
+ @param[out] Status The return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+ RETURN_SUCCESS The SMBUS command was executed.\r
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r
+ RETURN_DEVICE_ERROR The request was not completed because a failure\r
+ was recorded in the Host Status Register bit. Device errors are a result\r
+ of a transaction collision, illegal command field, unclaimed cycle\r
+ (host initiated), or bus error (collision).\r
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).\r
+ RETURN_UNSUPPORTED The SMBus operation is not supported.\r
+\r
+ @return The number of bytes read.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+S3SmBusReadBlock (\r
+ IN UINTN SmBusAddress,\r
+ OUT VOID *Buffer,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ );\r
+\r
+/**\r
+ Executes an SMBUS write block command, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress.\r
+ The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r
+ Bytes are written to the SMBUS from Buffer.\r
+ The number of bytes written is returned, and will never return a value larger than 32-bytes.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r
+ If Buffer is NULL, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param[out] Buffer The pointer to the buffer to store the bytes read from the SMBUS.\r
+ @param[out] Status The return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r
+ RETURN_DEVICE_ERROR The request was not completed because a failure\r
+ was recorded in the Host Status Register bit. Device errors are a result\r
+ of a transaction collision, illegal command field, unclaimed cycle\r
+ (host initiated), or bus error (collision).\r
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).\r
+ RETURN_UNSUPPORTED The SMBus operation is not supported.\r
+\r
+ @return The number of bytes written.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+S3SmBusWriteBlock (\r
+ IN UINTN SmBusAddress,\r
+ OUT VOID *Buffer,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ );\r
+\r
+/**\r
+ Executes an SMBUS block process call command, and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.\r
+ The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r
+ Bytes are written to the SMBUS from WriteBuffer. Bytes are then read from the SMBUS into ReadBuffer.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ It is the caller's responsibility to make sure ReadBuffer is large enough for the total number of bytes read.\r
+ SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r
+ If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r
+ If WriteBuffer is NULL, then ASSERT().\r
+ If ReadBuffer is NULL, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param[in] WriteBuffer The pointer to the buffer of bytes to write to the SMBUS.\r
+ @param[out] ReadBuffer The pointer to the buffer of bytes to read from the SMBUS.\r
+ @param[out] Status The return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r
+ RETURN_DEVICE_ERROR The request was not completed because a failure\r
+ was recorded in the Host Status Register bit. Device errors are a result\r
+ of a transaction collision, illegal command field, unclaimed cycle\r
+ (host initiated), or bus error (collision).\r
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).\r
+ RETURN_UNSUPPORTED The SMBus operation is not supported.\r
+\r
+ @return The number of bytes written.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+S3SmBusBlockProcessCall (\r
+ IN UINTN SmBusAddress,\r
+ IN VOID *WriteBuffer,\r
+ OUT VOID *ReadBuffer,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Stall Services that perform stalls and also enable the Stall operatation\r
+ to be replayed during an S3 resume. This library class maps directly on top\r
+ of the Timer class. \r
+\r
+ Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions\r
+ of the BSD License which accompanies this distribution. The\r
+ full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef __S3_STALL_LIB_H__\r
+#define __S3_STALL_LIB_H__\r
+\r
+/**\r
+ Stalls the CPU for at least the given number of microseconds and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Stalls the CPU for the number of microseconds specified by MicroSeconds.\r
+\r
+ @param[in] MicroSeconds The minimum number of microseconds to delay.\r
+\r
+ @return MicroSeconds.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+S3Stall (\r
+ IN UINTN MicroSeconds\r
+ );\r
+\r
+#endif\r
--- /dev/null
+## @file\r
+# BootScriptLib instance that always produces NOP operation.\r
+#\r
+# This library is primarily used by platform that does not support ACPI S3\r
+# resume. All the library interfaces simply return EFI_SUCCESS without\r
+# performing any operation.\r
+#\r
+# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials are\r
+# licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+##\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = BaseS3BootScriptLibNull\r
+ FILE_GUID = 9A6DC1AC-94C0-43b1-8714-4C70FD58A815\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = S3BootScriptLib\r
+\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+#\r
+\r
+[Sources]\r
+ BootScriptLib.c\r
+\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+\r
--- /dev/null
+/** @file\r
+ Null function implementation for EFI S3 boot script. \r
+\r
+ Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions\r
+ of the BSD License which accompanies this distribution. The\r
+ full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+\r
+#include <Base.h>\r
+#include <Library/S3BootScriptLib.h>\r
+\r
+/**\r
+ Save I/O write to boot script \r
+\r
+ @param Width the width of the I/O operations.Enumerated in S3_BOOT_SCRIPT_LIB_WIDTH.\r
+ @param Address The base address of the I/O operations.\r
+ @param Count The number of I/O operations to perform.\r
+ @param Buffer The source buffer from which to write data.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN_SUCCESS Opcode is added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveIoWrite (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN VOID *Buffer\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+\r
+/**\r
+ Adds a record for an I/O modify operation into a S3 boot script table\r
+\r
+ @param Width The width of the I/O operations.Enumerated in S3_BOOT_SCRIPT_LIB_WIDTH.\r
+ @param Address The base address of the I/O operations.\r
+ @param Data A pointer to the data to be OR-ed.\r
+ @param DataMask A pointer to the data mask to be AND-ed with the data read from the register\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN_SUCCESS Opcode is added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveIoReadWrite (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN VOID *Data,\r
+ IN VOID *DataMask\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+\r
+/**\r
+ Adds a record for a memory write operation into a specified boot script table.\r
+\r
+ @param Width The width of the I/O operations.Enumerated in S3_BOOT_SCRIPT_LIB_WIDTH.\r
+ @param Address The base address of the memory operations\r
+ @param Count The number of memory operations to perform.\r
+ @param Buffer The source buffer from which to write the data.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN_SUCCESS Opcode is added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveMemWrite (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN VOID *Buffer\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+/**\r
+ Adds a record for a memory modify operation into a specified boot script table.\r
+\r
+ @param Width The width of the I/O operations.Enumerated in S3_BOOT_SCRIPT_LIB_WIDTH.\r
+ @param Address The base address of the memory operations. Address needs alignment if required\r
+ @param Data A pointer to the data to be OR-ed.\r
+ @param DataMask A pointer to the data mask to be AND-ed with the data read from the register.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN_SUCCESS Opcode is added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveMemReadWrite (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN VOID *Data,\r
+ IN VOID *DataMask\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+/**\r
+ Adds a record for a PCI configuration space write operation into a specified boot script table.\r
+\r
+ @param Width The width of the I/O operations.Enumerated in S3_BOOT_SCRIPT_LIB_WIDTH.\r
+ @param Address The address within the PCI configuration space.\r
+ @param Count The number of PCI operations to perform.\r
+ @param Buffer The source buffer from which to write the data.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN_SUCCESS Opcode is added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSavePciCfgWrite (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN VOID *Buffer\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+\r
+/**\r
+ Adds a record for a PCI configuration space modify operation into a specified boot script table.\r
+\r
+ @param Width The width of the I/O operations.Enumerated in S3_BOOT_SCRIPT_LIB_WIDTH.\r
+ @param Address The address within the PCI configuration space.\r
+ @param Data A pointer to the data to be OR-ed.The size depends on Width.\r
+ @param DataMask A pointer to the data mask to be AND-ed.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN__SUCCESS Opcode is added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSavePciCfgReadWrite (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN VOID *Data,\r
+ IN VOID *DataMask\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+/**\r
+ Adds a record for a PCI configuration space modify operation into a specified boot script table.\r
+\r
+ @param Width The width of the I/O operations.Enumerated in S3_BOOT_SCRIPT_LIB_WIDTH.\r
+ @param Segment The PCI segment number for Address.\r
+ @param Address The address within the PCI configuration space.\r
+ @param Count The number of PCI operations to perform.\r
+ @param Buffer The source buffer from which to write the data.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN_SUCCESS Opcode is added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSavePciCfg2Write (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT16 Segment,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN VOID *Buffer\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+/**\r
+ Adds a record for a PCI configuration space modify operation into a specified boot script table.\r
+\r
+ @param Width The width of the I/O operations.Enumerated in S3_BOOT_SCRIPT_LIB_WIDTH.\r
+ @param Segment The PCI segment number for Address.\r
+ @param Address The address within the PCI configuration space.\r
+ @param Data A pointer to the data to be OR-ed. The size depends on Width.\r
+ @param DataMask A pointer to the data mask to be AND-ed.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN_SUCCESS Opcode is added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSavePciCfg2ReadWrite (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT16 Segment,\r
+ IN UINT64 Address,\r
+ IN VOID *Data,\r
+ IN VOID *DataMask\r
+ )\r
+{ \r
+ return RETURN_SUCCESS;\r
+}\r
+/**\r
+ Adds a record for an SMBus command execution into a specified boot script table.\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address, SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Operation Indicates which particular SMBus protocol it will use to execute the SMBus\r
+ transactions.\r
+ @param Length A pointer to signify the number of bytes that this operation will do.\r
+ @param Buffer Contains the value of data to execute to the SMBUS slave device.\r
+ \r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN_SUCCESS Opcode is added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveSmbusExecute (\r
+ IN UINTN SmBusAddress, \r
+ IN EFI_SMBUS_OPERATION Operation,\r
+ IN UINTN *Length,\r
+ IN VOID *Buffer\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+/**\r
+ Adds a record for an execution stall on the processor into a specified boot script table.\r
+\r
+ @param Duration Duration in microseconds of the stall\r
+ \r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN_SUCCESS Opcode is added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveStall (\r
+ IN UINTN Duration\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+/**\r
+ Adds a record for dispatching specified arbitrary code into a specified boot script table.\r
+\r
+ @param EntryPoint Entry point of the code to be dispatched.\r
+ \r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN_SUCCESS Opcode is added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveDispatch (\r
+ IN VOID *EntryPoint\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+/**\r
+ Adds a record for an execution stall on the processor into a specified boot script table.\r
+\r
+ @param EntryPoint Entry point of the code to be dispatched.\r
+ @param Context Argument to be passed into the EntryPoint of the code to be dispatched.\r
+ \r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN_SUCCESS Opcode is added.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveDispatch2 (\r
+ IN VOID *EntryPoint,\r
+ IN VOID *Context\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+\r
+/**\r
+ Adds a record for memory reads of the memory location and continues when the exit criteria is\r
+ satisfied or after a defined duration.\r
+ \r
+ @param Width The width of the memory operations.\r
+ @param Address The base address of the memory operations.\r
+ @param BitMask A pointer to the bit mask to be AND-ed with the data read from the register.\r
+ @param BitValue A pointer to the data value after to be Masked.\r
+ @param Duration Duration in microseconds of the stall.\r
+ @param LoopTimes The times of the register polling.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN_SUCCESS Opcode is added.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveMemPoll (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN VOID *BitMask,\r
+ IN VOID *BitValue,\r
+ IN UINTN Duration,\r
+ IN UINTN LoopTimes\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+\r
+/**\r
+ Store arbitrary information in the boot script table. This opcode is a no-op on dispatch and is only\r
+ used for debugging script issues.\r
+ \r
+ @param InformationLength Length of the data in bytes\r
+ @param Information Information to be logged in the boot scrpit\r
+ \r
+ @retval RETURN_UNSUPPORTED If entering runtime, this method will not support.\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN_SUCCESS Opcode is added.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveInformation (\r
+ IN UINT32 InformationLength, \r
+ IN VOID *Information\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+/**\r
+ Adds a record for I/O reads the I/O location and continues when the exit criteria is satisfied or after a\r
+ defined duration.\r
+ \r
+ @param Width The width of the I/O operations. \r
+ @param Address The base address of the I/O operations.\r
+ @param Data The comparison value used for the polling exit criteria.\r
+ @param DataMask Mask used for the polling criteria. The bits in the bytes below Width which are zero\r
+ in Data are ignored when polling the memory address.\r
+ @param Delay The number of 100ns units to poll. Note that timer available may be of poorer\r
+ granularity so the delay may be longer.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN_SUCCESS Opcode is added.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveIoPoll (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN VOID *Data,\r
+ IN VOID *DataMask, \r
+ IN UINT64 Delay \r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+\r
+/**\r
+ Adds a record for PCI configuration space reads and continues when the exit criteria is satisfied or\r
+ after a defined duration.\r
+\r
+ @param Width The width of the I/O operations. \r
+ @param Address The address within the PCI configuration space.\r
+ @param Data The comparison value used for the polling exit criteria.\r
+ @param DataMask Mask used for the polling criteria. The bits in the bytes below Width which are zero\r
+ in Data are ignored when polling the memory address\r
+ @param Delay The number of 100ns units to poll. Note that timer available may be of poorer\r
+ granularity so the delay may be longer.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN_SUCCESS Opcode is added.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSavePciPoll (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN VOID *Data,\r
+ IN VOID *DataMask,\r
+ IN UINT64 Delay\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+/**\r
+ Adds a record for PCI configuration space reads and continues when the exit criteria is satisfied or\r
+ after a defined duration.\r
+\r
+ @param Width The width of the I/O operations. \r
+ @param Segment The PCI segment number for Address.\r
+ @param Address The address within the PCI configuration space.\r
+ @param Data The comparison value used for the polling exit criteria.\r
+ @param DataMask Mask used for the polling criteria. The bits in the bytes below Width which are zero\r
+ in Data are ignored when polling the memory address\r
+ @param Delay The number of 100ns units to poll. Note that timer available may be of poorer\r
+ granularity so the delay may be longer.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation.\r
+ @retval RETURN_SUCCESS Opcode is added.\r
+ @note A known Limitations in the implementation: When interpreting the opcode EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE\r
+ EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE and EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE, the 'Segment' parameter is assumed as \r
+ Zero, or else, assert.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSavePci2Poll (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINT16 Segment,\r
+ IN UINT64 Address,\r
+ IN VOID *Data,\r
+ IN VOID *DataMask,\r
+ IN UINT64 Delay\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+/**\r
+ Save ASCII string information specified by Buffer to\r
+ boot script with opcode EFI_BOOT_SCRIPT_INFORMATION_OPCODE\r
+\r
+ @param String the ascii string to store into the S3 boot script table\r
+\r
+ @retval RETURN_NOT_FOUND BootScriptSave Protocol not exist.\r
+ @retval RETURN_SUCCESS BootScriptSave Protocol exist, always returns RETURN_SUCCESS\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptSaveInformationAsciiString (\r
+ IN CONST CHAR8 *String\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+/**\r
+ This is an function to close the S3 boot script table. The function could only be called in \r
+ BOOT time phase. To comply with the Framework spec definition on \r
+ EFI_BOOT_SCRIPT_SAVE_PROTOCOL.CloseTable(), this function will fulfill following things:\r
+ 1. Closes the specified boot script table\r
+ 2. It allocates a new memory pool to duplicate all the boot scripts in the specified table. \r
+ Once this function is called, the table maintained by the library will be destroyed \r
+ after it is copied into the allocated pool.\r
+ 3. Any attempts to add a script record after calling this function will cause a new table \r
+ to be created by the library.\r
+ 4. The base address of the allocated pool will be returned in Address. Note that after \r
+ using the boot script table, the CALLER is responsible for freeing the pool that is allocated\r
+ by this function. \r
+\r
+ In Spec PI1.1, this EFI_BOOT_SCRIPT_SAVE_PROTOCOL.CloseTable() is retired. By then it is not\r
+ necessary to provide this API in BootScriptLib. To provides this API for now is only to meet\r
+ the requirement from Framework Spec.\r
+ \r
+ If anyone does call CloseTable() on a real platform, then the caller is responsible for figuring out \r
+ how to get the script to run on an S3 resume because the boot script maintained by the lib will be \r
+ destroyed.\r
+ \r
+ @return the base address of the new copy of the boot script tble. \r
+\r
+**/\r
+UINT8*\r
+EFIAPI\r
+S3BootScriptCloseTable (\r
+ VOID\r
+ )\r
+{\r
+ return 0;\r
+}\r
+/**\r
+ Executes the S3 boot script table.\r
+\r
+ @param RETURN_SUCCESS The boot script table was executed successfully.\r
+ @param RETURN_UNSUPPORTED Invalid script table or opcode. \r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptExecute (\r
+ VOID\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+/**\r
+ Move the last boot script entry to the position \r
+\r
+ @param BeforeOrAfter Specifies whether the opcode is stored before (TRUE) or after (FALSE) the position\r
+ in the boot script table specified by Position. If Position is NULL or points to\r
+ NULL then the new opcode is inserted at the beginning of the table (if TRUE) or end\r
+ of the table (if FALSE).\r
+ @param Position On entry, specifies the position in the boot script table where the opcode will be\r
+ inserted, either before or after, depending on BeforeOrAfter. On exit, specifies\r
+ the position of the inserted opcode in the boot script table.\r
+\r
+ @retval RETURN_OUT_OF_RESOURCES The table is not available.\r
+ @retval RETURN_INVALID_PARAMETER The Position is not a valid position in the boot script table.\r
+ @retval RETURN_SUCCESS Opcode is inserted.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+S3BootScriptMoveLastOpcode (\r
+ IN BOOLEAN BeforeOrAfter,\r
+ IN OUT VOID **Position OPTIONAL\r
+)\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+/**\r
+ Find a label within the boot script table and, if not present, optionally create it.\r
+\r
+ @param BeforeOrAfter Specifies whether the opcode is stored before (TRUE)\r
+ or after (FALSE) the position in the boot script table \r
+ specified by Position.\r
+ @param CreateIfNotFound Specifies whether the label will be created if the label \r
+ does not exists (TRUE) or not (FALSE).\r
+ @param Position On entry, specifies the position in the boot script table\r
+ where the opcode will be inserted, either before or after,\r
+ depending on BeforeOrAfter. On exit, specifies the position\r
+ of the inserted opcode in the boot script table.\r
+ @param Label Points to the label which will be inserted in the boot script table.\r
+\r
+ @retval EFI_SUCCESS The operation succeeded. A record was added into the\r
+ specified script table.\r
+ @retval EFI_INVALID_PARAMETER The parameter is illegal or the given boot script is not supported.\r
+ If the opcode is unknow or not supported because of the PCD \r
+ Feature Flags.\r
+ @retval EFI_OUT_OF_RESOURCES There is insufficient memory to store the boot script.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI \r
+S3BootScriptLabel (\r
+ IN BOOLEAN BeforeOrAfter,\r
+ IN BOOLEAN CreateIfNotFound,\r
+ IN OUT VOID **Position OPTIONAL,\r
+ IN CONST CHAR8 *Label\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
+/**\r
+ Compare two positions in the boot script table and return their relative position.\r
+ @param Position1 The positions in the boot script table to compare\r
+ @param Position2 The positions in the boot script table to compare\r
+ @param RelativePosition On return, points to the result of the comparison\r
+\r
+ @retval EFI_SUCCESS The operation succeeded. A record was added into the\r
+ specified script table.\r
+ @retval EFI_INVALID_PARAMETER The parameter is illegal or the given boot script is not supported.\r
+ If the opcode is unknow or not supported because of the PCD \r
+ Feature Flags.\r
+ @retval EFI_OUT_OF_RESOURCES There is insufficient memory to store the boot script.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI \r
+S3BootScriptCompare (\r
+ IN UINT8 *Position1,\r
+ IN UINT8 *Position2,\r
+ OUT UINTN *RelativePosition\r
+ )\r
+{\r
+ return RETURN_SUCCESS;\r
+}\r
--- /dev/null
+## @file\r
+# Component description file for S3IoLib.\r
+#\r
+# I/O and MMIO Library Services that do I/O and also enable the I/O operatation\r
+# to be replayed during an S3 resume.\r
+#\r
+# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials are\r
+# licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+##\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = BaseS3IoLib\r
+ FILE_GUID = B13F938E-47DF-4516-A397-8927A4E42B61\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = S3IoLib \r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+#\r
+\r
+[Sources]\r
+ S3IoLib.c\r
+\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+\r
+[LibraryClasses]\r
+ DebugLib\r
+ IoLib\r
+ S3BootScriptLib\r
+\r
--- /dev/null
+/** @file\r
+ I/O and MMIO Library Services that do I/O and also enable the I/O operatation\r
+ to be replayed during an S3 resume.\r
+ \r
+ Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions\r
+ of the BSD License which accompanies this distribution. The\r
+ full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <Base.h>\r
+\r
+#include <Library/S3IoLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/S3BootScriptLib.h>\r
+\r
+\r
+/**\r
+ Saves an I/O port value to the boot script.\r
+\r
+ This internal worker function saves an I/O port value in the S3 script\r
+ to be replayed on S3 resume. \r
+\r
+ If the saving process fails, then ASSERT().\r
+\r
+ @param Width The width of I/O port.\r
+ @param Port The I/O port to write.\r
+ @param Buffer The buffer containing value.\r
+\r
+**/\r
+VOID\r
+InternalSaveIoWriteValueToBootScript (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINTN Port,\r
+ IN VOID *Buffer\r
+ )\r
+{\r
+ RETURN_STATUS Status;\r
+ \r
+ Status = S3BootScriptSaveIoWrite (\r
+ Width,\r
+ Port,\r
+ 1,\r
+ Buffer\r
+ );\r
+ ASSERT (Status == RETURN_SUCCESS);\r
+}\r
+ \r
+/**\r
+ Saves an 8-bit I/O port value to the boot script.\r
+\r
+ This internal worker function saves an 8-bit I/O port value in the S3 script\r
+ to be replayed on S3 resume. \r
+\r
+ If the saving process fails, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param Value The value saved to boot script.\r
+\r
+ @return Value.\r
+\r
+**/\r
+UINT8\r
+InternalSaveIoWrite8ValueToBootScript (\r
+ IN UINTN Port,\r
+ IN UINT8 Value\r
+ )\r
+{\r
+ InternalSaveIoWriteValueToBootScript (S3BootScriptWidthUint8, Port, &Value);\r
+\r
+ return Value;\r
+}\r
+\r
+/**\r
+ Reads an 8-bit I/O port and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r
+ This function must guarantee that all I/O read and write operations are\r
+ serialized.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to read.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoRead8 (\r
+ IN UINTN Port\r
+ )\r
+{\r
+ return InternalSaveIoWrite8ValueToBootScript (Port, IoRead8 (Port));\r
+}\r
+\r
+/**\r
+ Writes an 8-bit I/O port and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Writes the 8-bit I/O port specified by Port with the value specified by Value\r
+ and returns Value. This function must guarantee that all I/O read and write\r
+ operations are serialized.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param Value The value to write to the I/O port.\r
+\r
+ @return The value written the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoWrite8 (\r
+ IN UINTN Port,\r
+ IN UINT8 Value\r
+ )\r
+{\r
+ return InternalSaveIoWrite8ValueToBootScript (Port, IoWrite8 (Port, Value));\r
+}\r
+\r
+/**\r
+ Reads an 8-bit I/O port, performs a bitwise OR, and writes the\r
+ result back to the 8-bit I/O port and saves the value in the S3 script to be\r
+ replayed on S3 resume.\r
+\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise OR\r
+ between the read result and the value specified by OrData, and writes the\r
+ result to the 8-bit I/O port specified by Port. The value written to the I/O\r
+ port is returned. This function must guarantee that all I/O read and write\r
+ operations are serialized.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param OrData The value to OR with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoOr8 (\r
+ IN UINTN Port,\r
+ IN UINT8 OrData\r
+ )\r
+{\r
+ return InternalSaveIoWrite8ValueToBootScript (Port, IoOr8 (Port, OrData));\r
+}\r
+\r
+/**\r
+ Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back\r
+ to the 8-bit I/O port and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, and writes the result to\r
+ the 8-bit I/O port specified by Port. The value written to the I/O port is\r
+ returned. This function must guarantee that all I/O read and write operations\r
+ are serialized.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param AndData The value to AND with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoAnd8 (\r
+ IN UINTN Port,\r
+ IN UINT8 AndData\r
+ )\r
+{\r
+ return InternalSaveIoWrite8ValueToBootScript (Port, IoAnd8 (Port, AndData));\r
+}\r
+\r
+/**\r
+ Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise\r
+ inclusive OR, and writes the result back to the 8-bit I/O port and saves \r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, performs a bitwise OR\r
+ between the result of the AND operation and the value specified by OrData,\r
+ and writes the result to the 8-bit I/O port specified by Port. The value\r
+ written to the I/O port is returned. This function must guarantee that all\r
+ I/O read and write operations are serialized.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param AndData The value to AND with the read value from the I/O port.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoAndThenOr8 (\r
+ IN UINTN Port,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ )\r
+{\r
+ return InternalSaveIoWrite8ValueToBootScript (Port, IoAndThenOr8 (Port, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field of an I/O register and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Reads the bit field in an 8-bit I/O register. The bit field is specified by\r
+ the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoBitFieldRead8 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ )\r
+{\r
+ return InternalSaveIoWrite8ValueToBootScript (Port, IoBitFieldRead8 (Port, StartBit, EndBit));\r
+}\r
+\r
+/**\r
+ Writes a bit field to an I/O register and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the I/O register. The bit field is specified\r
+ by the StartBit and the EndBit. All other bits in the destination I/O\r
+ register are preserved. The value written to the I/O port is returned. Extra\r
+ left bits in Value are stripped.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoBitFieldWrite8 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 Value\r
+ )\r
+{\r
+ return InternalSaveIoWrite8ValueToBootScript (Port, IoBitFieldWrite8 (Port, StartBit, EndBit, Value));\r
+}\r
+\r
+/**\r
+ Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the\r
+ result back to the bit field in the 8-bit port and saves the value in the \r
+ S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise OR\r
+ between the read result and the value specified by OrData, and writes the\r
+ result to the 8-bit I/O port specified by Port. The value written to the I/O\r
+ port is returned. This function must guarantee that all I/O read and write\r
+ operations are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param OrData The value to OR with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoBitFieldOr8 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 OrData\r
+ )\r
+{\r
+ return InternalSaveIoWrite8ValueToBootScript (Port, IoBitFieldOr8 (Port, StartBit, EndBit, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the\r
+ result back to the bit field in the 8-bit port and saves the value in the \r
+ S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, and writes the result to\r
+ the 8-bit I/O port specified by Port. The value written to the I/O port is\r
+ returned. This function must guarantee that all I/O read and write operations\r
+ are serialized. Extra left bits in AndData are stripped.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param AndData The value to AND with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoBitFieldAnd8 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData\r
+ )\r
+{\r
+ return InternalSaveIoWrite8ValueToBootScript (Port, IoBitFieldAnd8 (Port, StartBit, EndBit, AndData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
+ bitwise OR, and writes the result back to the bit field in the\r
+ 8-bit port and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed\r
+ by a bitwise OR between the read result and the value specified by\r
+ AndData, and writes the result to the 8-bit I/O port specified by Port. The\r
+ value written to the I/O port is returned. This function must guarantee that\r
+ all I/O read and write operations are serialized. Extra left bits in both\r
+ AndData and OrData are stripped.\r
+\r
+ If 8-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param AndData The value to AND with the read value from the I/O port.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3IoBitFieldAndThenOr8 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ )\r
+{\r
+ return InternalSaveIoWrite8ValueToBootScript (Port, IoBitFieldAndThenOr8 (Port, StartBit, EndBit, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Saves a 16-bit I/O port value to the boot script.\r
+\r
+ This internal worker function saves a 16-bit I/O port value in the S3 script\r
+ to be replayed on S3 resume. \r
+\r
+ If the saving process fails, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param Value The value saved to boot script.\r
+\r
+ @return Value.\r
+\r
+**/\r
+UINT16\r
+InternalSaveIoWrite16ValueToBootScript (\r
+ IN UINTN Port,\r
+ IN UINT16 Value\r
+ )\r
+{\r
+ InternalSaveIoWriteValueToBootScript (S3BootScriptWidthUint16, Port, &Value);\r
+ \r
+ return Value;\r
+}\r
+\r
+/**\r
+ Reads a 16-bit I/O port and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r
+ This function must guarantee that all I/O read and write operations are\r
+ serialized.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to read.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoRead16 (\r
+ IN UINTN Port\r
+ )\r
+{\r
+ return InternalSaveIoWrite16ValueToBootScript (Port, IoRead16 (Port));\r
+}\r
+\r
+/**\r
+ Writes a 16-bit I/O port and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Writes the 16-bit I/O port specified by Port with the value specified by Value\r
+ and returns Value. This function must guarantee that all I/O read and write\r
+ operations are serialized.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param Value The value to write to the I/O port.\r
+\r
+ @return The value written the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoWrite16 (\r
+ IN UINTN Port,\r
+ IN UINT16 Value\r
+ )\r
+{\r
+ return InternalSaveIoWrite16ValueToBootScript (Port, IoWrite16 (Port, Value));\r
+}\r
+\r
+/**\r
+ Reads a 16-bit I/O port, performs a bitwise OR, and writes the\r
+ result back to the 16-bit I/O port and saves the value in the S3 script to \r
+ be replayed on S3 resume.\r
+\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise OR\r
+ between the read result and the value specified by OrData, and writes the\r
+ result to the 16-bit I/O port specified by Port. The value written to the I/O\r
+ port is returned. This function must guarantee that all I/O read and write\r
+ operations are serialized.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param OrData The value to OR with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoOr16 (\r
+ IN UINTN Port,\r
+ IN UINT16 OrData\r
+ )\r
+{\r
+ return InternalSaveIoWrite16ValueToBootScript (Port, IoOr16 (Port, OrData));\r
+}\r
+\r
+/**\r
+ Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back\r
+ to the 16-bit I/O port and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, and writes the result to\r
+ the 16-bit I/O port specified by Port. The value written to the I/O port is\r
+ returned. This function must guarantee that all I/O read and write operations\r
+ are serialized.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param AndData The value to AND with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoAnd16 (\r
+ IN UINTN Port,\r
+ IN UINT16 AndData\r
+ )\r
+{\r
+ return InternalSaveIoWrite16ValueToBootScript (Port, IoAnd16 (Port, AndData));\r
+}\r
+\r
+/**\r
+ Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise\r
+ inclusive OR, and writes the result back to the 16-bit I/O port and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, performs a bitwise OR\r
+ between the result of the AND operation and the value specified by OrData,\r
+ and writes the result to the 16-bit I/O port specified by Port. The value\r
+ written to the I/O port is returned. This function must guarantee that all\r
+ I/O read and write operations are serialized.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param AndData The value to AND with the read value from the I/O port.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoAndThenOr16 (\r
+ IN UINTN Port,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ )\r
+{\r
+ return InternalSaveIoWrite16ValueToBootScript (Port, IoAndThenOr16 (Port, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field of an I/O register saves the value in the S3 script to be\r
+ replayed on S3 resume.\r
+\r
+ Reads the bit field in a 16-bit I/O register. The bit field is specified by\r
+ the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoBitFieldRead16 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ )\r
+{\r
+ return InternalSaveIoWrite16ValueToBootScript (Port, IoBitFieldRead16 (Port, StartBit, EndBit));\r
+}\r
+\r
+/**\r
+ Writes a bit field to an I/O register and saves the value in the S3 script \r
+ to be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the I/O register. The bit field is specified\r
+ by the StartBit and the EndBit. All other bits in the destination I/O\r
+ register are preserved. The value written to the I/O port is returned. Extra\r
+ left bits in Value are stripped.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoBitFieldWrite16 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 Value\r
+ )\r
+{\r
+ return InternalSaveIoWrite16ValueToBootScript (Port, IoBitFieldWrite16 (Port, StartBit, EndBit, Value));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the\r
+ result back to the bit field in the 16-bit port and saves the value in the \r
+ S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise OR\r
+ between the read result and the value specified by OrData, and writes the\r
+ result to the 16-bit I/O port specified by Port. The value written to the I/O\r
+ port is returned. This function must guarantee that all I/O read and write\r
+ operations are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param OrData The value to OR with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoBitFieldOr16 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 OrData\r
+ )\r
+{\r
+ return InternalSaveIoWrite16ValueToBootScript (Port, IoBitFieldOr16 (Port, StartBit, EndBit, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the\r
+ result back to the bit field in the 16-bit port and saves the value in the \r
+ S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, and writes the result to\r
+ the 16-bit I/O port specified by Port. The value written to the I/O port is\r
+ returned. This function must guarantee that all I/O read and write operations\r
+ are serialized. Extra left bits in AndData are stripped.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param AndData The value to AND with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoBitFieldAnd16 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData\r
+ )\r
+{\r
+ return InternalSaveIoWrite16ValueToBootScript (Port, IoBitFieldAnd16 (Port, StartBit, EndBit, AndData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
+ bitwise OR, and writes the result back to the bit field in the\r
+ 16-bit port and saves the value in the S3 script to be replayed on S3 \r
+ resume.\r
+\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed\r
+ by a bitwise OR between the read result and the value specified by\r
+ AndData, and writes the result to the 16-bit I/O port specified by Port. The\r
+ value written to the I/O port is returned. This function must guarantee that\r
+ all I/O read and write operations are serialized. Extra left bits in both\r
+ AndData and OrData are stripped.\r
+\r
+ If 16-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param AndData The value to AND with the read value from the I/O port.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3IoBitFieldAndThenOr16 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ )\r
+{\r
+ return InternalSaveIoWrite16ValueToBootScript (Port, IoBitFieldAndThenOr16 (Port, StartBit, EndBit, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Saves a 32-bit I/O port value to the boot script.\r
+\r
+ This internal worker function saves a 32-bit I/O port value in the S3 script\r
+ to be replayed on S3 resume. \r
+\r
+ If the saving process fails, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param Value The value saved to boot script.\r
+\r
+ @return Value.\r
+\r
+**/\r
+UINT32\r
+InternalSaveIoWrite32ValueToBootScript (\r
+ IN UINTN Port,\r
+ IN UINT32 Value\r
+ )\r
+{\r
+ InternalSaveIoWriteValueToBootScript (S3BootScriptWidthUint32, Port, &Value);\r
+ \r
+ return Value;\r
+}\r
+\r
+/**\r
+ Reads a 32-bit I/O port and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r
+ This function must guarantee that all I/O read and write operations are\r
+ serialized.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to read.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoRead32 (\r
+ IN UINTN Port\r
+ )\r
+{\r
+ return InternalSaveIoWrite32ValueToBootScript (Port, IoRead32 (Port));\r
+}\r
+\r
+/**\r
+ Writes a 32-bit I/O port and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Writes the 32-bit I/O port specified by Port with the value specified by Value\r
+ and returns Value. This function must guarantee that all I/O read and write\r
+ operations are serialized.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param Value The value to write to the I/O port.\r
+\r
+ @return The value written the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoWrite32 (\r
+ IN UINTN Port,\r
+ IN UINT32 Value\r
+ )\r
+{\r
+ return InternalSaveIoWrite32ValueToBootScript (Port, IoWrite32 (Port, Value));\r
+}\r
+\r
+/**\r
+ Reads a 32-bit I/O port, performs a bitwise OR, and writes the\r
+ result back to the 32-bit I/O port and saves the value in the S3 script to \r
+ be replayed on S3 resume.\r
+\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise OR\r
+ between the read result and the value specified by OrData, and writes the\r
+ result to the 32-bit I/O port specified by Port. The value written to the I/O\r
+ port is returned. This function must guarantee that all I/O read and write\r
+ operations are serialized.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param OrData The value to OR with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoOr32 (\r
+ IN UINTN Port,\r
+ IN UINT32 OrData\r
+ )\r
+{\r
+ return InternalSaveIoWrite32ValueToBootScript (Port, IoOr32 (Port, OrData));\r
+}\r
+\r
+/**\r
+ Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back\r
+ to the 32-bit I/O port and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, and writes the result to\r
+ the 32-bit I/O port specified by Port. The value written to the I/O port is\r
+ returned. This function must guarantee that all I/O read and write operations\r
+ are serialized.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param AndData The value to AND with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoAnd32 (\r
+ IN UINTN Port,\r
+ IN UINT32 AndData\r
+ )\r
+{\r
+ return InternalSaveIoWrite32ValueToBootScript (Port, IoAnd32 (Port, AndData));\r
+}\r
+\r
+/**\r
+ Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise\r
+ inclusive OR, and writes the result back to the 32-bit I/O port and saves \r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, performs a bitwise OR\r
+ between the result of the AND operation and the value specified by OrData,\r
+ and writes the result to the 32-bit I/O port specified by Port. The value\r
+ written to the I/O port is returned. This function must guarantee that all\r
+ I/O read and write operations are serialized.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param AndData The value to AND with the read value from the I/O port.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoAndThenOr32 (\r
+ IN UINTN Port,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ )\r
+{\r
+ return InternalSaveIoWrite32ValueToBootScript (Port, IoAndThenOr32 (Port, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field of an I/O register and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Reads the bit field in a 32-bit I/O register. The bit field is specified by\r
+ the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoBitFieldRead32 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ )\r
+{\r
+ return InternalSaveIoWrite32ValueToBootScript (Port, IoBitFieldRead32 (Port, StartBit, EndBit));\r
+}\r
+\r
+/**\r
+ Writes a bit field to an I/O register and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the I/O register. The bit field is specified\r
+ by the StartBit and the EndBit. All other bits in the destination I/O\r
+ register are preserved. The value written to the I/O port is returned. Extra\r
+ left bits in Value are stripped.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoBitFieldWrite32 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 Value\r
+ )\r
+{\r
+ return InternalSaveIoWrite32ValueToBootScript (Port, IoBitFieldWrite32 (Port, StartBit, EndBit, Value));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the\r
+ result back to the bit field in the 32-bit port and saves the value in the \r
+ S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise OR\r
+ between the read result and the value specified by OrData, and writes the\r
+ result to the 32-bit I/O port specified by Port. The value written to the I/O\r
+ port is returned. This function must guarantee that all I/O read and write\r
+ operations are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param OrData The value to OR with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoBitFieldOr32 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 OrData\r
+ )\r
+{\r
+ return InternalSaveIoWrite32ValueToBootScript (Port, IoBitFieldOr32 (Port, StartBit, EndBit, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the\r
+ result back to the bit field in the 32-bit port and saves the value in the \r
+ S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, and writes the result to\r
+ the 32-bit I/O port specified by Port. The value written to the I/O port is\r
+ returned. This function must guarantee that all I/O read and write operations\r
+ are serialized. Extra left bits in AndData are stripped.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param AndData The value to AND with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoBitFieldAnd32 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData\r
+ )\r
+{\r
+ return InternalSaveIoWrite32ValueToBootScript (Port, IoBitFieldAnd32 (Port, StartBit, EndBit, AndData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
+ bitwise OR, and writes the result back to the bit field in the\r
+ 32-bit port and saves the value in the S3 script to be replayed on S3 \r
+ resume.\r
+\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed\r
+ by a bitwise OR between the read result and the value specified by\r
+ AndData, and writes the result to the 32-bit I/O port specified by Port. The\r
+ value written to the I/O port is returned. This function must guarantee that\r
+ all I/O read and write operations are serialized. Extra left bits in both\r
+ AndData and OrData are stripped.\r
+\r
+ If 32-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param AndData The value to AND with the read value from the I/O port.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3IoBitFieldAndThenOr32 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ )\r
+{\r
+ return InternalSaveIoWrite32ValueToBootScript (Port, IoBitFieldAndThenOr32 (Port, StartBit, EndBit, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Saves a 64-bit I/O port value to the boot script.\r
+\r
+ This internal worker function saves a 64-bit I/O port value in the S3 script\r
+ to be replayed on S3 resume. \r
+\r
+ If the saving process fails, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param Value The value saved to boot script.\r
+\r
+ @return Value.\r
+\r
+**/\r
+UINT64\r
+InternalSaveIoWrite64ValueToBootScript (\r
+ IN UINTN Port,\r
+ IN UINT64 Value\r
+ )\r
+{\r
+ InternalSaveIoWriteValueToBootScript (S3BootScriptWidthUint64, Port, &Value);\r
+ \r
+ return Value;\r
+}\r
+\r
+/**\r
+ Reads a 64-bit I/O port and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r
+ This function must guarantee that all I/O read and write operations are\r
+ serialized.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to read.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoRead64 (\r
+ IN UINTN Port\r
+ )\r
+{\r
+ return InternalSaveIoWrite64ValueToBootScript (Port, IoRead64 (Port));\r
+}\r
+\r
+/**\r
+ Writes a 64-bit I/O port and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Writes the 64-bit I/O port specified by Port with the value specified by Value\r
+ and returns Value. This function must guarantee that all I/O read and write\r
+ operations are serialized.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param Value The value to write to the I/O port.\r
+\r
+ @return The value written the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoWrite64 (\r
+ IN UINTN Port,\r
+ IN UINT64 Value\r
+ )\r
+{\r
+ return InternalSaveIoWrite64ValueToBootScript (Port, IoWrite64 (Port, Value));\r
+}\r
+\r
+/**\r
+ Reads a 64-bit I/O port, performs a bitwise OR, and writes the\r
+ result back to the 64-bit I/O port and saves the value in the S3 script to \r
+ be replayed on S3 resume.\r
+\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise OR\r
+ between the read result and the value specified by OrData, and writes the\r
+ result to the 64-bit I/O port specified by Port. The value written to the I/O\r
+ port is returned. This function must guarantee that all I/O read and write\r
+ operations are serialized.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param OrData The value to OR with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoOr64 (\r
+ IN UINTN Port,\r
+ IN UINT64 OrData\r
+ )\r
+{\r
+ return InternalSaveIoWrite64ValueToBootScript (Port, IoOr64 (Port, OrData));\r
+}\r
+\r
+/**\r
+ Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back\r
+ to the 64-bit I/O port and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, and writes the result to\r
+ the 64-bit I/O port specified by Port. The value written to the I/O port is\r
+ returned. This function must guarantee that all I/O read and write operations\r
+ are serialized.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param AndData The value to AND with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoAnd64 (\r
+ IN UINTN Port,\r
+ IN UINT64 AndData\r
+ )\r
+{\r
+ return InternalSaveIoWrite64ValueToBootScript (Port, IoAnd64 (Port, AndData));\r
+}\r
+\r
+/**\r
+ Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise\r
+ inclusive OR, and writes the result back to the 64-bit I/O port and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, performs a bitwise OR\r
+ between the result of the AND operation and the value specified by OrData,\r
+ and writes the result to the 64-bit I/O port specified by Port. The value\r
+ written to the I/O port is returned. This function must guarantee that all\r
+ I/O read and write operations are serialized.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param AndData The value to AND with the read value from the I/O port.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoAndThenOr64 (\r
+ IN UINTN Port,\r
+ IN UINT64 AndData,\r
+ IN UINT64 OrData\r
+ )\r
+{\r
+ return InternalSaveIoWrite64ValueToBootScript (Port, IoAndThenOr64 (Port, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field of an I/O register and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Reads the bit field in a 64-bit I/O register. The bit field is specified by\r
+ the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoBitFieldRead64 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ )\r
+{\r
+ return InternalSaveIoWrite64ValueToBootScript (Port, IoBitFieldRead64 (Port, StartBit, EndBit));\r
+}\r
+\r
+/**\r
+ Writes a bit field to an I/O register and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the I/O register. The bit field is specified\r
+ by the StartBit and the EndBit. All other bits in the destination I/O\r
+ register are preserved. The value written to the I/O port is returned. Extra\r
+ left bits in Value are stripped.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoBitFieldWrite64 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 Value\r
+ )\r
+{\r
+ return InternalSaveIoWrite64ValueToBootScript (Port, IoBitFieldWrite64 (Port, StartBit, EndBit, Value));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the\r
+ result back to the bit field in the 64-bit port and saves the value in the \r
+ S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise OR\r
+ between the read result and the value specified by OrData, and writes the\r
+ result to the 64-bit I/O port specified by Port. The value written to the I/O\r
+ port is returned. This function must guarantee that all I/O read and write\r
+ operations are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+ @param OrData The value to OR with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoBitFieldOr64 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 OrData\r
+ )\r
+{\r
+ return InternalSaveIoWrite64ValueToBootScript (Port, IoBitFieldOr64 (Port, StartBit, EndBit, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the\r
+ result back to the bit field in the 64-bit port and saves the value in the \r
+ S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r
+ the read result and the value specified by AndData, and writes the result to\r
+ the 64-bit I/O port specified by Port. The value written to the I/O port is\r
+ returned. This function must guarantee that all I/O read and write operations\r
+ are serialized. Extra left bits in AndData are stripped.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+ @param AndData The value to AND with the read value from the I/O port.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoBitFieldAnd64 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 AndData\r
+ )\r
+{\r
+ return InternalSaveIoWrite64ValueToBootScript (Port, IoBitFieldAnd64 (Port, StartBit, EndBit, AndData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 64-bit port, performs a bitwise AND followed by a\r
+ bitwise OR, and writes the result back to the bit field in the\r
+ 64-bit port and saves the value in the S3 script to be replayed on S3 \r
+ resume.\r
+\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed\r
+ by a bitwise OR between the read result and the value specified by\r
+ AndData, and writes the result to the 64-bit I/O port specified by Port. The\r
+ value written to the I/O port is returned. This function must guarantee that\r
+ all I/O read and write operations are serialized. Extra left bits in both\r
+ AndData and OrData are stripped.\r
+\r
+ If 64-bit I/O port operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Port The I/O port to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+ @param AndData The value to AND with the read value from the I/O port.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3IoBitFieldAndThenOr64 (\r
+ IN UINTN Port,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 AndData,\r
+ IN UINT64 OrData\r
+ )\r
+{\r
+ return InternalSaveIoWrite64ValueToBootScript (Port, IoBitFieldAndThenOr64 (Port, StartBit, EndBit, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Saves an MMIO register value to the boot script.\r
+\r
+ This internal worker function saves an MMIO register value in the S3 script\r
+ to be replayed on S3 resume. \r
+\r
+ If the saving process fails, then ASSERT().\r
+\r
+ @param Width The width of MMIO register.\r
+ @param Address The MMIO register to write.\r
+ @param Buffer The buffer containing value.\r
+\r
+**/\r
+VOID\r
+InternalSaveMmioWriteValueToBootScript (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINTN Address,\r
+ IN VOID *Buffer\r
+ )\r
+{\r
+ RETURN_STATUS Status;\r
+\r
+ Status = S3BootScriptSaveMemWrite (\r
+ Width,\r
+ Address,\r
+ 1,\r
+ Buffer\r
+ );\r
+ ASSERT (Status == RETURN_SUCCESS);\r
+}\r
+\r
+/**\r
+ Saves an 8-bit MMIO register value to the boot script.\r
+\r
+ This internal worker function saves an 8-bit MMIO register value in the S3 script\r
+ to be replayed on S3 resume. \r
+\r
+ If the saving process fails, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param Value The value saved to boot script.\r
+\r
+ @return Value.\r
+\r
+**/\r
+UINT8\r
+InternalSaveMmioWrite8ValueToBootScript (\r
+ IN UINTN Address,\r
+ IN UINT8 Value\r
+ )\r
+{\r
+ InternalSaveMmioWriteValueToBootScript (S3BootScriptWidthUint8, Address, &Value);\r
+\r
+ return Value;\r
+}\r
+\r
+/**\r
+ Reads an 8-bit MMIO register and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r
+ returned. This function must guarantee that all MMIO read and write\r
+ operations are serialized.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to read.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioRead8 (\r
+ IN UINTN Address\r
+ )\r
+{\r
+ return InternalSaveMmioWrite8ValueToBootScript (Address, MmioRead8 (Address));\r
+}\r
+\r
+/**\r
+ Writes an 8-bit MMIO register and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Writes the 8-bit MMIO register specified by Address with the value specified\r
+ by Value and returns Value. This function must guarantee that all MMIO read\r
+ and write operations are serialized.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param Value The value to write to the MMIO register.\r
+\r
+ @return The value written the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioWrite8 (\r
+ IN UINTN Address,\r
+ IN UINT8 Value\r
+ )\r
+{\r
+ return InternalSaveMmioWrite8ValueToBootScript (Address, MmioWrite8 (Address, Value));\r
+}\r
+\r
+/**\r
+ Reads an 8-bit MMIO register, performs a bitwise OR, and writes the\r
+ result back to the 8-bit MMIO register and saves the value in the S3 script \r
+ to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise\r
+ inclusive OR between the read result and the value specified by OrData, and\r
+ writes the result to the 8-bit MMIO register specified by Address. The value\r
+ written to the MMIO register is returned. This function must guarantee that\r
+ all MMIO read and write operations are serialized.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param OrData The value to OR with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioOr8 (\r
+ IN UINTN Address,\r
+ IN UINT8 OrData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite8ValueToBootScript (Address, MmioOr8 (Address, OrData));\r
+}\r
+\r
+/**\r
+ Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result\r
+ back to the 8-bit MMIO register and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, and writes the\r
+ result to the 8-bit MMIO register specified by Address. The value written to\r
+ the MMIO register is returned. This function must guarantee that all MMIO\r
+ read and write operations are serialized.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param AndData The value to AND with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioAnd8 (\r
+ IN UINTN Address,\r
+ IN UINT8 AndData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite8ValueToBootScript (Address, MmioAnd8 (Address, AndData));\r
+}\r
+\r
+/**\r
+ Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise\r
+ inclusive OR, and writes the result back to the 8-bit MMIO register and saves \r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, performs a\r
+ bitwise OR between the result of the AND operation and the value specified by\r
+ OrData, and writes the result to the 8-bit MMIO register specified by\r
+ Address. The value written to the MMIO register is returned. This function\r
+ must guarantee that all MMIO read and write operations are serialized.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param AndData The value to AND with the read value from the MMIO register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioAndThenOr8 (\r
+ IN UINTN Address,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite8ValueToBootScript (Address, MmioAndThenOr8 (Address, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field of a MMIO register and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Reads the bit field in an 8-bit MMIO register. The bit field is specified by\r
+ the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address MMIO register to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioBitFieldRead8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ )\r
+{\r
+ return InternalSaveMmioWrite8ValueToBootScript (Address, MmioBitFieldRead8 (Address, StartBit, EndBit));\r
+}\r
+\r
+/**\r
+ Writes a bit field to an MMIO register and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the MMIO register. The bit field is\r
+ specified by the StartBit and the EndBit. All other bits in the destination\r
+ MMIO register are preserved. The new value of the 8-bit register is returned.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioBitFieldWrite8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 Value\r
+ )\r
+{\r
+ return InternalSaveMmioWrite8ValueToBootScript (Address, MmioBitFieldWrite8 (Address, StartBit, EndBit, Value));\r
+}\r
+\r
+/**\r
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 8-bit MMIO register and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise\r
+ inclusive OR between the read result and the value specified by OrData, and\r
+ writes the result to the 8-bit MMIO register specified by Address. The value\r
+ written to the MMIO register is returned. This function must guarantee that\r
+ all MMIO read and write operations are serialized. Extra left bits in OrData\r
+ are stripped.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param OrData The value to OR with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioBitFieldOr8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 OrData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite8ValueToBootScript (Address, MmioBitFieldOr8 (Address, StartBit, EndBit, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and\r
+ writes the result back to the bit field in the 8-bit MMIO register and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, and writes the\r
+ result to the 8-bit MMIO register specified by Address. The value written to\r
+ the MMIO register is returned. This function must guarantee that all MMIO\r
+ read and write operations are serialized. Extra left bits in AndData are\r
+ stripped.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param AndData The value to AND with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioBitFieldAnd8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite8ValueToBootScript (Address, MmioBitFieldAnd8 (Address, StartBit, EndBit, AndData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed\r
+ by a bitwise OR, and writes the result back to the bit field in the\r
+ 8-bit MMIO register and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
+ followed by a bitwise OR between the read result and the value\r
+ specified by AndData, and writes the result to the 8-bit MMIO register\r
+ specified by Address. The value written to the MMIO register is returned.\r
+ This function must guarantee that all MMIO read and write operations are\r
+ serialized. Extra left bits in both AndData and OrData are stripped.\r
+\r
+ If 8-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param AndData The value to AND with the read value from the MMIO register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3MmioBitFieldAndThenOr8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite8ValueToBootScript (Address, MmioBitFieldAndThenOr8 (Address, StartBit, EndBit, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Saves a 16-bit MMIO register value to the boot script.\r
+\r
+ This internal worker function saves a 16-bit MMIO register value in the S3 script\r
+ to be replayed on S3 resume. \r
+\r
+ If the saving process fails, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param Value The value saved to boot script.\r
+\r
+ @return Value.\r
+\r
+**/\r
+UINT16\r
+InternalSaveMmioWrite16ValueToBootScript (\r
+ IN UINTN Address,\r
+ IN UINT16 Value\r
+ )\r
+{\r
+ InternalSaveMmioWriteValueToBootScript (S3BootScriptWidthUint16, Address, &Value);\r
+ \r
+ return Value;\r
+}\r
+\r
+/**\r
+ Reads a 16-bit MMIO register and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r
+ returned. This function must guarantee that all MMIO read and write\r
+ operations are serialized.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to read.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioRead16 (\r
+ IN UINTN Address\r
+ )\r
+{\r
+ return InternalSaveMmioWrite16ValueToBootScript (Address, MmioRead16 (Address));\r
+}\r
+\r
+/**\r
+ Writes a 16-bit MMIO register and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Writes the 16-bit MMIO register specified by Address with the value specified\r
+ by Value and returns Value. This function must guarantee that all MMIO read\r
+ and write operations are serialized and saves the value in the S3 script to be\r
+ replayed on S3 resume.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param Value The value to write to the MMIO register.\r
+\r
+ @return The value written the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioWrite16 (\r
+ IN UINTN Address,\r
+ IN UINT16 Value\r
+ )\r
+{\r
+ return InternalSaveMmioWrite16ValueToBootScript (Address, MmioWrite16 (Address, Value));\r
+}\r
+\r
+/**\r
+ Reads a 16-bit MMIO register, performs a bitwise OR, and writes the\r
+ result back to the 16-bit MMIO register and saves the value in the S3 script \r
+ to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise\r
+ inclusive OR between the read result and the value specified by OrData, and\r
+ writes the result to the 16-bit MMIO register specified by Address. The value\r
+ written to the MMIO register is returned. This function must guarantee that\r
+ all MMIO read and write operations are serialized.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param OrData The value to OR with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioOr16 (\r
+ IN UINTN Address,\r
+ IN UINT16 OrData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite16ValueToBootScript (Address, MmioOr16 (Address, OrData));\r
+}\r
+\r
+/**\r
+ Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result\r
+ back to the 16-bit MMIO register and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, and writes the\r
+ result to the 16-bit MMIO register specified by Address. The value written to\r
+ the MMIO register is returned. This function must guarantee that all MMIO\r
+ read and write operations are serialized.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param AndData The value to AND with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioAnd16 (\r
+ IN UINTN Address,\r
+ IN UINT16 AndData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite16ValueToBootScript (Address, MmioAnd16 (Address, AndData));\r
+}\r
+\r
+/**\r
+ Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise\r
+ inclusive OR, and writes the result back to the 16-bit MMIO register and \r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, performs a\r
+ bitwise OR between the result of the AND operation and the value specified by\r
+ OrData, and writes the result to the 16-bit MMIO register specified by\r
+ Address. The value written to the MMIO register is returned. This function\r
+ must guarantee that all MMIO read and write operations are serialized.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param AndData The value to AND with the read value from the MMIO register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioAndThenOr16 (\r
+ IN UINTN Address,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite16ValueToBootScript (Address, MmioAndThenOr16 (Address, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field of a MMIO register and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Reads the bit field in a 16-bit MMIO register. The bit field is specified by\r
+ the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address MMIO register to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioBitFieldRead16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ )\r
+{\r
+ return InternalSaveMmioWrite16ValueToBootScript (Address, MmioBitFieldRead16 (Address, StartBit, EndBit));\r
+}\r
+\r
+/**\r
+ Writes a bit field to a MMIO register and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the MMIO register. The bit field is\r
+ specified by the StartBit and the EndBit. All other bits in the destination\r
+ MMIO register are preserved. The new value of the 16-bit register is returned.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioBitFieldWrite16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 Value\r
+ )\r
+{\r
+ return InternalSaveMmioWrite16ValueToBootScript (Address, MmioBitFieldWrite16 (Address, StartBit, EndBit, Value));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 16-bit MMIO register and \r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise\r
+ inclusive OR between the read result and the value specified by OrData, and\r
+ writes the result to the 16-bit MMIO register specified by Address. The value\r
+ written to the MMIO register is returned. This function must guarantee that\r
+ all MMIO read and write operations are serialized. Extra left bits in OrData\r
+ are stripped.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param OrData The value to OR with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioBitFieldOr16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 OrData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite16ValueToBootScript (Address, MmioBitFieldOr16 (Address, StartBit, EndBit, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and\r
+ writes the result back to the bit field in the 16-bit MMIO register and \r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, and writes the\r
+ result to the 16-bit MMIO register specified by Address. The value written to\r
+ the MMIO register is returned. This function must guarantee that all MMIO\r
+ read and write operations are serialized. Extra left bits in AndData are\r
+ stripped.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param AndData The value to AND with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioBitFieldAnd16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite16ValueToBootScript (Address, MmioBitFieldAnd16 (Address, StartBit, EndBit, AndData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed\r
+ by a bitwise OR, and writes the result back to the bit field in the\r
+ 16-bit MMIO register and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
+ followed by a bitwise OR between the read result and the value\r
+ specified by AndData, and writes the result to the 16-bit MMIO register\r
+ specified by Address. The value written to the MMIO register is returned.\r
+ This function must guarantee that all MMIO read and write operations are\r
+ serialized. Extra left bits in both AndData and OrData are stripped.\r
+\r
+ If 16-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param AndData The value to AND with the read value from the MMIO register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3MmioBitFieldAndThenOr16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite16ValueToBootScript (Address, MmioBitFieldAndThenOr16 (Address, StartBit, EndBit, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Saves a 32-bit MMIO register value to the boot script.\r
+\r
+ This internal worker function saves a 32-bit MMIO register value in the S3 script\r
+ to be replayed on S3 resume. \r
+\r
+ If the saving process fails, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param Value The value saved to boot script.\r
+\r
+ @return Value.\r
+\r
+**/\r
+UINT32\r
+InternalSaveMmioWrite32ValueToBootScript (\r
+ IN UINTN Address,\r
+ IN UINT32 Value\r
+ )\r
+{\r
+ InternalSaveMmioWriteValueToBootScript (S3BootScriptWidthUint32, Address, &Value);\r
+\r
+ return Value;\r
+}\r
+\r
+/**\r
+ Reads a 32-bit MMIO register saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r
+ returned. This function must guarantee that all MMIO read and write\r
+ operations are serialized.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to read.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioRead32 (\r
+ IN UINTN Address\r
+ )\r
+{\r
+ return InternalSaveMmioWrite32ValueToBootScript (Address, MmioRead32 (Address));\r
+}\r
+\r
+/**\r
+ Writes a 32-bit MMIO register and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Writes the 32-bit MMIO register specified by Address with the value specified\r
+ by Value and returns Value. This function must guarantee that all MMIO read\r
+ and write operations are serialized.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param Value The value to write to the MMIO register.\r
+\r
+ @return The value written the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioWrite32 (\r
+ IN UINTN Address,\r
+ IN UINT32 Value\r
+ )\r
+{\r
+ return InternalSaveMmioWrite32ValueToBootScript (Address, MmioWrite32 (Address, Value));\r
+}\r
+\r
+/**\r
+ Reads a 32-bit MMIO register, performs a bitwise OR, and writes the\r
+ result back to the 32-bit MMIO register and saves the value in the S3 script \r
+ to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise\r
+ inclusive OR between the read result and the value specified by OrData, and\r
+ writes the result to the 32-bit MMIO register specified by Address. The value\r
+ written to the MMIO register is returned. This function must guarantee that\r
+ all MMIO read and write operations are serialized.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param OrData The value to OR with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioOr32 (\r
+ IN UINTN Address,\r
+ IN UINT32 OrData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite32ValueToBootScript (Address, MmioOr32 (Address, OrData));\r
+}\r
+\r
+/**\r
+ Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result\r
+ back to the 32-bit MMIO register and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, and writes the\r
+ result to the 32-bit MMIO register specified by Address. The value written to\r
+ the MMIO register is returned. This function must guarantee that all MMIO\r
+ read and write operations are serialized.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param AndData The value to AND with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioAnd32 (\r
+ IN UINTN Address,\r
+ IN UINT32 AndData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite32ValueToBootScript (Address, MmioAnd32 (Address, AndData));\r
+}\r
+\r
+/**\r
+ Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise\r
+ inclusive OR, and writes the result back to the 32-bit MMIO register and \r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, performs a\r
+ bitwise OR between the result of the AND operation and the value specified by\r
+ OrData, and writes the result to the 32-bit MMIO register specified by\r
+ Address. The value written to the MMIO register is returned. This function\r
+ must guarantee that all MMIO read and write operations are serialized.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param AndData The value to AND with the read value from the MMIO register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioAndThenOr32 (\r
+ IN UINTN Address,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite32ValueToBootScript (Address, MmioAndThenOr32 (Address, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field of a MMIO register and saves the value in the S3 script \r
+ to be replayed on S3 resume.\r
+\r
+ Reads the bit field in a 32-bit MMIO register. The bit field is specified by\r
+ the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address MMIO register to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioBitFieldRead32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ )\r
+{\r
+ return InternalSaveMmioWrite32ValueToBootScript (Address, MmioBitFieldRead32 (Address, StartBit, EndBit));\r
+}\r
+\r
+/**\r
+ Writes a bit field to a MMIO register and saves the value in the S3 script \r
+ to be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the MMIO register. The bit field is\r
+ specified by the StartBit and the EndBit. All other bits in the destination\r
+ MMIO register are preserved. The new value of the 32-bit register is returned.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioBitFieldWrite32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 Value\r
+ )\r
+{\r
+ return InternalSaveMmioWrite32ValueToBootScript (Address, MmioBitFieldWrite32 (Address, StartBit, EndBit, Value));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 32-bit MMIO register and \r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise\r
+ inclusive OR between the read result and the value specified by OrData, and\r
+ writes the result to the 32-bit MMIO register specified by Address. The value\r
+ written to the MMIO register is returned. This function must guarantee that\r
+ all MMIO read and write operations are serialized. Extra left bits in OrData\r
+ are stripped.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param OrData The value to OR with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioBitFieldOr32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 OrData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite32ValueToBootScript (Address, MmioBitFieldOr32 (Address, StartBit, EndBit, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and\r
+ writes the result back to the bit field in the 32-bit MMIO register and \r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, and writes the\r
+ result to the 32-bit MMIO register specified by Address. The value written to\r
+ the MMIO register is returned. This function must guarantee that all MMIO\r
+ read and write operations are serialized. Extra left bits in AndData are\r
+ stripped.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param AndData The value to AND with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioBitFieldAnd32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite32ValueToBootScript (Address, MmioBitFieldAnd32 (Address, StartBit, EndBit, AndData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed\r
+ by a bitwise OR, and writes the result back to the bit field in the\r
+ 32-bit MMIO register and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
+ followed by a bitwise OR between the read result and the value\r
+ specified by AndData, and writes the result to the 32-bit MMIO register\r
+ specified by Address. The value written to the MMIO register is returned.\r
+ This function must guarantee that all MMIO read and write operations are\r
+ serialized. Extra left bits in both AndData and OrData are stripped.\r
+\r
+ If 32-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param AndData The value to AND with the read value from the MMIO register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3MmioBitFieldAndThenOr32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite32ValueToBootScript (Address, MmioBitFieldAndThenOr32 (Address, StartBit, EndBit, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Saves a 64-bit MMIO register value to the boot script.\r
+\r
+ This internal worker function saves a 64-bit MMIO register value in the S3 script\r
+ to be replayed on S3 resume. \r
+\r
+ If the saving process fails, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param Value The value saved to boot script.\r
+\r
+ @return Value.\r
+\r
+**/\r
+UINT64\r
+InternalSaveMmioWrite64ValueToBootScript (\r
+ IN UINTN Address,\r
+ IN UINT64 Value\r
+ )\r
+{\r
+ InternalSaveMmioWriteValueToBootScript (S3BootScriptWidthUint64, Address, &Value);\r
+\r
+ return Value;\r
+}\r
+\r
+/**\r
+ Reads a 64-bit MMIO register and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r
+ returned. This function must guarantee that all MMIO read and write\r
+ operations are serialized.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to read.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioRead64 (\r
+ IN UINTN Address\r
+ )\r
+{\r
+ return InternalSaveMmioWrite64ValueToBootScript (Address, MmioRead64 (Address));\r
+}\r
+\r
+/**\r
+ Writes a 64-bit MMIO register and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Writes the 64-bit MMIO register specified by Address with the value specified\r
+ by Value and returns Value. This function must guarantee that all MMIO read\r
+ and write operations are serialized.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param Value The value to write to the MMIO register.\r
+\r
+ @return The value written the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioWrite64 (\r
+ IN UINTN Address,\r
+ IN UINT64 Value\r
+ )\r
+{\r
+ return InternalSaveMmioWrite64ValueToBootScript (Address, MmioWrite64 (Address, Value));\r
+}\r
+\r
+/**\r
+ Reads a 64-bit MMIO register, performs a bitwise OR, and writes the\r
+ result back to the 64-bit MMIO register and saves the value in the S3 script \r
+ to be replayed on S3 resume.\r
+\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise\r
+ inclusive OR between the read result and the value specified by OrData, and\r
+ writes the result to the 64-bit MMIO register specified by Address. The value\r
+ written to the MMIO register is returned. This function must guarantee that\r
+ all MMIO read and write operations are serialized.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param OrData The value to OR with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioOr64 (\r
+ IN UINTN Address,\r
+ IN UINT64 OrData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite64ValueToBootScript (Address, MmioOr64 (Address, OrData));\r
+}\r
+\r
+/**\r
+ Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result\r
+ back to the 64-bit MMIO register and saves the value in the S3 script to be \r
+ replayed on S3 resume.\r
+\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, and writes the\r
+ result to the 64-bit MMIO register specified by Address. The value written to\r
+ the MMIO register is returned. This function must guarantee that all MMIO\r
+ read and write operations are serialized.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param AndData The value to AND with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioAnd64 (\r
+ IN UINTN Address,\r
+ IN UINT64 AndData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite64ValueToBootScript (Address, MmioAnd64 (Address, AndData));\r
+}\r
+\r
+/**\r
+ Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise\r
+ inclusive OR, and writes the result back to the 64-bit MMIO register and \r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, performs a\r
+ bitwise OR between the result of the AND operation and the value specified by\r
+ OrData, and writes the result to the 64-bit MMIO register specified by\r
+ Address. The value written to the MMIO register is returned. This function\r
+ must guarantee that all MMIO read and write operations are serialized.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param AndData The value to AND with the read value from the MMIO register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioAndThenOr64 (\r
+ IN UINTN Address,\r
+ IN UINT64 AndData,\r
+ IN UINT64 OrData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite64ValueToBootScript (Address, MmioAndThenOr64 (Address, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field of a MMIO register saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Reads the bit field in a 64-bit MMIO register. The bit field is specified by\r
+ the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address MMIO register to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+\r
+ @return The value read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioBitFieldRead64 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ )\r
+{\r
+ return InternalSaveMmioWrite64ValueToBootScript (Address, MmioBitFieldRead64 (Address, StartBit, EndBit));\r
+}\r
+\r
+/**\r
+ Writes a bit field to a MMIO register and saves the value in the S3 script to\r
+ be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the MMIO register. The bit field is\r
+ specified by the StartBit and the EndBit. All other bits in the destination\r
+ MMIO register are preserved. The new value of the 64-bit register is returned.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioBitFieldWrite64 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 Value\r
+ )\r
+{\r
+ return InternalSaveMmioWrite64ValueToBootScript (Address, MmioBitFieldWrite64 (Address, StartBit, EndBit, Value));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 64-bit MMIO register and \r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise\r
+ inclusive OR between the read result and the value specified by OrData, and\r
+ writes the result to the 64-bit MMIO register specified by Address. The value\r
+ written to the MMIO register is returned. This function must guarantee that\r
+ all MMIO read and write operations are serialized. Extra left bits in OrData\r
+ are stripped.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+ @param OrData The value to OR with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioBitFieldOr64 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 OrData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite64ValueToBootScript (Address, MmioBitFieldOr64 (Address, StartBit, EndBit, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and\r
+ writes the result back to the bit field in the 64-bit MMIO register and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
+ between the read result and the value specified by AndData, and writes the\r
+ result to the 64-bit MMIO register specified by Address. The value written to\r
+ the MMIO register is returned. This function must guarantee that all MMIO\r
+ read and write operations are serialized. Extra left bits in AndData are\r
+ stripped.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+ @param AndData The value to AND with the read value from the MMIO register.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioBitFieldAnd64 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 AndData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite64ValueToBootScript (Address, MmioBitFieldAnd64 (Address, StartBit, EndBit, AndData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed\r
+ by a bitwise OR, and writes the result back to the bit field in the\r
+ 64-bit MMIO register and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
+ followed by a bitwise OR between the read result and the value\r
+ specified by AndData, and writes the result to the 64-bit MMIO register\r
+ specified by Address. The value written to the MMIO register is returned.\r
+ This function must guarantee that all MMIO read and write operations are\r
+ serialized. Extra left bits in both AndData and OrData are stripped.\r
+\r
+ If 64-bit MMIO register operations are not supported, then ASSERT().\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address The MMIO register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+ @param AndData The value to AND with the read value from the MMIO register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+S3MmioBitFieldAndThenOr64 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 AndData,\r
+ IN UINT64 OrData\r
+ )\r
+{\r
+ return InternalSaveMmioWrite64ValueToBootScript (Address, MmioBitFieldAndThenOr64 (Address, StartBit, EndBit, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Copy data from MMIO region to system memory by using 8-bit access\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Copy data from MMIO region specified by starting address StartAddress \r
+ to system memory specified by Buffer by using 8-bit access. The total \r
+ number of byte to be copied is specified by Length. Buffer is returned.\r
+ \r
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+\r
+ @param StartAddress Starting address for the MMIO region to be copied from.\r
+ @param Length Size in bytes of the copy.\r
+ @param Buffer Pointer to a system memory buffer receiving the data read.\r
+\r
+ @return Buffer\r
+\r
+**/\r
+UINT8 *\r
+EFIAPI\r
+S3MmioReadBuffer8 (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Length,\r
+ OUT UINT8 *Buffer\r
+ )\r
+{\r
+ UINT8 *ReturnBuffer;\r
+ RETURN_STATUS Status;\r
+\r
+ ReturnBuffer = MmioReadBuffer8 (StartAddress, Length, Buffer);\r
+\r
+ Status = S3BootScriptSaveMemWrite (\r
+ S3BootScriptWidthUint8,\r
+ StartAddress,\r
+ Length / sizeof (UINT8),\r
+ ReturnBuffer\r
+ );\r
+ ASSERT (Status == RETURN_SUCCESS);\r
+\r
+ return ReturnBuffer;\r
+}\r
+\r
+/**\r
+ Copy data from MMIO region to system memory by using 16-bit access\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Copy data from MMIO region specified by starting address StartAddress \r
+ to system memory specified by Buffer by using 16-bit access. The total \r
+ number of byte to be copied is specified by Length. Buffer is returned.\r
+ \r
+ If StartAddress is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+ If Length is not aligned on a 16-bit boundary, then ASSERT().\r
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param StartAddress Starting address for the MMIO region to be copied from.\r
+ @param Length Size in bytes of the copy.\r
+ @param Buffer Pointer to a system memory buffer receiving the data read.\r
+\r
+ @return Buffer\r
+\r
+**/\r
+UINT16 *\r
+EFIAPI\r
+S3MmioReadBuffer16 (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Length,\r
+ OUT UINT16 *Buffer\r
+ )\r
+{\r
+ UINT16 *ReturnBuffer;\r
+ RETURN_STATUS Status;\r
+\r
+ ReturnBuffer = MmioReadBuffer16 (StartAddress, Length, Buffer);\r
+\r
+ Status = S3BootScriptSaveMemWrite (\r
+ S3BootScriptWidthUint16,\r
+ StartAddress,\r
+ Length / sizeof (UINT16),\r
+ ReturnBuffer\r
+ );\r
+ ASSERT (Status == RETURN_SUCCESS);\r
+\r
+ return ReturnBuffer;\r
+}\r
+\r
+/**\r
+ Copy data from MMIO region to system memory by using 32-bit access\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Copy data from MMIO region specified by starting address StartAddress \r
+ to system memory specified by Buffer by using 32-bit access. The total \r
+ number of byte to be copied is specified by Length. Buffer is returned.\r
+ \r
+ If StartAddress is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+ If Length is not aligned on a 32-bit boundary, then ASSERT().\r
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param StartAddress Starting address for the MMIO region to be copied from.\r
+ @param Length Size in bytes of the copy.\r
+ @param Buffer Pointer to a system memory buffer receiving the data read.\r
+\r
+ @return Buffer\r
+\r
+**/\r
+UINT32 *\r
+EFIAPI\r
+S3MmioReadBuffer32 (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Length,\r
+ OUT UINT32 *Buffer\r
+ )\r
+{\r
+ UINT32 *ReturnBuffer;\r
+ RETURN_STATUS Status;\r
+\r
+ ReturnBuffer = MmioReadBuffer32 (StartAddress, Length, Buffer);\r
+\r
+ Status = S3BootScriptSaveMemWrite (\r
+ S3BootScriptWidthUint32,\r
+ StartAddress,\r
+ Length / sizeof (UINT32),\r
+ ReturnBuffer\r
+ );\r
+ ASSERT (Status == RETURN_SUCCESS);\r
+\r
+ return ReturnBuffer;\r
+}\r
+\r
+/**\r
+ Copy data from MMIO region to system memory by using 64-bit access\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Copy data from MMIO region specified by starting address StartAddress \r
+ to system memory specified by Buffer by using 64-bit access. The total \r
+ number of byte to be copied is specified by Length. Buffer is returned.\r
+ \r
+ If StartAddress is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+ If Length is not aligned on a 64-bit boundary, then ASSERT().\r
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+ @param StartAddress Starting address for the MMIO region to be copied from.\r
+ @param Length Size in bytes of the copy.\r
+ @param Buffer Pointer to a system memory buffer receiving the data read.\r
+\r
+ @return Buffer\r
+\r
+**/\r
+UINT64 *\r
+EFIAPI\r
+S3MmioReadBuffer64 (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Length,\r
+ OUT UINT64 *Buffer\r
+ )\r
+{\r
+ UINT64 *ReturnBuffer;\r
+ RETURN_STATUS Status;\r
+\r
+ ReturnBuffer = MmioReadBuffer64 (StartAddress, Length, Buffer);\r
+\r
+ Status = S3BootScriptSaveMemWrite (\r
+ S3BootScriptWidthUint64,\r
+ StartAddress,\r
+ Length / sizeof (UINT64),\r
+ ReturnBuffer\r
+ );\r
+ ASSERT (Status == RETURN_SUCCESS);\r
+\r
+ return ReturnBuffer;\r
+}\r
+\r
+\r
+/**\r
+ Copy data from system memory to MMIO region by using 8-bit access\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Copy data from system memory specified by Buffer to MMIO region specified \r
+ by starting address StartAddress by using 8-bit access. The total number \r
+ of byte to be copied is specified by Length. Buffer is returned.\r
+ \r
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().\r
+\r
+\r
+ @param StartAddress Starting address for the MMIO region to be copied to.\r
+ @param Length Size in bytes of the copy.\r
+ @param Buffer Pointer to a system memory buffer containing the data to write.\r
+\r
+ @return Buffer\r
+\r
+**/\r
+UINT8 *\r
+EFIAPI\r
+S3MmioWriteBuffer8 (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Length,\r
+ IN CONST UINT8 *Buffer\r
+ )\r
+{\r
+ UINT8 *ReturnBuffer;\r
+ RETURN_STATUS Status;\r
+\r
+ ReturnBuffer = MmioWriteBuffer8 (StartAddress, Length, Buffer);\r
+\r
+ Status = S3BootScriptSaveMemWrite (\r
+ S3BootScriptWidthUint8,\r
+ StartAddress,\r
+ Length / sizeof (UINT8),\r
+ ReturnBuffer\r
+ );\r
+ ASSERT (Status == RETURN_SUCCESS);\r
+\r
+ return ReturnBuffer;\r
+}\r
+\r
+/**\r
+ Copy data from system memory to MMIO region by using 16-bit access\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Copy data from system memory specified by Buffer to MMIO region specified \r
+ by starting address StartAddress by using 16-bit access. The total number \r
+ of byte to be copied is specified by Length. Buffer is returned.\r
+ \r
+ If StartAddress is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().\r
+\r
+ If Length is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param StartAddress Starting address for the MMIO region to be copied to.\r
+ @param Length Size in bytes of the copy.\r
+ @param Buffer Pointer to a system memory buffer containing the data to write.\r
+\r
+ @return Buffer\r
+\r
+**/\r
+UINT16 *\r
+EFIAPI\r
+S3MmioWriteBuffer16 (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Length,\r
+ IN CONST UINT16 *Buffer\r
+ )\r
+{\r
+ UINT16 *ReturnBuffer;\r
+ RETURN_STATUS Status;\r
+\r
+ ReturnBuffer = MmioWriteBuffer16 (StartAddress, Length, Buffer);\r
+\r
+ Status = S3BootScriptSaveMemWrite (\r
+ S3BootScriptWidthUint16,\r
+ StartAddress,\r
+ Length / sizeof (UINT16),\r
+ ReturnBuffer\r
+ );\r
+ ASSERT (Status == RETURN_SUCCESS);\r
+\r
+ return ReturnBuffer;\r
+}\r
+\r
+\r
+/**\r
+ Copy data from system memory to MMIO region by using 32-bit access\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Copy data from system memory specified by Buffer to MMIO region specified \r
+ by starting address StartAddress by using 32-bit access. The total number \r
+ of byte to be copied is specified by Length. Buffer is returned.\r
+ \r
+ If StartAddress is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().\r
+\r
+ If Length is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param StartAddress Starting address for the MMIO region to be copied to.\r
+ @param Length Size in bytes of the copy.\r
+ @param Buffer Pointer to a system memory buffer containing the data to write.\r
+\r
+ @return Buffer\r
+\r
+**/\r
+UINT32 *\r
+EFIAPI\r
+S3MmioWriteBuffer32 (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Length,\r
+ IN CONST UINT32 *Buffer\r
+ )\r
+{\r
+ UINT32 *ReturnBuffer;\r
+ RETURN_STATUS Status;\r
+\r
+ ReturnBuffer = MmioWriteBuffer32 (StartAddress, Length, Buffer);\r
+\r
+ Status = S3BootScriptSaveMemWrite (\r
+ S3BootScriptWidthUint32,\r
+ StartAddress,\r
+ Length / sizeof (UINT32),\r
+ ReturnBuffer\r
+ );\r
+ ASSERT (Status == RETURN_SUCCESS);\r
+\r
+ return ReturnBuffer;\r
+}\r
+\r
+/**\r
+ Copy data from system memory to MMIO region by using 64-bit access\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Copy data from system memory specified by Buffer to MMIO region specified \r
+ by starting address StartAddress by using 64-bit access. The total number \r
+ of byte to be copied is specified by Length. Buffer is returned.\r
+ \r
+ If StartAddress is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().\r
+\r
+ If Length is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+ @param StartAddress Starting address for the MMIO region to be copied to.\r
+ @param Length Size in bytes of the copy.\r
+ @param Buffer Pointer to a system memory buffer containing the data to write.\r
+\r
+ @return Buffer\r
+\r
+**/\r
+UINT64 *\r
+EFIAPI\r
+S3MmioWriteBuffer64 (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Length,\r
+ IN CONST UINT64 *Buffer\r
+ )\r
+{\r
+ UINT64 *ReturnBuffer;\r
+ RETURN_STATUS Status;\r
+\r
+ ReturnBuffer = MmioWriteBuffer64 (StartAddress, Length, Buffer);\r
+\r
+ Status = S3BootScriptSaveMemWrite (\r
+ S3BootScriptWidthUint64,\r
+ StartAddress,\r
+ Length / sizeof (UINT64),\r
+ ReturnBuffer\r
+ );\r
+ ASSERT (Status == RETURN_SUCCESS);\r
+\r
+ return ReturnBuffer;\r
+}\r
+\r
--- /dev/null
+## @file\r
+# Component discription file for DxeS3PciLib module\r
+#\r
+# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials are\r
+# licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+##\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = BaseS3PciLib\r
+ FILE_GUID = F66B6BD2-513F-441d-B367-2D5BD4998A50\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = S3PciLib \r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+#\r
+\r
+[Sources]\r
+ S3PciLib.c\r
+\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+\r
+\r
+[LibraryClasses]\r
+ PciLib\r
+ S3BootScriptLib\r
+ DebugLib\r
+\r
--- /dev/null
+/** @file\r
+ PCI configuration Library Services that do PCI configuration and also enable\r
+ the PCI operations to be replayed during an S3 resume. This library class\r
+ maps directly on top of the PciLib class. \r
+\r
+ Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions\r
+ of the BSD License which accompanies this distribution. The\r
+ full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+\r
+#include <Base.h>\r
+\r
+#include <Library/DebugLib.h>\r
+#include <Library/S3BootScriptLib.h>\r
+#include <Library/PciLib.h>\r
+#include <Library/S3PciLib.h>\r
+\r
+#define PCILIB_TO_COMMON_ADDRESS(Address) \\r
+ ((UINT64) ((((UINTN) ((Address>>20) & 0xff)) << 24) + (((UINTN) ((Address>>15) & 0x1f)) << 16) + (((UINTN) ((Address>>12) & 0x07)) << 8) + ((UINTN) (Address & 0xfff ))))\r
+\r
+/**\r
+ Saves a PCI configuration value to the boot script.\r
+\r
+ This internal worker function saves a PCI configuration value in\r
+ the S3 script to be replayed on S3 resume. \r
+\r
+ If the saving process fails, then ASSERT().\r
+\r
+ @param Width The width of PCI configuration.\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param Buffer The buffer containing value.\r
+\r
+**/\r
+VOID\r
+InternalSavePciWriteValueToBootScript (\r
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,\r
+ IN UINTN Address,\r
+ IN VOID *Buffer\r
+ )\r
+{\r
+ RETURN_STATUS Status;\r
+\r
+ Status = S3BootScriptSavePciCfgWrite (\r
+ Width,\r
+ PCILIB_TO_COMMON_ADDRESS(Address),\r
+ 1,\r
+ Buffer\r
+ );\r
+ ASSERT (Status == RETURN_SUCCESS);\r
+}\r
+\r
+/**\r
+ Saves an 8-bit PCI configuration value to the boot script.\r
+\r
+ This internal worker function saves an 8-bit PCI configuration value in\r
+ the S3 script to be replayed on S3 resume. \r
+\r
+ If the saving process fails, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param Value The value saved to boot script.\r
+\r
+ @return Value.\r
+\r
+**/\r
+UINT8\r
+InternalSavePciWrite8ValueToBootScript (\r
+ IN UINTN Address,\r
+ IN UINT8 Value\r
+ )\r
+{\r
+ InternalSavePciWriteValueToBootScript (S3BootScriptWidthUint8, Address, &Value);\r
+\r
+ return Value;\r
+}\r
+\r
+/**\r
+ Reads an 8-bit PCI configuration register and saves the value in the S3\r
+ script to be replayed on S3 resume.\r
+\r
+ Reads and returns the 8-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+\r
+ @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciRead8 (\r
+ IN UINTN Address\r
+ )\r
+{\r
+ return InternalSavePciWrite8ValueToBootScript (Address, PciRead8 (Address));\r
+}\r
+\r
+/**\r
+ Writes an 8-bit PCI configuration register and saves the value in the S3\r
+ script to be replayed on S3 resume.\r
+\r
+ Writes the 8-bit PCI configuration register specified by Address with the\r
+ value specified by Value. Value is returned. This function must guarantee\r
+ that all PCI read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param Value The value to write.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciWrite8 (\r
+ IN UINTN Address,\r
+ IN UINT8 Value\r
+ )\r
+{\r
+ return InternalSavePciWrite8ValueToBootScript (Address, PciWrite8 (Address, Value));\r
+}\r
+\r
+/**\r
+ Performs a bitwise OR of an 8-bit PCI configuration register with\r
+ an 8-bit value and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise OR between the read result and the value specified by\r
+ OrData, and writes the result to the 8-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciOr8 (\r
+ IN UINTN Address,\r
+ IN UINT8 OrData\r
+ )\r
+{\r
+ return InternalSavePciWrite8ValueToBootScript (Address, PciOr8 (Address, OrData));\r
+}\r
+\r
+/**\r
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+ value and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 8-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciAnd8 (\r
+ IN UINTN Address,\r
+ IN UINT8 AndData\r
+ )\r
+{\r
+ return InternalSavePciWrite8ValueToBootScript (Address, PciAnd8 (Address, AndData));\r
+}\r
+\r
+/**\r
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+ value, followed a bitwise OR with another 8-bit value and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise OR between the result of the AND operation and\r
+ the value specified by OrData, and writes the result to the 8-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciAndThenOr8 (\r
+ IN UINTN Address,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ )\r
+{\r
+ return InternalSavePciWrite8ValueToBootScript (Address, PciAndThenOr8 (Address, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register and saves the value in\r
+ the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is\r
+ specified by the StartBit and the EndBit. The value of the bit field is\r
+ returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+\r
+ @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciBitFieldRead8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ )\r
+{\r
+ return InternalSavePciWrite8ValueToBootScript (Address, PciBitFieldRead8 (Address, StartBit, EndBit));\r
+}\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register and saves the value in\r
+ the S3 script to be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the PCI configuration register. The bit\r
+ field is specified by the StartBit and the EndBit. All other bits in the\r
+ destination PCI configuration register are preserved. The new value of the\r
+ 8-bit register is returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciBitFieldWrite8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 Value\r
+ )\r
+{\r
+ return InternalSavePciWrite8ValueToBootScript (Address, PciBitFieldWrite8 (Address, StartBit, EndBit, Value));\r
+}\r
+\r
+/**\r
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 8-bit port and saves the value\r
+ in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise OR between the read result and the value specified by\r
+ OrData, and writes the result to the 8-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciBitFieldOr8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 OrData\r
+ )\r
+{\r
+ return InternalSavePciWrite8ValueToBootScript (Address, PciBitFieldOr8 (Address, StartBit, EndBit, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise\r
+ AND, and writes the result back to the bit field in the 8-bit register and\r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 8-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized. Extra left bits in AndData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciBitFieldAnd8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData\r
+ )\r
+{\r
+ return InternalSavePciWrite8ValueToBootScript (Address, PciBitFieldAnd8 (Address, StartBit, EndBit, AndData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in an 8-bit Address, performs a bitwise AND followed by a\r
+ bitwise OR, and writes the result back to the bit field in the\r
+ 8-bit port and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND followed by a bitwise OR between the read result and\r
+ the value specified by AndData, and writes the result to the 8-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized. Extra left bits in both AndData and\r
+ OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3PciBitFieldAndThenOr8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ )\r
+{\r
+ return InternalSavePciWrite8ValueToBootScript (Address, PciBitFieldAndThenOr8 (Address, StartBit, EndBit, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Saves a 16-bit PCI configuration value to the boot script.\r
+\r
+ This internal worker function saves a 16-bit PCI configuration value in\r
+ the S3 script to be replayed on S3 resume. \r
+\r
+ If the saving process fails, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param Value The value to write.\r
+\r
+ @return Value.\r
+\r
+**/\r
+UINT16\r
+InternalSavePciWrite16ValueToBootScript (\r
+ IN UINTN Address,\r
+ IN UINT16 Value\r
+ )\r
+{\r
+ InternalSavePciWriteValueToBootScript (S3BootScriptWidthUint16, Address, &Value);\r
+\r
+ return Value;\r
+}\r
+\r
+/**\r
+ Reads a 16-bit PCI configuration register and saves the value in the S3\r
+ script to be replayed on S3 resume.\r
+\r
+ Reads and returns the 16-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+\r
+ @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciRead16 (\r
+ IN UINTN Address\r
+ )\r
+{\r
+ return InternalSavePciWrite16ValueToBootScript (Address, PciRead16 (Address));\r
+}\r
+\r
+/**\r
+ Writes a 16-bit PCI configuration register and saves the value in the S3\r
+ script to be replayed on S3 resume.\r
+\r
+ Writes the 16-bit PCI configuration register specified by Address with the\r
+ value specified by Value. Value is returned. This function must guarantee\r
+ that all PCI read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param Value The value to write.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciWrite16 (\r
+ IN UINTN Address,\r
+ IN UINT16 Value\r
+ )\r
+{\r
+ return InternalSavePciWrite16ValueToBootScript (Address, PciWrite16 (Address, Value));\r
+}\r
+\r
+/**\r
+ Performs a bitwise OR of a 16-bit PCI configuration register with\r
+ a 16-bit value and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise OR between the read result and the value specified by\r
+ OrData, and writes the result to the 16-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciOr16 (\r
+ IN UINTN Address,\r
+ IN UINT16 OrData\r
+ )\r
+{\r
+ return InternalSavePciWrite16ValueToBootScript (Address, PciOr16 (Address, OrData));\r
+}\r
+\r
+/**\r
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+ value and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 16-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciAnd16 (\r
+ IN UINTN Address,\r
+ IN UINT16 AndData\r
+ )\r
+{\r
+ return InternalSavePciWrite16ValueToBootScript (Address, PciAnd16 (Address, AndData));\r
+}\r
+\r
+/**\r
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+ value, followed a bitwise OR with another 16-bit value and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise OR between the result of the AND operation and\r
+ the value specified by OrData, and writes the result to the 16-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciAndThenOr16 (\r
+ IN UINTN Address,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ )\r
+{\r
+ return InternalSavePciWrite16ValueToBootScript (Address, PciAndThenOr16 (Address, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register and saves the value in\r
+ the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is\r
+ specified by the StartBit and the EndBit. The value of the bit field is\r
+ returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+\r
+ @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciBitFieldRead16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ )\r
+{\r
+ return InternalSavePciWrite16ValueToBootScript (Address, PciBitFieldRead16 (Address, StartBit, EndBit));\r
+}\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register and saves the value in\r
+ the S3 script to be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the PCI configuration register. The bit\r
+ field is specified by the StartBit and the EndBit. All other bits in the\r
+ destination PCI configuration register are preserved. The new value of the\r
+ 16-bit register is returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciBitFieldWrite16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 Value\r
+ )\r
+{\r
+ return InternalSavePciWrite16ValueToBootScript (Address, PciBitFieldWrite16 (Address, StartBit, EndBit, Value));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 16-bit port and saves the value\r
+ in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise OR between the read result and the value specified by\r
+ OrData, and writes the result to the 16-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciBitFieldOr16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 OrData\r
+ )\r
+{\r
+ return InternalSavePciWrite16ValueToBootScript (Address, PciBitFieldOr16 (Address, StartBit, EndBit, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise\r
+ AND, and writes the result back to the bit field in the 16-bit register and\r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 16-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized. Extra left bits in AndData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciBitFieldAnd16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData\r
+ )\r
+{\r
+ return InternalSavePciWrite16ValueToBootScript (Address, PciBitFieldAnd16 (Address, StartBit, EndBit, AndData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 16-bit Address, performs a bitwise AND followed by a\r
+ bitwise OR, and writes the result back to the bit field in the\r
+ 16-bit port and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND followed by a bitwise OR between the read result and\r
+ the value specified by AndData, and writes the result to the 16-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized. Extra left bits in both AndData and\r
+ OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3PciBitFieldAndThenOr16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ )\r
+{\r
+ return InternalSavePciWrite16ValueToBootScript (Address, PciBitFieldAndThenOr16 (Address, StartBit, EndBit, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Saves a 32-bit PCI configuration value to the boot script.\r
+\r
+ This internal worker function saves a 32-bit PCI configuration value in the S3 script\r
+ to be replayed on S3 resume. \r
+\r
+ If the saving process fails, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param Value The value to write.\r
+\r
+ @return Value.\r
+\r
+**/\r
+UINT32\r
+InternalSavePciWrite32ValueToBootScript (\r
+ IN UINTN Address,\r
+ IN UINT32 Value\r
+ )\r
+{\r
+ InternalSavePciWriteValueToBootScript (S3BootScriptWidthUint32, Address, &Value);\r
+\r
+ return Value;\r
+}\r
+\r
+/**\r
+ Reads a 32-bit PCI configuration register and saves the value in the S3\r
+ script to be replayed on S3 resume.\r
+\r
+ Reads and returns the 32-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+\r
+ @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciRead32 (\r
+ IN UINTN Address\r
+ )\r
+{\r
+ return InternalSavePciWrite32ValueToBootScript (Address, PciRead32 (Address));\r
+}\r
+\r
+/**\r
+ Writes a 32-bit PCI configuration register and saves the value in the S3\r
+ script to be replayed on S3 resume.\r
+\r
+ Writes the 32-bit PCI configuration register specified by Address with the\r
+ value specified by Value. Value is returned. This function must guarantee\r
+ that all PCI read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param Value The value to write.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciWrite32 (\r
+ IN UINTN Address,\r
+ IN UINT32 Value\r
+ )\r
+{\r
+ return InternalSavePciWrite32ValueToBootScript (Address, PciWrite32 (Address, Value));\r
+}\r
+\r
+/**\r
+ Performs a bitwise OR of a 32-bit PCI configuration register with\r
+ a 32-bit value and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise OR between the read result and the value specified by\r
+ OrData, and writes the result to the 32-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciOr32 (\r
+ IN UINTN Address,\r
+ IN UINT32 OrData\r
+ )\r
+{\r
+ return InternalSavePciWrite32ValueToBootScript (Address, PciOr32 (Address, OrData));\r
+}\r
+\r
+/**\r
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+ value and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 32-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciAnd32 (\r
+ IN UINTN Address,\r
+ IN UINT32 AndData\r
+ )\r
+{\r
+ return InternalSavePciWrite32ValueToBootScript (Address, PciAnd32 (Address, AndData));\r
+}\r
+\r
+/**\r
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+ value, followed a bitwise OR with another 32-bit value and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise OR between the result of the AND operation and\r
+ the value specified by OrData, and writes the result to the 32-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciAndThenOr32 (\r
+ IN UINTN Address,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ )\r
+{\r
+ return InternalSavePciWrite32ValueToBootScript (Address, PciAndThenOr32 (Address, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register and saves the value in\r
+ the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is\r
+ specified by the StartBit and the EndBit. The value of the bit field is\r
+ returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+\r
+ @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciBitFieldRead32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ )\r
+{\r
+ return InternalSavePciWrite32ValueToBootScript (Address, PciBitFieldRead32 (Address, StartBit, EndBit));\r
+}\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register and saves the value in\r
+ the S3 script to be replayed on S3 resume.\r
+\r
+ Writes Value to the bit field of the PCI configuration register. The bit\r
+ field is specified by the StartBit and the EndBit. All other bits in the\r
+ destination PCI configuration register are preserved. The new value of the\r
+ 32-bit register is returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciBitFieldWrite32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 Value\r
+ )\r
+{\r
+ return InternalSavePciWrite32ValueToBootScript (Address, PciBitFieldWrite32 (Address, StartBit, EndBit, Value));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 32-bit port and saves the value\r
+ in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise OR between the read result and the value specified by\r
+ OrData, and writes the result to the 32-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciBitFieldOr32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 OrData\r
+ )\r
+{\r
+ return InternalSavePciWrite32ValueToBootScript (Address, PciBitFieldOr32 (Address, StartBit, EndBit, OrData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise\r
+ AND, and writes the result back to the bit field in the 32-bit register and\r
+ saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 32-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized. Extra left bits in AndData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciBitFieldAnd32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData\r
+ )\r
+{\r
+ return InternalSavePciWrite32ValueToBootScript (Address, PciBitFieldAnd32 (Address, StartBit, EndBit, AndData));\r
+}\r
+\r
+/**\r
+ Reads a bit field in a 32-bit Address, performs a bitwise AND followed by a\r
+ bitwise OR, and writes the result back to the bit field in the\r
+ 32-bit port and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND followed by a bitwise OR between the read result and\r
+ the value specified by AndData, and writes the result to the 32-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized. Extra left bits in both AndData and\r
+ OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+S3PciBitFieldAndThenOr32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ )\r
+{\r
+ return InternalSavePciWrite32ValueToBootScript (Address, PciBitFieldAndThenOr32 (Address, StartBit, EndBit, AndData, OrData));\r
+}\r
+\r
+/**\r
+ Reads a range of PCI configuration registers into a caller supplied buffer\r
+ and saves the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Reads the range of PCI configuration registers specified by StartAddress and\r
+ Size into the buffer specified by Buffer. This function only allows the PCI\r
+ configuration registers from a single PCI function to be read. Size is\r
+ returned. When possible 32-bit PCI configuration read cycles are used to read\r
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
+ and 16-bit PCI configuration read cycles may be used at the beginning and the\r
+ end of the range.\r
+\r
+ If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
+ If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+ @param StartAddress Starting address that encodes the PCI Bus, Device,\r
+ Function and Register.\r
+ @param Size Size in bytes of the transfer.\r
+ @param Buffer Pointer to a buffer receiving the data read.\r
+\r
+ @return Size\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+S3PciReadBuffer (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Size,\r
+ OUT VOID *Buffer\r
+ )\r
+{\r
+ RETURN_STATUS Status;\r
+\r
+ Status = S3BootScriptSavePciCfgWrite (\r
+ S3BootScriptWidthUint8,\r
+ PCILIB_TO_COMMON_ADDRESS (StartAddress),\r
+ PciReadBuffer (StartAddress, Size, Buffer),\r
+ Buffer\r
+ );\r
+ ASSERT (Status == RETURN_SUCCESS);\r
+\r
+ return Size;\r
+}\r
+\r
+/**\r
+ Copies the data in a caller supplied buffer to a specified range of PCI\r
+ configuration space and saves the value in the S3 script to be replayed on S3\r
+ resume.\r
+\r
+ Writes the range of PCI configuration registers specified by StartAddress and\r
+ Size from the buffer specified by Buffer. This function only allows the PCI\r
+ configuration registers from a single PCI function to be written. Size is\r
+ returned. When possible 32-bit PCI configuration write cycles are used to\r
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,\r
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
+ and the end of the range.\r
+\r
+ If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
+ If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+ @param StartAddress Starting address that encodes the PCI Bus, Device,\r
+ Function and Register.\r
+ @param Size Size in bytes of the transfer.\r
+ @param Buffer Pointer to a buffer containing the data to write.\r
+\r
+ @return Size\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+S3PciWriteBuffer (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Size,\r
+ IN VOID *Buffer\r
+ )\r
+{\r
+ RETURN_STATUS Status;\r
+\r
+ Status = S3BootScriptSavePciCfgWrite (\r
+ S3BootScriptWidthUint8,\r
+ PCILIB_TO_COMMON_ADDRESS (StartAddress),\r
+ PciWriteBuffer (StartAddress, Size, Buffer),\r
+ Buffer\r
+ );\r
+ ASSERT (Status == RETURN_SUCCESS);\r
+ \r
+ return Size;\r
+}\r
--- /dev/null
+## @file\r
+# Component description file for S3SmbusLib.\r
+#\r
+# Smbus Library Services that do SMBus transactions and also enable the\r
+# operatation to be replayed during an S3 resume. This library class maps\r
+# directly on top of the SmbusLib class.\r
+#\r
+# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials are\r
+# licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+##\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = BaseS3SmbusLib\r
+ FILE_GUID = 01190654-FED0-40d3-BA7F-2925539E5830\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = S3SmbusLib \r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+#\r
+\r
+[Sources]\r
+ S3SmbusLib.c\r
+\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+\r
+\r
+[LibraryClasses]\r
+ DebugLib\r
+ SmbusLib\r
+ S3BootScriptLib\r
+\r
--- /dev/null
+/** @file\r
+ Smbus Library Services that do SMBus transactions and also enable the operatation\r
+ to be replayed during an S3 resume. This library class maps directly on top\r
+ of the SmbusLib class. \r
+\r
+ Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions\r
+ of the BSD License which accompanies this distribution. The\r
+ full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+\r
+#include <Base.h>\r
+\r
+#include <Library/DebugLib.h>\r
+#include <Library/S3BootScriptLib.h>\r
+#include <Library/SmbusLib.h>\r
+#include <Library/S3SmbusLib.h>\r
+\r
+/**\r
+ Saves an SMBus operation to S3 script to be replayed on S3 resume. \r
+\r
+ This function provides a standard way to save SMBus operation to S3 boot Script.\r
+ The data can either be of the Length byte, word, or a block of data.\r
+ If it falis to save S3 boot script, then ASSERT ().\r
+\r
+ @param SmbusOperation Signifies which particular SMBus hardware protocol instance that it will use to\r
+ execute the SMBus transactions.\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Length Signifies the number of bytes that this operation will do. The maximum number of\r
+ bytes can be revision specific and operation specific.\r
+ @param Buffer Contains the value of data to execute to the SMBus slave device. Not all operations\r
+ require this argument. The length of this buffer is identified by Length.\r
+\r
+**/\r
+VOID\r
+InternalSaveSmBusExecToBootScript (\r
+ IN EFI_SMBUS_OPERATION SmbusOperation,\r
+ IN UINTN SmBusAddress,\r
+ IN UINTN Length,\r
+ IN OUT VOID *Buffer\r
+ )\r
+{\r
+ RETURN_STATUS Status;\r
+\r
+ Status = S3BootScriptSaveSmbusExecute (\r
+ SmBusAddress,\r
+ SmbusOperation,\r
+ &Length,\r
+ Buffer\r
+ );\r
+ ASSERT (Status == RETURN_SUCCESS);\r
+}\r
+\r
+/**\r
+ Executes an SMBUS quick read command and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address field of SmBusAddress is required.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If PEC is set in SmBusAddress, then ASSERT().\r
+ If Command in SmBusAddress is not zero, then ASSERT().\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+S3SmBusQuickRead (\r
+ IN UINTN SmBusAddress,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+{\r
+ SmBusQuickRead (SmBusAddress, Status);\r
+ \r
+ InternalSaveSmBusExecToBootScript (EfiSmbusQuickRead, SmBusAddress, 0, NULL);\r
+}\r
+\r
+/**\r
+ Executes an SMBUS quick write command and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address field of SmBusAddress is required.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If PEC is set in SmBusAddress, then ASSERT().\r
+ If Command in SmBusAddress is not zero, then ASSERT().\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+S3SmBusQuickWrite (\r
+ IN UINTN SmBusAddress,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+{\r
+ SmBusQuickWrite (SmBusAddress, Status);\r
+\r
+ InternalSaveSmBusExecToBootScript (EfiSmbusQuickWrite, SmBusAddress, 0, NULL);\r
+}\r
+ \r
+/**\r
+ Executes an SMBUS receive byte command and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address field of SmBusAddress is required.\r
+ The byte received from the SMBUS is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Command in SmBusAddress is not zero, then ASSERT().\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The byte received from the SMBUS.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3SmBusReceiveByte (\r
+ IN UINTN SmBusAddress,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+{\r
+ UINT8 Byte;\r
+\r
+ Byte = SmBusReceiveByte (SmBusAddress, Status);\r
+\r
+ InternalSaveSmBusExecToBootScript (EfiSmbusReceiveByte, SmBusAddress, 1, &Byte);\r
+\r
+ return Byte;\r
+}\r
+\r
+/**\r
+ Executes an SMBUS send byte command and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress.\r
+ The byte specified by Value is sent.\r
+ Only the SMBUS slave address field of SmBusAddress is required. Value is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Command in SmBusAddress is not zero, then ASSERT().\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Value The 8-bit value to send.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The parameter of Value.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3SmBusSendByte (\r
+ IN UINTN SmBusAddress,\r
+ IN UINT8 Value,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+{\r
+ UINT8 Byte;\r
+\r
+ Byte = SmBusSendByte (SmBusAddress, Value, Status);\r
+\r
+ InternalSaveSmBusExecToBootScript (EfiSmbusSendByte, SmBusAddress, 1, &Byte);\r
+\r
+ return Byte;\r
+}\r
+\r
+/**\r
+ Executes an SMBUS read data byte command and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ The 8-bit value read from the SMBUS is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The byte read from the SMBUS.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3SmBusReadDataByte (\r
+ IN UINTN SmBusAddress,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+{\r
+ UINT8 Byte;\r
+\r
+ Byte = SmBusReadDataByte (SmBusAddress, Status);\r
+\r
+ InternalSaveSmBusExecToBootScript (EfiSmbusReadByte, SmBusAddress, 1, &Byte);\r
+\r
+ return Byte;\r
+}\r
+\r
+/**\r
+ Executes an SMBUS write data byte command and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress.\r
+ The 8-bit value specified by Value is written.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ Value is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Value The 8-bit value to write.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The parameter of Value.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+S3SmBusWriteDataByte (\r
+ IN UINTN SmBusAddress,\r
+ IN UINT8 Value,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+{\r
+ UINT8 Byte;\r
+\r
+ Byte = SmBusWriteDataByte (SmBusAddress, Value, Status);\r
+\r
+ InternalSaveSmBusExecToBootScript (EfiSmbusWriteByte, SmBusAddress, 1, &Byte);\r
+\r
+ return Byte;\r
+}\r
+\r
+/**\r
+ Executes an SMBUS read data word command and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ The 16-bit value read from the SMBUS is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+ \r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The byte read from the SMBUS.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3SmBusReadDataWord (\r
+ IN UINTN SmBusAddress,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+{\r
+ UINT16 Word;\r
+ \r
+ Word = SmBusReadDataWord (SmBusAddress, Status);\r
+\r
+ InternalSaveSmBusExecToBootScript (EfiSmbusReadWord, SmBusAddress, 2, &Word);\r
+\r
+ return Word;\r
+}\r
+\r
+/**\r
+ Executes an SMBUS write data word command and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress.\r
+ The 16-bit value specified by Value is written.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ Value is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Value The 16-bit value to write.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The parameter of Value.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3SmBusWriteDataWord (\r
+ IN UINTN SmBusAddress,\r
+ IN UINT16 Value,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+{\r
+ UINT16 Word;\r
+\r
+ Word = SmBusWriteDataWord (SmBusAddress, Value, Status);\r
+\r
+ InternalSaveSmBusExecToBootScript (EfiSmbusWriteWord, SmBusAddress, 2, &Word);\r
+\r
+ return Word;\r
+}\r
+\r
+/**\r
+ Executes an SMBUS process call command and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress.\r
+ The 16-bit value specified by Value is written.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ The 16-bit value returned by the process call command is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Value The 16-bit value to write.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The 16-bit value returned by the process call command.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+S3SmBusProcessCall (\r
+ IN UINTN SmBusAddress,\r
+ IN UINT16 Value,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+{\r
+ UINT16 Word;\r
+\r
+ Word = SmBusProcessCall (SmBusAddress, Value, Status);\r
+\r
+ InternalSaveSmBusExecToBootScript (EfiSmbusProcessCall, SmBusAddress, 2, &Value);\r
+\r
+ return Word; \r
+}\r
+\r
+/**\r
+ Executes an SMBUS read block command and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ Bytes are read from the SMBUS and stored in Buffer.\r
+ The number of bytes read is returned, and will never return a value larger than 32-bytes.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.\r
+ SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If Buffer is NULL, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The number of bytes read.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+S3SmBusReadBlock (\r
+ IN UINTN SmBusAddress,\r
+ OUT VOID *Buffer,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+{\r
+ UINTN Length;\r
+\r
+ Length = SmBusReadBlock (SmBusAddress, Buffer, Status);\r
+\r
+ InternalSaveSmBusExecToBootScript (EfiSmbusReadBlock, SmBusAddress, Length, Buffer);\r
+\r
+ return Length;\r
+}\r
+\r
+/**\r
+ Executes an SMBUS write block command and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress.\r
+ The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r
+ Bytes are written to the SMBUS from Buffer.\r
+ The number of bytes written is returned, and will never return a value larger than 32-bytes.\r
+ If Status is not NULL, then the status of the executed command is returned in Status. \r
+ If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r
+ If Buffer is NULL, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The number of bytes written.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+S3SmBusWriteBlock (\r
+ IN UINTN SmBusAddress,\r
+ OUT VOID *Buffer,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+{\r
+ UINTN Length;\r
+\r
+ Length = SmBusWriteBlock (SmBusAddress, Buffer, Status);\r
+\r
+ InternalSaveSmBusExecToBootScript (EfiSmbusWriteBlock, SmBusAddress, SMBUS_LIB_LENGTH (SmBusAddress), Buffer);\r
+ \r
+ return Length;\r
+}\r
+\r
+/**\r
+ Executes an SMBUS block process call command and saves the value in the S3 script to be replayed\r
+ on S3 resume.\r
+\r
+ Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.\r
+ The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r
+ Bytes are written to the SMBUS from WriteBuffer. Bytes are then read from the SMBUS into ReadBuffer.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ It is the caller's responsibility to make sure ReadBuffer is large enough for the total number of bytes read.\r
+ SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r
+ If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r
+ If WriteBuffer is NULL, then ASSERT().\r
+ If ReadBuffer is NULL, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param WriteBuffer Pointer to the buffer of bytes to write to the SMBUS.\r
+ @param ReadBuffer Pointer to the buffer of bytes to read from the SMBUS.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The number of bytes written.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+S3SmBusBlockProcessCall (\r
+ IN UINTN SmBusAddress,\r
+ IN VOID *WriteBuffer,\r
+ OUT VOID *ReadBuffer,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+{\r
+ UINTN Length;\r
+ \r
+ Length = SmBusBlockProcessCall (SmBusAddress, WriteBuffer, ReadBuffer, Status);\r
+ \r
+ InternalSaveSmBusExecToBootScript (EfiSmbusBWBRProcessCall, SmBusAddress, SMBUS_LIB_LENGTH (SmBusAddress), ReadBuffer);\r
+\r
+ return Length;\r
+}\r
--- /dev/null
+## @file\r
+# Component description file for S3StallLib.\r
+#\r
+# Stall Services that do stall and also enable the Stall operatation\r
+# to be replayed during an S3 resume. This library class maps directly on top\r
+# of the Timer class.\r
+#\r
+# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials are\r
+# licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+##\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = BaseS3StallLib\r
+ FILE_GUID = 498C6AC3-CC29-4821-BE6F-7C6F4ECF2C14\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = S3StallLib \r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+#\r
+\r
+[Sources]\r
+ S3StallLib.c\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+\r
+[LibraryClasses]\r
+ DebugLib\r
+ TimerLib\r
+ S3BootScriptLib\r
+\r
--- /dev/null
+/** @file\r
+ Stall Services that do stall and also enable the Stall operatation\r
+ to be replayed during an S3 resume. This library class maps directly on top\r
+ of the Timer class. \r
+\r
+ Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions\r
+ of the BSD License which accompanies this distribution. The\r
+ full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <Base.h>\r
+\r
+#include <Library/TimerLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/S3BootScriptLib.h>\r
+#include <Library/S3StallLib.h>\r
+\r
+\r
+/**\r
+ Stalls the CPU for at least the given number of microseconds and and saves\r
+ the value in the S3 script to be replayed on S3 resume.\r
+\r
+ Stalls the CPU for the number of microseconds specified by MicroSeconds.\r
+\r
+ @param MicroSeconds The minimum number of microseconds to delay.\r
+\r
+ @return MicroSeconds\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+S3Stall (\r
+ IN UINTN MicroSeconds\r
+ )\r
+{\r
+ RETURN_STATUS Status;\r
+ \r
+ Status = S3BootScriptSaveStall (MicroSecondDelay (MicroSeconds));\r
+ ASSERT (Status == RETURN_SUCCESS);\r
+ \r
+ return MicroSeconds;\r
+}\r
+\r
+\r
##\r
SynchronizationLib|Include/Library/SynchronizationLib.h\r
\r
+ ## @libraryclass Defines library APIs used by modules to save S3 Boot\r
+ # Script Opcodes. These OpCode will be restored by S3\r
+ # related modules.\r
+ S3BootScriptLib|Include/Library/S3BootScriptLib.h\r
+ \r
+ ## @libraryclass I/O and MMIO Library Services that do I/O and also enable\r
+ # the I/O operatation to be replayed during an S3 resume.\r
+ # This library class maps directly on top of the IoLib class.\r
+ S3IoLib|Include/Library/S3IoLib.h\r
+\r
+ ## @libraryclass PCI configuration Library Services that do PCI configuration\r
+ # and also enable the PCI operations to be replayed during an\r
+ # S3 resume. This library class maps directly on top of the\r
+ # PciLib class.\r
+ S3PciLib|Include/Library/S3PciLib.h\r
+\r
+ ## @libraryclass Smbus Library Services that do SMBus transactions and also\r
+ # enable the operatation to be replayed during an S3 resume.\r
+ # This library class maps directly on top of the SmbusLib class.\r
+ S3SmbusLib|Include/Library/S3SmbusLib.h\r
+\r
+ ## @libraryclass Stall Services that do stall and also enable the Stall\r
+ # operatation to be replayed during an S3 resume. This\r
+ # library class maps directly on top of the Timer class.\r
+ S3StallLib|Include/Library/S3StallLib.h\r
+\r
[LibraryClasses.IA32, LibraryClasses.X64]\r
## @libraryclass Abstracts both S/W SMI generation and detection.\r
##\r
MdePkg/Library/SmmPciLibPciRootBridgeIo/SmmPciLibPciRootBridgeIo.inf\r
MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf\r
MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.inf\r
- MdePkg/Library/SmmPeriodicSmiLib/SmmPeriodicSmiLib.inf \r
+ MdePkg/Library/SmmPeriodicSmiLib/SmmPeriodicSmiLib.inf\r
+ MdePkg/Library/BaseS3BootScriptLibNull/BaseS3BootScriptLibNull.inf\r
+ MdePkg/Library/BaseS3IoLib/BaseS3IoLib.inf\r
+ MdePkg/Library/BaseS3PciLib/BaseS3PciLib.inf\r
+ MdePkg/Library/BaseS3SmbusLib/BaseS3SmbusLib.inf\r
+ MdePkg/Library/BaseS3StallLib/BaseS3StallLib.inf\r
\r
[Components.IPF]\r
MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf\r
projects / mirror_edk2.git / commitdiff