IntelFrameworkModulePkg: Update LegacyBiosDxe to use UmaAddress and UmaSize in CSM...

The UmaAddress/UmaSize fields allows the CSM to have writable memory
between the top of the option ROMs and the start of its read-only code segment.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Reviewed-by: Elvin Li <elvin.li@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17131 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c
index e51acd0551be21d8f09812f8325b2fb1997e1602..6c2688b4a423cf7e5e0db2fd1d5c375f9d342a77 100644 (file)
--- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c
+++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c
@@ -1238,6 +1238,24 @@ GenericLegacyBoot (
                            0x40000,\r
                            &Granularity\r
                            );\r
                            0x40000,\r
                            &Granularity\r
                            );\r

+\r
+  if ((Private->Legacy16Table->TableLength >= OFFSET_OF (EFI_COMPATIBILITY16_TABLE, HiPermanentMemoryAddress)) &&\r
+      ((Private->Legacy16Table->UmaAddress != 0) && (Private->Legacy16Table->UmaSize != 0))) {\r
+    //\r
+    // Here we could reduce UmaAddress down as far as Private->OptionRom, taking into\r
+    // account the granularity of the access control.\r
+    //\r
+    DEBUG((EFI_D_INFO, "Unlocking UMB RAM region 0x%x-0x%x\n", Private->Legacy16Table->UmaAddress,\r
+                        Private->Legacy16Table->UmaAddress + Private->Legacy16Table->UmaSize));\r
+\r
+    Private->LegacyRegion->UnLock (\r
+                             Private->LegacyRegion,\r
+                             Private->Legacy16Table->UmaAddress,\r
+                             Private->Legacy16Table->UmaSize,\r
+                             &Granularity\r
+                             );\r
+  }\r
+\r

   //\r
   // Lock attributes of the Legacy Region if chipset supports\r
   //\r
   //\r
   // Lock attributes of the Legacy Region if chipset supports\r
   //\r

diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyPci.c b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyPci.c
index 7299fc0e6be45c0cfe5f0fa7906c5e8aa1e12919..9d84ab00000ce8303cb6aa9289065eb2fef10c57 100644 (file)
--- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyPci.c
+++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyPci.c
@@ -1,6 +1,6 @@
 /** @file\r
 \r
 /** @file\r
 \r

-Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r

 \r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions\r
 \r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions\r


@@ -2284,6 +2284,7 @@ LegacyBiosInstallRom (
   UINT32                LocalTime;\r
   UINT32                StartBbsIndex;\r
   UINT32                EndBbsIndex;\r
   UINT32                LocalTime;\r
   UINT32                StartBbsIndex;\r
   UINT32                EndBbsIndex;\r

+  UINT32                MaxRomAddr;\r

   UINTN                 TempData;\r
   UINTN                 InitAddress;\r
   UINTN                 RuntimeAddress;\r
   UINTN                 TempData;\r
   UINTN                 InitAddress;\r
   UINTN                 RuntimeAddress;\r


@@ -2299,6 +2300,15 @@ LegacyBiosInstallRom (
   Function        = 0;\r
   VideoMode       = 0;\r
   PhysicalAddress = 0;\r
   Function        = 0;\r
   VideoMode       = 0;\r
   PhysicalAddress = 0;\r

+  MaxRomAddr      = PcdGet32 (PcdEndOpromShadowAddress);\r
+\r
+  if ((Private->Legacy16Table->TableLength >= OFFSET_OF(EFI_COMPATIBILITY16_TABLE, HiPermanentMemoryAddress)) &&\r
+      (Private->Legacy16Table->UmaAddress != 0) && \r
+      (Private->Legacy16Table->UmaSize != 0) &&\r
+      (MaxRomAddr > (Private->Legacy16Table->UmaAddress))) {\r
+    MaxRomAddr = Private->Legacy16Table->UmaAddress;\r
+  }\r
+\r

 \r
   PciProgramAllInterruptLineRegisters (Private);\r
 \r
 \r
   PciProgramAllInterruptLineRegisters (Private);\r
 \r


@@ -2331,7 +2341,7 @@ LegacyBiosInstallRom (
     //   then test if there is enough space for its RT code\r
     //\r
     RuntimeAddress = Private->OptionRom;\r
     //   then test if there is enough space for its RT code\r
     //\r
     RuntimeAddress = Private->OptionRom;\r

-    if (RuntimeAddress + *RuntimeImageLength > PcdGet32 (PcdEndOpromShadowAddress)) {\r
+    if (RuntimeAddress + *RuntimeImageLength > MaxRomAddr) {\r

       DEBUG ((EFI_D_ERROR, "return LegacyBiosInstallRom(%d): EFI_OUT_OF_RESOURCES (no more space for OpROM)\n", __LINE__));\r
       gBS->FreePages (PhysicalAddress, EFI_SIZE_TO_PAGES (ImageSize));\r
       //\r
       DEBUG ((EFI_D_ERROR, "return LegacyBiosInstallRom(%d): EFI_OUT_OF_RESOURCES (no more space for OpROM)\n", __LINE__));\r
       gBS->FreePages (PhysicalAddress, EFI_SIZE_TO_PAGES (ImageSize));\r
       //\r


@@ -2349,7 +2359,7 @@ LegacyBiosInstallRom (
     //   test if there is enough space for its INIT code\r
     //\r
     InitAddress    = PCI_START_ADDRESS (Private->OptionRom);\r
     //   test if there is enough space for its INIT code\r
     //\r
     InitAddress    = PCI_START_ADDRESS (Private->OptionRom);\r

-    if (InitAddress + ImageSize > PcdGet32 (PcdEndOpromShadowAddress)) {\r
+    if (InitAddress + ImageSize > MaxRomAddr) {\r

       DEBUG ((EFI_D_ERROR, "return LegacyBiosInstallRom(%d): EFI_OUT_OF_RESOURCES (no more space for OpROM)\n", __LINE__));\r
       //\r
       // Report Status Code to indicate that there is no enough space for OpROM\r
       DEBUG ((EFI_D_ERROR, "return LegacyBiosInstallRom(%d): EFI_OUT_OF_RESOURCES (no more space for OpROM)\n", __LINE__));\r
       //\r
       // Report Status Code to indicate that there is no enough space for OpROM\r