Vlv2TbltDevicePkg: Enhance get mtrr mask logic.

In order to not use the deprecated macro, refine
get mtrr mask value logic.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: David Wei <david.wei@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>

diff --git a/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c b/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
index 99bdeb11f9195ee5b13701e46146ab8ac25154f8..5a18a3fe1efc047d37a265b919e15ae0fd22baf4 100644 (file)
--- a/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
+++ b/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
@@ -70,6 +70,34 @@ GetMemorySize (
   );\r
 \r
 \r
   );\r
 \r
 \r

+/**\r
+  Initializes the valid address mask for MTRRs.\r
+\r
+  This function initializes the valid bits mask and valid address mask for MTRRs.\r
+\r
+**/\r
+UINT64\r
+InitializeAddressMtrrMask (\r
+  VOID\r
+  )\r
+{\r
+  UINT32                    RegEax;\r
+  UINT8                     PhysicalAddressBits; \r
+  UINT64                    ValidMtrrBitsMask;\r
+\r
+  AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
+\r
+  if (RegEax >= 0x80000008) {\r
+    AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);\r
+\r
+    PhysicalAddressBits = (UINT8) RegEax;\r
+  } else {\r
+    PhysicalAddressBits = 36;\r
+  }\r
+\r
+  ValidMtrrBitsMask    = LShiftU64 (1, PhysicalAddressBits) - 1;\r
+  return (ValidMtrrBitsMask & 0xfffffffffffff000ULL);\r
+}\r

 \r
 EFI_STATUS\r
 EFIAPI\r
 \r
 EFI_STATUS\r
 EFIAPI\r


@@ -89,6 +117,7 @@ SetPeiCacheMode (
   UINT64                  HighMemoryLength;\r
   UINT8                   Index;\r
   MTRR_SETTINGS           MtrrSetting;\r
   UINT64                  HighMemoryLength;\r
   UINT8                   Index;\r
   MTRR_SETTINGS           MtrrSetting;\r

+  UINT64                  ValidMtrrAddressMask;\r

 \r
   //\r
   // Load Cache PPI\r
 \r
   //\r
   // Load Cache PPI\r


@@ -124,6 +153,8 @@ SetPeiCacheMode (
                              &BootMode\r
                              );\r
 \r
                              &BootMode\r
                              );\r
 \r

+  ValidMtrrAddressMask = InitializeAddressMtrrMask ();\r
+\r

   //\r
   // Determine memory usage\r
   //\r
   //\r
   // Determine memory usage\r
   //\r


@@ -166,15 +197,15 @@ SetPeiCacheMode (
   //\r
   Index = 0;\r
   MtrrSetting.Variables.Mtrr[0].Base = (FixedPcdGet32 (PcdFlashAreaBaseAddress) | CacheWriteProtected);\r
   //\r
   Index = 0;\r
   MtrrSetting.Variables.Mtrr[0].Base = (FixedPcdGet32 (PcdFlashAreaBaseAddress) | CacheWriteProtected);\r

-  MtrrSetting.Variables.Mtrr[0].Mask = ((~((UINT64)(FixedPcdGet32 (PcdFlashAreaSize) - 1))) & MTRR_LIB_CACHE_VALID_ADDRESS) | MTRR_LIB_CACHE_MTRR_ENABLED;\r
+  MtrrSetting.Variables.Mtrr[0].Mask = ((~((UINT64)(FixedPcdGet32 (PcdFlashAreaSize) - 1))) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;\r

   Index ++;\r
 \r
   MemOverflow =0;\r
   while (MaxMemoryLength > MemOverflow){\r
   Index ++;\r
 \r
   MemOverflow =0;\r
   while (MaxMemoryLength > MemOverflow){\r

-    MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow & MTRR_LIB_CACHE_VALID_ADDRESS) | CacheWriteBack;\r
+    MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow & ValidMtrrAddressMask) | CacheWriteBack;\r

     MemoryLength = MaxMemoryLength - MemOverflow;\r
     MemoryLength = GetPowerOfTwo64 (MemoryLength);\r
     MemoryLength = MaxMemoryLength - MemOverflow;\r
     MemoryLength = GetPowerOfTwo64 (MemoryLength);\r

-    MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) & MTRR_LIB_CACHE_VALID_ADDRESS) | MTRR_LIB_CACHE_MTRR_ENABLED;\r
+    MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;\r

 \r
     MemOverflow += MemoryLength;\r
     Index++;\r
 \r
     MemOverflow += MemoryLength;\r
     Index++;\r


@@ -185,15 +216,15 @@ SetPeiCacheMode (
   while (MaxMemoryLength != MemoryLength) {\r
     MemoryLengthUc = GetPowerOfTwo64 (MaxMemoryLength - MemoryLength);\r
 \r
   while (MaxMemoryLength != MemoryLength) {\r
     MemoryLengthUc = GetPowerOfTwo64 (MaxMemoryLength - MemoryLength);\r
 \r

-    MtrrSetting.Variables.Mtrr[Index].Base = ((MaxMemoryLength - MemoryLengthUc) & MTRR_LIB_CACHE_VALID_ADDRESS) | CacheUncacheable;\r
-    MtrrSetting.Variables.Mtrr[Index].Mask= ((~(MemoryLengthUc   - 1)) & MTRR_LIB_CACHE_VALID_ADDRESS) | MTRR_LIB_CACHE_MTRR_ENABLED;\r
+    MtrrSetting.Variables.Mtrr[Index].Base = ((MaxMemoryLength - MemoryLengthUc) & ValidMtrrAddressMask) | CacheUncacheable;\r
+    MtrrSetting.Variables.Mtrr[Index].Mask= ((~(MemoryLengthUc   - 1)) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;\r

     MaxMemoryLength -= MemoryLengthUc;\r
     Index++;\r
   }\r
 \r
   MemOverflow =0x100000000;\r
   while (HighMemoryLength > 0) {\r
     MaxMemoryLength -= MemoryLengthUc;\r
     Index++;\r
   }\r
 \r
   MemOverflow =0x100000000;\r
   while (HighMemoryLength > 0) {\r

-    MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow & MTRR_LIB_CACHE_VALID_ADDRESS) | CacheWriteBack;\r
+    MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow & ValidMtrrAddressMask) | CacheWriteBack;\r

     MemoryLength = HighMemoryLength;\r
     MemoryLength = GetPowerOfTwo64 (MemoryLength);\r
 \r
     MemoryLength = HighMemoryLength;\r
     MemoryLength = GetPowerOfTwo64 (MemoryLength);\r
 \r


@@ -201,7 +232,7 @@ SetPeiCacheMode (
       MemoryLength = MemOverflow;\r
     }\r
 \r
       MemoryLength = MemOverflow;\r
     }\r
 \r

-    MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) & MTRR_LIB_CACHE_VALID_ADDRESS) | MTRR_LIB_CACHE_MTRR_ENABLED;\r
+    MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;\r

 \r
     MemOverflow += MemoryLength;\r
     HighMemoryLength -= MemoryLength;\r
 \r
     MemOverflow += MemoryLength;\r
     HighMemoryLength -= MemoryLength;\r