ArmPkg/ArmLib: Improved ArmConfigureMmu Performance

Data & Instruction Caches can be kept enabled while the new
translation table is filled.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eugene Cohen <eugene@hp.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15647 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
index d64c188dc50376927e8ef675dd8e75ca2d8dd8b8..1a5d98202279230312650fa003611efc4a6275e5 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
@@ -238,18 +238,6 @@ ArmConfigureMmu (
 \r
   ZeroMem (TranslationTable, TRANSLATION_TABLE_SECTION_SIZE);\r
 \r
-  ArmCleanInvalidateDataCache ();\r
-  ArmInvalidateInstructionCache ();\r
-\r
-  ArmDisableDataCache ();\r
-  ArmDisableInstructionCache();\r
-  // TLBs are also invalidated when calling ArmDisableMmu()\r
-  ArmDisableMmu ();\r
-\r
-  // Make sure nothing sneaked into the cache\r
-  ArmCleanInvalidateDataCache ();\r
-  ArmInvalidateInstructionCache ();\r
-\r
   // By default, mark the translation table as belonging to a uncached region\r
   TranslationTableAttribute = ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED;\r
   while (MemoryTable->Length != 0) {\r
@@ -277,6 +265,18 @@ ArmConfigureMmu (
     return RETURN_UNSUPPORTED;\r
   }\r
 \r
+  ArmCleanInvalidateDataCache ();\r
+  ArmInvalidateInstructionCache ();\r
+\r
+  ArmDisableDataCache ();\r
+  ArmDisableInstructionCache();\r
+  // TLBs are also invalidated when calling ArmDisableMmu()\r
+  ArmDisableMmu ();\r
+\r
+  // Make sure nothing sneaked into the cache\r
+  ArmCleanInvalidateDataCache ();\r
+  ArmInvalidateInstructionCache ();\r
+\r
   ArmSetTTBR0 ((VOID *)(UINTN)(((UINTN)TranslationTable & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) | (TTBRAttributes & 0x7F)));\r
     \r
   ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) |\r