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Commit | Line | Data |
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327d8e4e AJ |
1 | /* |
2 | * OpenPOWER Palmetto BMC | |
3 | * | |
4 | * Andrew Jeffery <andrew@aj.id.au> | |
5 | * | |
6 | * Copyright 2016 IBM Corp. | |
7 | * | |
8 | * This code is licensed under the GPL version 2 or later. See | |
9 | * the COPYING file in the top-level directory. | |
10 | */ | |
11 | ||
12 | #include "qemu/osdep.h" | |
da34e65c | 13 | #include "qapi/error.h" |
4771d756 PB |
14 | #include "qemu-common.h" |
15 | #include "cpu.h" | |
327d8e4e AJ |
16 | #include "exec/address-spaces.h" |
17 | #include "hw/arm/arm.h" | |
00442402 | 18 | #include "hw/arm/aspeed_soc.h" |
327d8e4e | 19 | #include "hw/boards.h" |
3d165f12 | 20 | #include "hw/i2c/smbus.h" |
03dd024f | 21 | #include "qemu/log.h" |
e1ad9bc4 | 22 | #include "sysemu/block-backend.h" |
d769a1da CLG |
23 | #include "hw/loader.h" |
24 | #include "qemu/error-report.h" | |
327d8e4e | 25 | |
74fb1f38 | 26 | static struct arm_boot_info aspeed_board_binfo = { |
b033271f | 27 | .board_id = -1, /* device-tree-only board */ |
327d8e4e AJ |
28 | .nb_cpus = 1, |
29 | }; | |
30 | ||
74fb1f38 | 31 | typedef struct AspeedBoardState { |
ff90606f | 32 | AspeedSoCState soc; |
327d8e4e | 33 | MemoryRegion ram; |
ebe31c0a | 34 | MemoryRegion max_ram; |
74fb1f38 | 35 | } AspeedBoardState; |
327d8e4e | 36 | |
c3ba99f7 CLG |
37 | typedef struct AspeedBoardConfig { |
38 | const char *soc_name; | |
39 | uint32_t hw_strap1; | |
6a0e947b CLG |
40 | const char *fmc_model; |
41 | const char *spi_model; | |
26d5df95 | 42 | uint32_t num_cs; |
2cf6cb50 | 43 | void (*i2c_init)(AspeedBoardState *bmc); |
c3ba99f7 CLG |
44 | } AspeedBoardConfig; |
45 | ||
46 | enum { | |
47 | PALMETTO_BMC, | |
9a7c1750 | 48 | AST2500_EVB, |
ef17f836 | 49 | ROMULUS_BMC, |
62c2c2eb | 50 | WITHERSPOON_BMC, |
c3ba99f7 CLG |
51 | }; |
52 | ||
ef17f836 | 53 | /* Palmetto hardware value: 0x120CE416 */ |
8da33ef7 CLG |
54 | #define PALMETTO_BMC_HW_STRAP1 ( \ |
55 | SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \ | |
56 | SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \ | |
57 | SCU_AST2400_HW_STRAP_ACPI_DIS | \ | |
58 | SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \ | |
59 | SCU_HW_STRAP_VGA_CLASS_CODE | \ | |
60 | SCU_HW_STRAP_LPC_RESET_PIN | \ | |
61 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \ | |
62 | SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ | |
63 | SCU_HW_STRAP_SPI_WIDTH | \ | |
64 | SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ | |
65 | SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) | |
66 | ||
ef17f836 | 67 | /* AST2500 evb hardware value: 0xF100C2E6 */ |
9a7c1750 CLG |
68 | #define AST2500_EVB_HW_STRAP1 (( \ |
69 | AST2500_HW_STRAP1_DEFAULTS | \ | |
70 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
71 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
72 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
73 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
74 | SCU_HW_STRAP_MAC1_RGMII | \ | |
75 | SCU_HW_STRAP_MAC0_RGMII) & \ | |
76 | ~SCU_HW_STRAP_2ND_BOOT_WDT) | |
77 | ||
ef17f836 CLG |
78 | /* Romulus hardware value: 0xF10AD206 */ |
79 | #define ROMULUS_BMC_HW_STRAP1 ( \ | |
80 | AST2500_HW_STRAP1_DEFAULTS | \ | |
81 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
82 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
83 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
84 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
85 | SCU_AST2500_HW_STRAP_ACPI_ENABLE | \ | |
86 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER)) | |
87 | ||
62c2c2eb CLG |
88 | /* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */ |
89 | #define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1 | |
90 | ||
2cf6cb50 CLG |
91 | static void palmetto_bmc_i2c_init(AspeedBoardState *bmc); |
92 | static void ast2500_evb_i2c_init(AspeedBoardState *bmc); | |
6c4567c7 | 93 | static void romulus_bmc_i2c_init(AspeedBoardState *bmc); |
62c2c2eb | 94 | static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc); |
2cf6cb50 | 95 | |
c3ba99f7 | 96 | static const AspeedBoardConfig aspeed_boards[] = { |
6a0e947b | 97 | [PALMETTO_BMC] = { |
bd407a21 | 98 | .soc_name = "ast2400-a1", |
6a0e947b CLG |
99 | .hw_strap1 = PALMETTO_BMC_HW_STRAP1, |
100 | .fmc_model = "n25q256a", | |
101 | .spi_model = "mx25l25635e", | |
26d5df95 | 102 | .num_cs = 1, |
2cf6cb50 | 103 | .i2c_init = palmetto_bmc_i2c_init, |
6a0e947b CLG |
104 | }, |
105 | [AST2500_EVB] = { | |
106 | .soc_name = "ast2500-a1", | |
107 | .hw_strap1 = AST2500_EVB_HW_STRAP1, | |
3d9bada2 | 108 | .fmc_model = "w25q256", |
6a0e947b | 109 | .spi_model = "mx25l25635e", |
26d5df95 | 110 | .num_cs = 1, |
2cf6cb50 | 111 | .i2c_init = ast2500_evb_i2c_init, |
6a0e947b | 112 | }, |
ef17f836 CLG |
113 | [ROMULUS_BMC] = { |
114 | .soc_name = "ast2500-a1", | |
115 | .hw_strap1 = ROMULUS_BMC_HW_STRAP1, | |
116 | .fmc_model = "n25q256a", | |
117 | .spi_model = "mx66l1g45g", | |
26d5df95 | 118 | .num_cs = 2, |
6c4567c7 | 119 | .i2c_init = romulus_bmc_i2c_init, |
ef17f836 | 120 | }, |
62c2c2eb CLG |
121 | [WITHERSPOON_BMC] = { |
122 | .soc_name = "ast2500-a1", | |
123 | .hw_strap1 = WITHERSPOON_BMC_HW_STRAP1, | |
124 | .fmc_model = "mx25l25635e", | |
125 | .spi_model = "mx66l1g45g", | |
126 | .num_cs = 2, | |
127 | .i2c_init = witherspoon_bmc_i2c_init, | |
128 | }, | |
c3ba99f7 CLG |
129 | }; |
130 | ||
ebe31c0a CLG |
131 | /* |
132 | * The max ram region is for firmwares that scan the address space | |
133 | * with load/store to guess how much RAM the SoC has. | |
134 | */ | |
135 | static uint64_t max_ram_read(void *opaque, hwaddr offset, unsigned size) | |
136 | { | |
137 | return 0; | |
138 | } | |
139 | ||
140 | static void max_ram_write(void *opaque, hwaddr offset, uint64_t value, | |
141 | unsigned size) | |
142 | { | |
143 | /* Discard writes */ | |
144 | } | |
145 | ||
146 | static const MemoryRegionOps max_ram_ops = { | |
147 | .read = max_ram_read, | |
148 | .write = max_ram_write, | |
149 | .endianness = DEVICE_NATIVE_ENDIAN, | |
150 | }; | |
151 | ||
d769a1da CLG |
152 | #define FIRMWARE_ADDR 0x0 |
153 | ||
154 | static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size, | |
155 | Error **errp) | |
156 | { | |
157 | BlockBackend *blk = blk_by_legacy_dinfo(dinfo); | |
158 | uint8_t *storage; | |
0c7209be CLG |
159 | int64_t size; |
160 | ||
161 | /* The block backend size should have already been 'validated' by | |
162 | * the creation of the m25p80 object. | |
163 | */ | |
164 | size = blk_getlength(blk); | |
165 | if (size <= 0) { | |
166 | error_setg(errp, "failed to get flash size"); | |
167 | return; | |
168 | } | |
d769a1da | 169 | |
0c7209be CLG |
170 | if (rom_size > size) { |
171 | rom_size = size; | |
d769a1da CLG |
172 | } |
173 | ||
174 | storage = g_new0(uint8_t, rom_size); | |
175 | if (blk_pread(blk, 0, storage, rom_size) < 0) { | |
176 | error_setg(errp, "failed to read the initial flash content"); | |
177 | return; | |
178 | } | |
179 | ||
180 | rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr); | |
181 | g_free(storage); | |
182 | } | |
183 | ||
74fb1f38 | 184 | static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype, |
e1ad9bc4 CLG |
185 | Error **errp) |
186 | { | |
187 | int i ; | |
188 | ||
189 | for (i = 0; i < s->num_cs; ++i) { | |
190 | AspeedSMCFlash *fl = &s->flashes[i]; | |
191 | DriveInfo *dinfo = drive_get_next(IF_MTD); | |
192 | qemu_irq cs_line; | |
193 | ||
e1ad9bc4 CLG |
194 | fl->flash = ssi_create_slave_no_init(s->spi, flashtype); |
195 | if (dinfo) { | |
196 | qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo), | |
197 | errp); | |
198 | } | |
199 | qdev_init_nofail(fl->flash); | |
200 | ||
201 | cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0); | |
202 | sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line); | |
203 | } | |
204 | } | |
205 | ||
c3ba99f7 CLG |
206 | static void aspeed_board_init(MachineState *machine, |
207 | const AspeedBoardConfig *cfg) | |
327d8e4e | 208 | { |
74fb1f38 | 209 | AspeedBoardState *bmc; |
b033271f | 210 | AspeedSoCClass *sc; |
d769a1da | 211 | DriveInfo *drive0 = drive_get(IF_MTD, 0, 0); |
ebe31c0a | 212 | ram_addr_t max_ram_size; |
327d8e4e | 213 | |
74fb1f38 | 214 | bmc = g_new0(AspeedBoardState, 1); |
c3ba99f7 | 215 | object_initialize(&bmc->soc, (sizeof(bmc->soc)), cfg->soc_name); |
327d8e4e AJ |
216 | object_property_add_child(OBJECT(machine), "soc", OBJECT(&bmc->soc), |
217 | &error_abort); | |
218 | ||
b033271f CLG |
219 | sc = ASPEED_SOC_GET_CLASS(&bmc->soc); |
220 | ||
19e9cdf0 MAL |
221 | object_property_set_uint(OBJECT(&bmc->soc), ram_size, "ram-size", |
222 | &error_abort); | |
c3ba99f7 | 223 | object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1", |
87e79af0 | 224 | &error_abort); |
26d5df95 CLG |
225 | object_property_set_int(OBJECT(&bmc->soc), cfg->num_cs, "num-cs", |
226 | &error_abort); | |
b6e70d1d JS |
227 | if (machine->kernel_filename) { |
228 | /* | |
229 | * When booting with a -kernel command line there is no u-boot | |
230 | * that runs to unlock the SCU. In this case set the default to | |
231 | * be unlocked as the kernel expects | |
232 | */ | |
233 | object_property_set_int(OBJECT(&bmc->soc), ASPEED_SCU_PROT_KEY, | |
234 | "hw-prot-key", &error_abort); | |
235 | } | |
327d8e4e AJ |
236 | object_property_set_bool(OBJECT(&bmc->soc), true, "realized", |
237 | &error_abort); | |
238 | ||
de46f5f4 CLG |
239 | /* |
240 | * Allocate RAM after the memory controller has checked the size | |
241 | * was valid. If not, a default value is used. | |
242 | */ | |
19e9cdf0 MAL |
243 | ram_size = object_property_get_uint(OBJECT(&bmc->soc), "ram-size", |
244 | &error_abort); | |
de46f5f4 CLG |
245 | |
246 | memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size); | |
247 | memory_region_add_subregion(get_system_memory(), sc->info->sdram_base, | |
248 | &bmc->ram); | |
249 | object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram), | |
250 | &error_abort); | |
251 | ||
ebe31c0a CLG |
252 | max_ram_size = object_property_get_uint(OBJECT(&bmc->soc), "max-ram-size", |
253 | &error_abort); | |
254 | memory_region_init_io(&bmc->max_ram, NULL, &max_ram_ops, NULL, | |
255 | "max_ram", max_ram_size - ram_size); | |
256 | memory_region_add_subregion(get_system_memory(), | |
257 | sc->info->sdram_base + ram_size, | |
258 | &bmc->max_ram); | |
259 | ||
6a0e947b CLG |
260 | aspeed_board_init_flashes(&bmc->soc.fmc, cfg->fmc_model, &error_abort); |
261 | aspeed_board_init_flashes(&bmc->soc.spi[0], cfg->spi_model, &error_abort); | |
74fb1f38 | 262 | |
d769a1da CLG |
263 | /* Install first FMC flash content as a boot rom. */ |
264 | if (drive0) { | |
265 | AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0]; | |
266 | MemoryRegion *boot_rom = g_new(MemoryRegion, 1); | |
267 | ||
268 | /* | |
269 | * create a ROM region using the default mapping window size of | |
93bf276d CLG |
270 | * the flash module. The window size is 64MB for the AST2400 |
271 | * SoC and 128MB for the AST2500 SoC, which is twice as big as | |
272 | * needed by the flash modules of the Aspeed machines. | |
d769a1da | 273 | */ |
44cf837d | 274 | memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom", |
d769a1da CLG |
275 | fl->size, &error_abort); |
276 | memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR, | |
277 | boot_rom); | |
278 | write_boot_rom(drive0, FIRMWARE_ADDR, fl->size, &error_abort); | |
279 | } | |
280 | ||
74fb1f38 CLG |
281 | aspeed_board_binfo.kernel_filename = machine->kernel_filename; |
282 | aspeed_board_binfo.initrd_filename = machine->initrd_filename; | |
283 | aspeed_board_binfo.kernel_cmdline = machine->kernel_cmdline; | |
284 | aspeed_board_binfo.ram_size = ram_size; | |
285 | aspeed_board_binfo.loader_start = sc->info->sdram_base; | |
e1ad9bc4 | 286 | |
2cf6cb50 CLG |
287 | if (cfg->i2c_init) { |
288 | cfg->i2c_init(bmc); | |
289 | } | |
290 | ||
74fb1f38 CLG |
291 | arm_load_kernel(ARM_CPU(first_cpu), &aspeed_board_binfo); |
292 | } | |
b033271f | 293 | |
2cf6cb50 CLG |
294 | static void palmetto_bmc_i2c_init(AspeedBoardState *bmc) |
295 | { | |
296 | AspeedSoCState *soc = &bmc->soc; | |
a87e81b9 | 297 | DeviceState *dev; |
3d165f12 | 298 | uint8_t *eeprom_buf = g_malloc0(32 * 1024); |
2cf6cb50 CLG |
299 | |
300 | /* The palmetto platform expects a ds3231 RTC but a ds1338 is | |
301 | * enough to provide basic RTC features. Alarms will be missing */ | |
302 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), "ds1338", 0x68); | |
a87e81b9 | 303 | |
3d165f12 CLG |
304 | smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), 0x50, |
305 | eeprom_buf); | |
306 | ||
a87e81b9 CLG |
307 | /* add a TMP423 temperature sensor */ |
308 | dev = i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 2), | |
309 | "tmp423", 0x4c); | |
310 | object_property_set_int(OBJECT(dev), 31000, "temperature0", &error_abort); | |
311 | object_property_set_int(OBJECT(dev), 28000, "temperature1", &error_abort); | |
312 | object_property_set_int(OBJECT(dev), 20000, "temperature2", &error_abort); | |
313 | object_property_set_int(OBJECT(dev), 110000, "temperature3", &error_abort); | |
2cf6cb50 CLG |
314 | } |
315 | ||
74fb1f38 CLG |
316 | static void palmetto_bmc_init(MachineState *machine) |
317 | { | |
c3ba99f7 | 318 | aspeed_board_init(machine, &aspeed_boards[PALMETTO_BMC]); |
327d8e4e AJ |
319 | } |
320 | ||
74fb1f38 | 321 | static void palmetto_bmc_class_init(ObjectClass *oc, void *data) |
327d8e4e | 322 | { |
74fb1f38 CLG |
323 | MachineClass *mc = MACHINE_CLASS(oc); |
324 | ||
325 | mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)"; | |
327d8e4e AJ |
326 | mc->init = palmetto_bmc_init; |
327 | mc->max_cpus = 1; | |
328 | mc->no_sdcard = 1; | |
329 | mc->no_floppy = 1; | |
330 | mc->no_cdrom = 1; | |
327d8e4e AJ |
331 | mc->no_parallel = 1; |
332 | } | |
333 | ||
74fb1f38 CLG |
334 | static const TypeInfo palmetto_bmc_type = { |
335 | .name = MACHINE_TYPE_NAME("palmetto-bmc"), | |
336 | .parent = TYPE_MACHINE, | |
337 | .class_init = palmetto_bmc_class_init, | |
338 | }; | |
339 | ||
2cf6cb50 CLG |
340 | static void ast2500_evb_i2c_init(AspeedBoardState *bmc) |
341 | { | |
342 | AspeedSoCState *soc = &bmc->soc; | |
3d165f12 CLG |
343 | uint8_t *eeprom_buf = g_malloc0(8 * 1024); |
344 | ||
345 | smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), 0x50, | |
346 | eeprom_buf); | |
2cf6cb50 CLG |
347 | |
348 | /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */ | |
349 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "tmp105", 0x4d); | |
6c4567c7 CLG |
350 | |
351 | /* The AST2500 EVB does not have an RTC. Let's pretend that one is | |
352 | * plugged on the I2C bus header */ | |
353 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32); | |
2cf6cb50 CLG |
354 | } |
355 | ||
9a7c1750 CLG |
356 | static void ast2500_evb_init(MachineState *machine) |
357 | { | |
358 | aspeed_board_init(machine, &aspeed_boards[AST2500_EVB]); | |
359 | } | |
360 | ||
361 | static void ast2500_evb_class_init(ObjectClass *oc, void *data) | |
362 | { | |
363 | MachineClass *mc = MACHINE_CLASS(oc); | |
364 | ||
365 | mc->desc = "Aspeed AST2500 EVB (ARM1176)"; | |
366 | mc->init = ast2500_evb_init; | |
367 | mc->max_cpus = 1; | |
368 | mc->no_sdcard = 1; | |
369 | mc->no_floppy = 1; | |
370 | mc->no_cdrom = 1; | |
371 | mc->no_parallel = 1; | |
372 | } | |
373 | ||
374 | static const TypeInfo ast2500_evb_type = { | |
375 | .name = MACHINE_TYPE_NAME("ast2500-evb"), | |
376 | .parent = TYPE_MACHINE, | |
377 | .class_init = ast2500_evb_class_init, | |
378 | }; | |
379 | ||
6c4567c7 CLG |
380 | static void romulus_bmc_i2c_init(AspeedBoardState *bmc) |
381 | { | |
382 | AspeedSoCState *soc = &bmc->soc; | |
383 | ||
384 | /* The romulus board expects Epson RX8900 I2C RTC but a ds1338 is | |
385 | * good enough */ | |
386 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32); | |
387 | } | |
388 | ||
ef17f836 CLG |
389 | static void romulus_bmc_init(MachineState *machine) |
390 | { | |
391 | aspeed_board_init(machine, &aspeed_boards[ROMULUS_BMC]); | |
392 | } | |
393 | ||
394 | static void romulus_bmc_class_init(ObjectClass *oc, void *data) | |
395 | { | |
396 | MachineClass *mc = MACHINE_CLASS(oc); | |
397 | ||
398 | mc->desc = "OpenPOWER Romulus BMC (ARM1176)"; | |
399 | mc->init = romulus_bmc_init; | |
400 | mc->max_cpus = 1; | |
401 | mc->no_sdcard = 1; | |
402 | mc->no_floppy = 1; | |
403 | mc->no_cdrom = 1; | |
404 | mc->no_parallel = 1; | |
405 | } | |
406 | ||
407 | static const TypeInfo romulus_bmc_type = { | |
408 | .name = MACHINE_TYPE_NAME("romulus-bmc"), | |
409 | .parent = TYPE_MACHINE, | |
410 | .class_init = romulus_bmc_class_init, | |
411 | }; | |
412 | ||
62c2c2eb CLG |
413 | static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc) |
414 | { | |
415 | AspeedSoCState *soc = &bmc->soc; | |
3d165f12 | 416 | uint8_t *eeprom_buf = g_malloc0(8 * 1024); |
62c2c2eb | 417 | |
8c9a61d7 CLG |
418 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), "pca9552", 0x60); |
419 | ||
62c2c2eb CLG |
420 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), "tmp423", 0x4c); |
421 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 5), "tmp423", 0x4c); | |
422 | ||
423 | /* The Witherspoon expects a TMP275 but a TMP105 is compatible */ | |
424 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "tmp105", 0x4a); | |
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425 | |
426 | /* The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is | |
427 | * good enough */ | |
428 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32); | |
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429 | |
430 | smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), 0x51, | |
431 | eeprom_buf); | |
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432 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "pca9552", |
433 | 0x60); | |
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434 | } |
435 | ||
436 | static void witherspoon_bmc_init(MachineState *machine) | |
437 | { | |
438 | aspeed_board_init(machine, &aspeed_boards[WITHERSPOON_BMC]); | |
439 | } | |
440 | ||
441 | static void witherspoon_bmc_class_init(ObjectClass *oc, void *data) | |
442 | { | |
443 | MachineClass *mc = MACHINE_CLASS(oc); | |
444 | ||
445 | mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)"; | |
446 | mc->init = witherspoon_bmc_init; | |
447 | mc->max_cpus = 1; | |
448 | mc->no_sdcard = 1; | |
449 | mc->no_floppy = 1; | |
450 | mc->no_cdrom = 1; | |
451 | mc->no_parallel = 1; | |
452 | } | |
453 | ||
454 | static const TypeInfo witherspoon_bmc_type = { | |
455 | .name = MACHINE_TYPE_NAME("witherspoon-bmc"), | |
456 | .parent = TYPE_MACHINE, | |
457 | .class_init = witherspoon_bmc_class_init, | |
458 | }; | |
459 | ||
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460 | static void aspeed_machine_init(void) |
461 | { | |
462 | type_register_static(&palmetto_bmc_type); | |
9a7c1750 | 463 | type_register_static(&ast2500_evb_type); |
ef17f836 | 464 | type_register_static(&romulus_bmc_type); |
62c2c2eb | 465 | type_register_static(&witherspoon_bmc_type); |
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466 | } |
467 | ||
468 | type_init(aspeed_machine_init) |