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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
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12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
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14 */
15
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16#include "exec/memory.h"
17#include "exec/address-spaces.h"
18#include "exec/ioport.h"
409ddd01 19#include "qapi/visitor.h"
1de7afc9 20#include "qemu/bitops.h"
2c9b15ca 21#include "qom/object.h"
55d5d048 22#include "trace.h"
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23#include <assert.h>
24
022c62cb 25#include "exec/memory-internal.h"
220c3ebd 26#include "exec/ram_addr.h"
e1c57ab8 27#include "sysemu/sysemu.h"
67d95c15 28
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29//#define DEBUG_UNASSIGNED
30
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31static unsigned memory_region_transaction_depth;
32static bool memory_region_update_pending;
4dc56152 33static bool ioeventfd_update_pending;
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34static bool global_dirty_log = false;
35
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36static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
37 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 38
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39static QTAILQ_HEAD(, AddressSpace) address_spaces
40 = QTAILQ_HEAD_INITIALIZER(address_spaces);
41
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42typedef struct AddrRange AddrRange;
43
8417cebf 44/*
c9cdaa3a 45 * Note that signed integers are needed for negative offsetting in aliases
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46 * (large MemoryRegion::alias_offset).
47 */
093bc2cd 48struct AddrRange {
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49 Int128 start;
50 Int128 size;
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51};
52
08dafab4 53static AddrRange addrrange_make(Int128 start, Int128 size)
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54{
55 return (AddrRange) { start, size };
56}
57
58static bool addrrange_equal(AddrRange r1, AddrRange r2)
59{
08dafab4 60 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
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61}
62
08dafab4 63static Int128 addrrange_end(AddrRange r)
093bc2cd 64{
08dafab4 65 return int128_add(r.start, r.size);
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66}
67
08dafab4 68static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 69{
08dafab4 70 int128_addto(&range.start, delta);
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71 return range;
72}
73
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74static bool addrrange_contains(AddrRange range, Int128 addr)
75{
76 return int128_ge(addr, range.start)
77 && int128_lt(addr, addrrange_end(range));
78}
79
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80static bool addrrange_intersects(AddrRange r1, AddrRange r2)
81{
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82 return addrrange_contains(r1, r2.start)
83 || addrrange_contains(r2, r1.start);
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84}
85
86static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
87{
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88 Int128 start = int128_max(r1.start, r2.start);
89 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
90 return addrrange_make(start, int128_sub(end, start));
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91}
92
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93enum ListenerDirection { Forward, Reverse };
94
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95static bool memory_listener_match(MemoryListener *listener,
96 MemoryRegionSection *section)
97{
98 return !listener->address_space_filter
99 || listener->address_space_filter == section->address_space;
100}
101
102#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
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103 do { \
104 MemoryListener *_listener; \
105 \
106 switch (_direction) { \
107 case Forward: \
108 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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109 if (_listener->_callback) { \
110 _listener->_callback(_listener, ##_args); \
111 } \
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112 } \
113 break; \
114 case Reverse: \
115 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
116 memory_listeners, link) { \
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117 if (_listener->_callback) { \
118 _listener->_callback(_listener, ##_args); \
119 } \
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120 } \
121 break; \
122 default: \
123 abort(); \
124 } \
125 } while (0)
126
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127#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
128 do { \
129 MemoryListener *_listener; \
130 \
131 switch (_direction) { \
132 case Forward: \
133 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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134 if (_listener->_callback \
135 && memory_listener_match(_listener, _section)) { \
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136 _listener->_callback(_listener, _section, ##_args); \
137 } \
138 } \
139 break; \
140 case Reverse: \
141 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
142 memory_listeners, link) { \
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143 if (_listener->_callback \
144 && memory_listener_match(_listener, _section)) { \
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145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 default: \
150 abort(); \
151 } \
152 } while (0)
153
dfde4e6e 154/* No need to ref/unref .mr, the FlatRange keeps it alive. */
0e0d36b4 155#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
7376e582 156 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
0e0d36b4 157 .mr = (fr)->mr, \
f6790af6 158 .address_space = (as), \
0e0d36b4 159 .offset_within_region = (fr)->offset_in_region, \
052e87b0 160 .size = (fr)->addr.size, \
0e0d36b4 161 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 162 .readonly = (fr)->readonly, \
7376e582 163 }))
0e0d36b4 164
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165struct CoalescedMemoryRange {
166 AddrRange addr;
167 QTAILQ_ENTRY(CoalescedMemoryRange) link;
168};
169
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170struct MemoryRegionIoeventfd {
171 AddrRange addr;
172 bool match_data;
173 uint64_t data;
753d5e14 174 EventNotifier *e;
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175};
176
177static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
178 MemoryRegionIoeventfd b)
179{
08dafab4 180 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 181 return true;
08dafab4 182 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 183 return false;
08dafab4 184 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 185 return true;
08dafab4 186 } else if (int128_gt(a.addr.size, b.addr.size)) {
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187 return false;
188 } else if (a.match_data < b.match_data) {
189 return true;
190 } else if (a.match_data > b.match_data) {
191 return false;
192 } else if (a.match_data) {
193 if (a.data < b.data) {
194 return true;
195 } else if (a.data > b.data) {
196 return false;
197 }
198 }
753d5e14 199 if (a.e < b.e) {
3e9d69e7 200 return true;
753d5e14 201 } else if (a.e > b.e) {
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202 return false;
203 }
204 return false;
205}
206
207static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
208 MemoryRegionIoeventfd b)
209{
210 return !memory_region_ioeventfd_before(a, b)
211 && !memory_region_ioeventfd_before(b, a);
212}
213
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214typedef struct FlatRange FlatRange;
215typedef struct FlatView FlatView;
216
217/* Range of memory in the global map. Addresses are absolute. */
218struct FlatRange {
219 MemoryRegion *mr;
a8170e5e 220 hwaddr offset_in_region;
093bc2cd 221 AddrRange addr;
5a583347 222 uint8_t dirty_log_mask;
5f9a5ea1 223 bool romd_mode;
fb1cd6f9 224 bool readonly;
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225};
226
227/* Flattened global view of current active memory hierarchy. Kept in sorted
228 * order.
229 */
230struct FlatView {
374f2981 231 struct rcu_head rcu;
856d7245 232 unsigned ref;
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233 FlatRange *ranges;
234 unsigned nr;
235 unsigned nr_allocated;
236};
237
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238typedef struct AddressSpaceOps AddressSpaceOps;
239
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240#define FOR_EACH_FLAT_RANGE(var, view) \
241 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
242
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243static bool flatrange_equal(FlatRange *a, FlatRange *b)
244{
245 return a->mr == b->mr
246 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 247 && a->offset_in_region == b->offset_in_region
5f9a5ea1 248 && a->romd_mode == b->romd_mode
fb1cd6f9 249 && a->readonly == b->readonly;
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250}
251
252static void flatview_init(FlatView *view)
253{
856d7245 254 view->ref = 1;
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255 view->ranges = NULL;
256 view->nr = 0;
257 view->nr_allocated = 0;
258}
259
260/* Insert a range into a given position. Caller is responsible for maintaining
261 * sorting order.
262 */
263static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
264{
265 if (view->nr == view->nr_allocated) {
266 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 267 view->ranges = g_realloc(view->ranges,
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268 view->nr_allocated * sizeof(*view->ranges));
269 }
270 memmove(view->ranges + pos + 1, view->ranges + pos,
271 (view->nr - pos) * sizeof(FlatRange));
272 view->ranges[pos] = *range;
dfde4e6e 273 memory_region_ref(range->mr);
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274 ++view->nr;
275}
276
277static void flatview_destroy(FlatView *view)
278{
dfde4e6e
PB
279 int i;
280
281 for (i = 0; i < view->nr; i++) {
282 memory_region_unref(view->ranges[i].mr);
283 }
7267c094 284 g_free(view->ranges);
a9a0c06d 285 g_free(view);
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286}
287
856d7245
PB
288static void flatview_ref(FlatView *view)
289{
290 atomic_inc(&view->ref);
291}
292
293static void flatview_unref(FlatView *view)
294{
295 if (atomic_fetch_dec(&view->ref) == 1) {
296 flatview_destroy(view);
297 }
298}
299
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300static bool can_merge(FlatRange *r1, FlatRange *r2)
301{
08dafab4 302 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 303 && r1->mr == r2->mr
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304 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
305 r1->addr.size),
306 int128_make64(r2->offset_in_region))
d0a9b5bc 307 && r1->dirty_log_mask == r2->dirty_log_mask
5f9a5ea1 308 && r1->romd_mode == r2->romd_mode
fb1cd6f9 309 && r1->readonly == r2->readonly;
3d8e6bf9
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310}
311
8508e024 312/* Attempt to simplify a view by merging adjacent ranges */
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313static void flatview_simplify(FlatView *view)
314{
315 unsigned i, j;
316
317 i = 0;
318 while (i < view->nr) {
319 j = i + 1;
320 while (j < view->nr
321 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 322 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
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323 ++j;
324 }
325 ++i;
326 memmove(&view->ranges[i], &view->ranges[j],
327 (view->nr - j) * sizeof(view->ranges[j]));
328 view->nr -= j - i;
329 }
330}
331
e7342aa3
PB
332static bool memory_region_big_endian(MemoryRegion *mr)
333{
334#ifdef TARGET_WORDS_BIGENDIAN
335 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
336#else
337 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
338#endif
339}
340
e11ef3d1
PB
341static bool memory_region_wrong_endianness(MemoryRegion *mr)
342{
343#ifdef TARGET_WORDS_BIGENDIAN
344 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
345#else
346 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
347#endif
348}
349
350static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
351{
352 if (memory_region_wrong_endianness(mr)) {
353 switch (size) {
354 case 1:
355 break;
356 case 2:
357 *data = bswap16(*data);
358 break;
359 case 4:
360 *data = bswap32(*data);
361 break;
362 case 8:
363 *data = bswap64(*data);
364 break;
365 default:
366 abort();
367 }
368 }
369}
370
547e9201 371static void memory_region_oldmmio_read_accessor(MemoryRegion *mr,
ce5d2f33
PB
372 hwaddr addr,
373 uint64_t *value,
374 unsigned size,
375 unsigned shift,
376 uint64_t mask)
377{
ce5d2f33
PB
378 uint64_t tmp;
379
380 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
55d5d048 381 trace_memory_region_ops_read(mr, addr, tmp, size);
ce5d2f33
PB
382 *value |= (tmp & mask) << shift;
383}
384
547e9201 385static void memory_region_read_accessor(MemoryRegion *mr,
a8170e5e 386 hwaddr addr,
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AK
387 uint64_t *value,
388 unsigned size,
389 unsigned shift,
390 uint64_t mask)
391{
164a4dcd
AK
392 uint64_t tmp;
393
d410515e
JK
394 if (mr->flush_coalesced_mmio) {
395 qemu_flush_coalesced_mmio_buffer();
396 }
164a4dcd 397 tmp = mr->ops->read(mr->opaque, addr, size);
55d5d048 398 trace_memory_region_ops_read(mr, addr, tmp, size);
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399 *value |= (tmp & mask) << shift;
400}
401
547e9201 402static void memory_region_oldmmio_write_accessor(MemoryRegion *mr,
ce5d2f33
PB
403 hwaddr addr,
404 uint64_t *value,
405 unsigned size,
406 unsigned shift,
407 uint64_t mask)
408{
ce5d2f33
PB
409 uint64_t tmp;
410
411 tmp = (*value >> shift) & mask;
55d5d048 412 trace_memory_region_ops_write(mr, addr, tmp, size);
ce5d2f33
PB
413 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
414}
415
547e9201 416static void memory_region_write_accessor(MemoryRegion *mr,
a8170e5e 417 hwaddr addr,
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418 uint64_t *value,
419 unsigned size,
420 unsigned shift,
421 uint64_t mask)
422{
164a4dcd
AK
423 uint64_t tmp;
424
d410515e
JK
425 if (mr->flush_coalesced_mmio) {
426 qemu_flush_coalesced_mmio_buffer();
427 }
164a4dcd 428 tmp = (*value >> shift) & mask;
55d5d048 429 trace_memory_region_ops_write(mr, addr, tmp, size);
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AK
430 mr->ops->write(mr->opaque, addr, tmp, size);
431}
432
a8170e5e 433static void access_with_adjusted_size(hwaddr addr,
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434 uint64_t *value,
435 unsigned size,
436 unsigned access_size_min,
437 unsigned access_size_max,
547e9201 438 void (*access)(MemoryRegion *mr,
a8170e5e 439 hwaddr addr,
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AK
440 uint64_t *value,
441 unsigned size,
442 unsigned shift,
443 uint64_t mask),
547e9201 444 MemoryRegion *mr)
164a4dcd
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445{
446 uint64_t access_mask;
447 unsigned access_size;
448 unsigned i;
449
450 if (!access_size_min) {
451 access_size_min = 1;
452 }
453 if (!access_size_max) {
454 access_size_max = 4;
455 }
ce5d2f33
PB
456
457 /* FIXME: support unaligned access? */
164a4dcd
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458 access_size = MAX(MIN(size, access_size_max), access_size_min);
459 access_mask = -1ULL >> (64 - access_size * 8);
e7342aa3
PB
460 if (memory_region_big_endian(mr)) {
461 for (i = 0; i < size; i += access_size) {
462 access(mr, addr + i, value, access_size,
463 (size - access_size - i) * 8, access_mask);
464 }
465 } else {
466 for (i = 0; i < size; i += access_size) {
467 access(mr, addr + i, value, access_size, i * 8, access_mask);
468 }
164a4dcd
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469 }
470}
471
e2177955
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472static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
473{
0d673e36
AK
474 AddressSpace *as;
475
feca4ac1
PB
476 while (mr->container) {
477 mr = mr->container;
e2177955 478 }
0d673e36
AK
479 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
480 if (mr == as->root) {
481 return as;
482 }
e2177955 483 }
eed2bacf 484 return NULL;
e2177955
AK
485}
486
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487/* Render a memory region into the global view. Ranges in @view obscure
488 * ranges in @mr.
489 */
490static void render_memory_region(FlatView *view,
491 MemoryRegion *mr,
08dafab4 492 Int128 base,
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493 AddrRange clip,
494 bool readonly)
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495{
496 MemoryRegion *subregion;
497 unsigned i;
a8170e5e 498 hwaddr offset_in_region;
08dafab4
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499 Int128 remain;
500 Int128 now;
093bc2cd
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501 FlatRange fr;
502 AddrRange tmp;
503
6bba19ba
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504 if (!mr->enabled) {
505 return;
506 }
507
08dafab4 508 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 509 readonly |= mr->readonly;
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510
511 tmp = addrrange_make(base, mr->size);
512
513 if (!addrrange_intersects(tmp, clip)) {
514 return;
515 }
516
517 clip = addrrange_intersection(tmp, clip);
518
519 if (mr->alias) {
08dafab4
AK
520 int128_subfrom(&base, int128_make64(mr->alias->addr));
521 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 522 render_memory_region(view, mr->alias, base, clip, readonly);
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523 return;
524 }
525
526 /* Render subregions in priority order. */
527 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 528 render_memory_region(view, subregion, base, clip, readonly);
093bc2cd
AK
529 }
530
14a3c10a 531 if (!mr->terminates) {
093bc2cd
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532 return;
533 }
534
08dafab4 535 offset_in_region = int128_get64(int128_sub(clip.start, base));
093bc2cd
AK
536 base = clip.start;
537 remain = clip.size;
538
2eb74e1a
PC
539 fr.mr = mr;
540 fr.dirty_log_mask = mr->dirty_log_mask;
541 fr.romd_mode = mr->romd_mode;
542 fr.readonly = readonly;
543
093bc2cd 544 /* Render the region itself into any gaps left by the current view. */
08dafab4
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545 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
546 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
093bc2cd
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547 continue;
548 }
08dafab4
AK
549 if (int128_lt(base, view->ranges[i].addr.start)) {
550 now = int128_min(remain,
551 int128_sub(view->ranges[i].addr.start, base));
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552 fr.offset_in_region = offset_in_region;
553 fr.addr = addrrange_make(base, now);
554 flatview_insert(view, i, &fr);
555 ++i;
08dafab4
AK
556 int128_addto(&base, now);
557 offset_in_region += int128_get64(now);
558 int128_subfrom(&remain, now);
093bc2cd 559 }
d26a8cae
AK
560 now = int128_sub(int128_min(int128_add(base, remain),
561 addrrange_end(view->ranges[i].addr)),
562 base);
563 int128_addto(&base, now);
564 offset_in_region += int128_get64(now);
565 int128_subfrom(&remain, now);
093bc2cd 566 }
08dafab4 567 if (int128_nz(remain)) {
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568 fr.offset_in_region = offset_in_region;
569 fr.addr = addrrange_make(base, remain);
570 flatview_insert(view, i, &fr);
571 }
572}
573
574/* Render a memory topology into a list of disjoint absolute ranges. */
a9a0c06d 575static FlatView *generate_memory_topology(MemoryRegion *mr)
093bc2cd 576{
a9a0c06d 577 FlatView *view;
093bc2cd 578
a9a0c06d
PB
579 view = g_new(FlatView, 1);
580 flatview_init(view);
093bc2cd 581
83f3c251 582 if (mr) {
a9a0c06d 583 render_memory_region(view, mr, int128_zero(),
83f3c251
AK
584 addrrange_make(int128_zero(), int128_2_64()), false);
585 }
a9a0c06d 586 flatview_simplify(view);
093bc2cd
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587
588 return view;
589}
590
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591static void address_space_add_del_ioeventfds(AddressSpace *as,
592 MemoryRegionIoeventfd *fds_new,
593 unsigned fds_new_nb,
594 MemoryRegionIoeventfd *fds_old,
595 unsigned fds_old_nb)
596{
597 unsigned iold, inew;
80a1ea37
AK
598 MemoryRegionIoeventfd *fd;
599 MemoryRegionSection section;
3e9d69e7
AK
600
601 /* Generate a symmetric difference of the old and new fd sets, adding
602 * and deleting as necessary.
603 */
604
605 iold = inew = 0;
606 while (iold < fds_old_nb || inew < fds_new_nb) {
607 if (iold < fds_old_nb
608 && (inew == fds_new_nb
609 || memory_region_ioeventfd_before(fds_old[iold],
610 fds_new[inew]))) {
80a1ea37
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611 fd = &fds_old[iold];
612 section = (MemoryRegionSection) {
f6790af6 613 .address_space = as,
80a1ea37 614 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 615 .size = fd->addr.size,
80a1ea37
AK
616 };
617 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 618 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
619 ++iold;
620 } else if (inew < fds_new_nb
621 && (iold == fds_old_nb
622 || memory_region_ioeventfd_before(fds_new[inew],
623 fds_old[iold]))) {
80a1ea37
AK
624 fd = &fds_new[inew];
625 section = (MemoryRegionSection) {
f6790af6 626 .address_space = as,
80a1ea37 627 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 628 .size = fd->addr.size,
80a1ea37
AK
629 };
630 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 631 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
632 ++inew;
633 } else {
634 ++iold;
635 ++inew;
636 }
637 }
638}
639
856d7245
PB
640static FlatView *address_space_get_flatview(AddressSpace *as)
641{
642 FlatView *view;
643
374f2981
PB
644 rcu_read_lock();
645 view = atomic_rcu_read(&as->current_map);
856d7245 646 flatview_ref(view);
374f2981 647 rcu_read_unlock();
856d7245
PB
648 return view;
649}
650
3e9d69e7
AK
651static void address_space_update_ioeventfds(AddressSpace *as)
652{
99e86347 653 FlatView *view;
3e9d69e7
AK
654 FlatRange *fr;
655 unsigned ioeventfd_nb = 0;
656 MemoryRegionIoeventfd *ioeventfds = NULL;
657 AddrRange tmp;
658 unsigned i;
659
856d7245 660 view = address_space_get_flatview(as);
99e86347 661 FOR_EACH_FLAT_RANGE(fr, view) {
3e9d69e7
AK
662 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
663 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK
664 int128_sub(fr->addr.start,
665 int128_make64(fr->offset_in_region)));
3e9d69e7
AK
666 if (addrrange_intersects(fr->addr, tmp)) {
667 ++ioeventfd_nb;
7267c094 668 ioeventfds = g_realloc(ioeventfds,
3e9d69e7
AK
669 ioeventfd_nb * sizeof(*ioeventfds));
670 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
671 ioeventfds[ioeventfd_nb-1].addr = tmp;
672 }
673 }
674 }
675
676 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
677 as->ioeventfds, as->ioeventfd_nb);
678
7267c094 679 g_free(as->ioeventfds);
3e9d69e7
AK
680 as->ioeventfds = ioeventfds;
681 as->ioeventfd_nb = ioeventfd_nb;
856d7245 682 flatview_unref(view);
3e9d69e7
AK
683}
684
b8af1afb 685static void address_space_update_topology_pass(AddressSpace *as,
a9a0c06d
PB
686 const FlatView *old_view,
687 const FlatView *new_view,
b8af1afb 688 bool adding)
093bc2cd 689{
093bc2cd
AK
690 unsigned iold, inew;
691 FlatRange *frold, *frnew;
093bc2cd
AK
692
693 /* Generate a symmetric difference of the old and new memory maps.
694 * Kill ranges in the old map, and instantiate ranges in the new map.
695 */
696 iold = inew = 0;
a9a0c06d
PB
697 while (iold < old_view->nr || inew < new_view->nr) {
698 if (iold < old_view->nr) {
699 frold = &old_view->ranges[iold];
093bc2cd
AK
700 } else {
701 frold = NULL;
702 }
a9a0c06d
PB
703 if (inew < new_view->nr) {
704 frnew = &new_view->ranges[inew];
093bc2cd
AK
705 } else {
706 frnew = NULL;
707 }
708
709 if (frold
710 && (!frnew
08dafab4
AK
711 || int128_lt(frold->addr.start, frnew->addr.start)
712 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 713 && !flatrange_equal(frold, frnew)))) {
41a6e477 714 /* In old but not in new, or in both but attributes changed. */
093bc2cd 715
b8af1afb 716 if (!adding) {
72e22d2f 717 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
718 }
719
093bc2cd
AK
720 ++iold;
721 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 722 /* In both and unchanged (except logging may have changed) */
093bc2cd 723
b8af1afb 724 if (adding) {
50c1e149 725 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b8af1afb 726 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
72e22d2f 727 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
b8af1afb 728 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
72e22d2f 729 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
b8af1afb 730 }
5a583347
AK
731 }
732
093bc2cd
AK
733 ++iold;
734 ++inew;
093bc2cd
AK
735 } else {
736 /* In new */
737
b8af1afb 738 if (adding) {
72e22d2f 739 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK
740 }
741
093bc2cd
AK
742 ++inew;
743 }
744 }
b8af1afb
AK
745}
746
747
748static void address_space_update_topology(AddressSpace *as)
749{
856d7245 750 FlatView *old_view = address_space_get_flatview(as);
a9a0c06d 751 FlatView *new_view = generate_memory_topology(as->root);
b8af1afb
AK
752
753 address_space_update_topology_pass(as, old_view, new_view, false);
754 address_space_update_topology_pass(as, old_view, new_view, true);
755
374f2981
PB
756 /* Writes are protected by the BQL. */
757 atomic_rcu_set(&as->current_map, new_view);
758 call_rcu(old_view, flatview_unref, rcu);
856d7245
PB
759
760 /* Note that all the old MemoryRegions are still alive up to this
761 * point. This relieves most MemoryListeners from the need to
762 * ref/unref the MemoryRegions they get---unless they use them
763 * outside the iothread mutex, in which case precise reference
764 * counting is necessary.
765 */
766 flatview_unref(old_view);
767
3e9d69e7 768 address_space_update_ioeventfds(as);
093bc2cd
AK
769}
770
4ef4db86
AK
771void memory_region_transaction_begin(void)
772{
bb880ded 773 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
774 ++memory_region_transaction_depth;
775}
776
4dc56152
GA
777static void memory_region_clear_pending(void)
778{
779 memory_region_update_pending = false;
780 ioeventfd_update_pending = false;
781}
782
4ef4db86
AK
783void memory_region_transaction_commit(void)
784{
0d673e36
AK
785 AddressSpace *as;
786
4ef4db86
AK
787 assert(memory_region_transaction_depth);
788 --memory_region_transaction_depth;
4dc56152
GA
789 if (!memory_region_transaction_depth) {
790 if (memory_region_update_pending) {
791 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
02e2b95f 792
4dc56152
GA
793 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
794 address_space_update_topology(as);
795 }
02e2b95f 796
4dc56152
GA
797 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
798 } else if (ioeventfd_update_pending) {
799 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
800 address_space_update_ioeventfds(as);
801 }
802 }
803 memory_region_clear_pending();
804 }
4ef4db86
AK
805}
806
545e92e0
AK
807static void memory_region_destructor_none(MemoryRegion *mr)
808{
809}
810
811static void memory_region_destructor_ram(MemoryRegion *mr)
812{
813 qemu_ram_free(mr->ram_addr);
814}
815
dfde4e6e
PB
816static void memory_region_destructor_alias(MemoryRegion *mr)
817{
818 memory_region_unref(mr->alias);
819}
820
545e92e0
AK
821static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
822{
823 qemu_ram_free_from_ptr(mr->ram_addr);
824}
825
d0a9b5bc
AK
826static void memory_region_destructor_rom_device(MemoryRegion *mr)
827{
828 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
d0a9b5bc
AK
829}
830
b4fefef9
PC
831static bool memory_region_need_escape(char c)
832{
833 return c == '/' || c == '[' || c == '\\' || c == ']';
834}
835
836static char *memory_region_escape_name(const char *name)
837{
838 const char *p;
839 char *escaped, *q;
840 uint8_t c;
841 size_t bytes = 0;
842
843 for (p = name; *p; p++) {
844 bytes += memory_region_need_escape(*p) ? 4 : 1;
845 }
846 if (bytes == p - name) {
847 return g_memdup(name, bytes + 1);
848 }
849
850 escaped = g_malloc(bytes + 1);
851 for (p = name, q = escaped; *p; p++) {
852 c = *p;
853 if (unlikely(memory_region_need_escape(c))) {
854 *q++ = '\\';
855 *q++ = 'x';
856 *q++ = "0123456789abcdef"[c >> 4];
857 c = "0123456789abcdef"[c & 15];
858 }
859 *q++ = c;
860 }
861 *q = 0;
862 return escaped;
863}
864
093bc2cd 865void memory_region_init(MemoryRegion *mr,
2c9b15ca 866 Object *owner,
093bc2cd
AK
867 const char *name,
868 uint64_t size)
869{
22a893e4
PB
870 if (!owner) {
871 owner = qdev_get_machine();
872 }
b4fefef9 873
22a893e4 874 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
08dafab4
AK
875 mr->size = int128_make64(size);
876 if (size == UINT64_MAX) {
877 mr->size = int128_2_64();
878 }
302fa283 879 mr->name = g_strdup(name);
b4fefef9
PC
880
881 if (name) {
843ef73a
PC
882 char *escaped_name = memory_region_escape_name(name);
883 char *name_array = g_strdup_printf("%s[*]", escaped_name);
884 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
b4fefef9 885 object_unref(OBJECT(mr));
843ef73a
PC
886 g_free(name_array);
887 g_free(escaped_name);
b4fefef9
PC
888 }
889}
890
409ddd01
PC
891static void memory_region_get_addr(Object *obj, Visitor *v, void *opaque,
892 const char *name, Error **errp)
893{
894 MemoryRegion *mr = MEMORY_REGION(obj);
895 uint64_t value = mr->addr;
896
897 visit_type_uint64(v, &value, name, errp);
898}
899
900static void memory_region_get_container(Object *obj, Visitor *v, void *opaque,
901 const char *name, Error **errp)
902{
903 MemoryRegion *mr = MEMORY_REGION(obj);
904 gchar *path = (gchar *)"";
905
906 if (mr->container) {
907 path = object_get_canonical_path(OBJECT(mr->container));
908 }
909 visit_type_str(v, &path, name, errp);
910 if (mr->container) {
911 g_free(path);
912 }
913}
914
915static Object *memory_region_resolve_container(Object *obj, void *opaque,
916 const char *part)
917{
918 MemoryRegion *mr = MEMORY_REGION(obj);
919
920 return OBJECT(mr->container);
921}
922
d33382da
PC
923static void memory_region_get_priority(Object *obj, Visitor *v, void *opaque,
924 const char *name, Error **errp)
925{
926 MemoryRegion *mr = MEMORY_REGION(obj);
927 int32_t value = mr->priority;
928
929 visit_type_int32(v, &value, name, errp);
930}
931
932static bool memory_region_get_may_overlap(Object *obj, Error **errp)
933{
934 MemoryRegion *mr = MEMORY_REGION(obj);
935
936 return mr->may_overlap;
937}
938
52aef7bb
PC
939static void memory_region_get_size(Object *obj, Visitor *v, void *opaque,
940 const char *name, Error **errp)
941{
942 MemoryRegion *mr = MEMORY_REGION(obj);
943 uint64_t value = memory_region_size(mr);
944
945 visit_type_uint64(v, &value, name, errp);
946}
947
b4fefef9
PC
948static void memory_region_initfn(Object *obj)
949{
950 MemoryRegion *mr = MEMORY_REGION(obj);
409ddd01 951 ObjectProperty *op;
b4fefef9
PC
952
953 mr->ops = &unassigned_mem_ops;
6bba19ba 954 mr->enabled = true;
5f9a5ea1 955 mr->romd_mode = true;
545e92e0 956 mr->destructor = memory_region_destructor_none;
093bc2cd 957 QTAILQ_INIT(&mr->subregions);
093bc2cd 958 QTAILQ_INIT(&mr->coalesced);
409ddd01
PC
959
960 op = object_property_add(OBJECT(mr), "container",
961 "link<" TYPE_MEMORY_REGION ">",
962 memory_region_get_container,
963 NULL, /* memory_region_set_container */
964 NULL, NULL, &error_abort);
965 op->resolve = memory_region_resolve_container;
966
967 object_property_add(OBJECT(mr), "addr", "uint64",
968 memory_region_get_addr,
969 NULL, /* memory_region_set_addr */
970 NULL, NULL, &error_abort);
d33382da
PC
971 object_property_add(OBJECT(mr), "priority", "uint32",
972 memory_region_get_priority,
973 NULL, /* memory_region_set_priority */
974 NULL, NULL, &error_abort);
975 object_property_add_bool(OBJECT(mr), "may-overlap",
976 memory_region_get_may_overlap,
977 NULL, /* memory_region_set_may_overlap */
978 &error_abort);
52aef7bb
PC
979 object_property_add(OBJECT(mr), "size", "uint64",
980 memory_region_get_size,
981 NULL, /* memory_region_set_size, */
982 NULL, NULL, &error_abort);
093bc2cd
AK
983}
984
b018ddf6
PB
985static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
986 unsigned size)
987{
988#ifdef DEBUG_UNASSIGNED
989 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
990#endif
4917cf44
AF
991 if (current_cpu != NULL) {
992 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
c658b94f 993 }
68a7439a 994 return 0;
b018ddf6
PB
995}
996
997static void unassigned_mem_write(void *opaque, hwaddr addr,
998 uint64_t val, unsigned size)
999{
1000#ifdef DEBUG_UNASSIGNED
1001 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1002#endif
4917cf44
AF
1003 if (current_cpu != NULL) {
1004 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
c658b94f 1005 }
b018ddf6
PB
1006}
1007
d197063f
PB
1008static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1009 unsigned size, bool is_write)
1010{
1011 return false;
1012}
1013
1014const MemoryRegionOps unassigned_mem_ops = {
1015 .valid.accepts = unassigned_mem_accepts,
1016 .endianness = DEVICE_NATIVE_ENDIAN,
1017};
1018
d2702032
PB
1019bool memory_region_access_valid(MemoryRegion *mr,
1020 hwaddr addr,
1021 unsigned size,
1022 bool is_write)
093bc2cd 1023{
a014ed07
PB
1024 int access_size_min, access_size_max;
1025 int access_size, i;
897fa7cf 1026
093bc2cd
AK
1027 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1028 return false;
1029 }
1030
a014ed07 1031 if (!mr->ops->valid.accepts) {
093bc2cd
AK
1032 return true;
1033 }
1034
a014ed07
PB
1035 access_size_min = mr->ops->valid.min_access_size;
1036 if (!mr->ops->valid.min_access_size) {
1037 access_size_min = 1;
1038 }
1039
1040 access_size_max = mr->ops->valid.max_access_size;
1041 if (!mr->ops->valid.max_access_size) {
1042 access_size_max = 4;
1043 }
1044
1045 access_size = MAX(MIN(size, access_size_max), access_size_min);
1046 for (i = 0; i < size; i += access_size) {
1047 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1048 is_write)) {
1049 return false;
1050 }
093bc2cd 1051 }
a014ed07 1052
093bc2cd
AK
1053 return true;
1054}
1055
a621f38d 1056static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
a8170e5e 1057 hwaddr addr,
a621f38d 1058 unsigned size)
093bc2cd 1059{
164a4dcd 1060 uint64_t data = 0;
093bc2cd 1061
ce5d2f33
PB
1062 if (mr->ops->read) {
1063 access_with_adjusted_size(addr, &data, size,
1064 mr->ops->impl.min_access_size,
1065 mr->ops->impl.max_access_size,
1066 memory_region_read_accessor, mr);
1067 } else {
1068 access_with_adjusted_size(addr, &data, size, 1, 4,
1069 memory_region_oldmmio_read_accessor, mr);
74901c3b
AK
1070 }
1071
093bc2cd
AK
1072 return data;
1073}
1074
791af8c8
PB
1075static bool memory_region_dispatch_read(MemoryRegion *mr,
1076 hwaddr addr,
1077 uint64_t *pval,
1078 unsigned size)
a621f38d 1079{
791af8c8
PB
1080 if (!memory_region_access_valid(mr, addr, size, false)) {
1081 *pval = unassigned_mem_read(mr, addr, size);
1082 return true;
1083 }
a621f38d 1084
791af8c8
PB
1085 *pval = memory_region_dispatch_read1(mr, addr, size);
1086 adjust_endianness(mr, pval, size);
1087 return false;
a621f38d 1088}
093bc2cd 1089
791af8c8 1090static bool memory_region_dispatch_write(MemoryRegion *mr,
a8170e5e 1091 hwaddr addr,
a621f38d
AK
1092 uint64_t data,
1093 unsigned size)
1094{
897fa7cf 1095 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6 1096 unassigned_mem_write(mr, addr, data, size);
791af8c8 1097 return true;
093bc2cd
AK
1098 }
1099
a621f38d
AK
1100 adjust_endianness(mr, &data, size);
1101
ce5d2f33
PB
1102 if (mr->ops->write) {
1103 access_with_adjusted_size(addr, &data, size,
1104 mr->ops->impl.min_access_size,
1105 mr->ops->impl.max_access_size,
1106 memory_region_write_accessor, mr);
1107 } else {
1108 access_with_adjusted_size(addr, &data, size, 1, 4,
1109 memory_region_oldmmio_write_accessor, mr);
74901c3b 1110 }
791af8c8 1111 return false;
093bc2cd
AK
1112}
1113
093bc2cd 1114void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 1115 Object *owner,
093bc2cd
AK
1116 const MemoryRegionOps *ops,
1117 void *opaque,
1118 const char *name,
1119 uint64_t size)
1120{
2c9b15ca 1121 memory_region_init(mr, owner, name, size);
093bc2cd
AK
1122 mr->ops = ops;
1123 mr->opaque = opaque;
14a3c10a 1124 mr->terminates = true;
97161e17 1125 mr->ram_addr = ~(ram_addr_t)0;
093bc2cd
AK
1126}
1127
1128void memory_region_init_ram(MemoryRegion *mr,
2c9b15ca 1129 Object *owner,
093bc2cd 1130 const char *name,
49946538
HT
1131 uint64_t size,
1132 Error **errp)
093bc2cd 1133{
2c9b15ca 1134 memory_region_init(mr, owner, name, size);
8ea9252a 1135 mr->ram = true;
14a3c10a 1136 mr->terminates = true;
545e92e0 1137 mr->destructor = memory_region_destructor_ram;
49946538 1138 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
0b183fc8
PB
1139}
1140
60786ef3
MT
1141void memory_region_init_resizeable_ram(MemoryRegion *mr,
1142 Object *owner,
1143 const char *name,
1144 uint64_t size,
1145 uint64_t max_size,
1146 void (*resized)(const char*,
1147 uint64_t length,
1148 void *host),
1149 Error **errp)
1150{
1151 memory_region_init(mr, owner, name, size);
1152 mr->ram = true;
1153 mr->terminates = true;
1154 mr->destructor = memory_region_destructor_ram;
1155 mr->ram_addr = qemu_ram_alloc_resizeable(size, max_size, resized, mr, errp);
1156}
1157
0b183fc8
PB
1158#ifdef __linux__
1159void memory_region_init_ram_from_file(MemoryRegion *mr,
1160 struct Object *owner,
1161 const char *name,
1162 uint64_t size,
dbcb8981 1163 bool share,
7f56e740
PB
1164 const char *path,
1165 Error **errp)
0b183fc8
PB
1166{
1167 memory_region_init(mr, owner, name, size);
1168 mr->ram = true;
1169 mr->terminates = true;
1170 mr->destructor = memory_region_destructor_ram;
dbcb8981 1171 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
093bc2cd 1172}
0b183fc8 1173#endif
093bc2cd
AK
1174
1175void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 1176 Object *owner,
093bc2cd
AK
1177 const char *name,
1178 uint64_t size,
1179 void *ptr)
1180{
2c9b15ca 1181 memory_region_init(mr, owner, name, size);
8ea9252a 1182 mr->ram = true;
14a3c10a 1183 mr->terminates = true;
545e92e0 1184 mr->destructor = memory_region_destructor_ram_from_ptr;
ef701d7b
HT
1185
1186 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1187 assert(ptr != NULL);
1188 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
093bc2cd
AK
1189}
1190
e4dc3f59
ND
1191void memory_region_set_skip_dump(MemoryRegion *mr)
1192{
1193 mr->skip_dump = true;
1194}
1195
093bc2cd 1196void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 1197 Object *owner,
093bc2cd
AK
1198 const char *name,
1199 MemoryRegion *orig,
a8170e5e 1200 hwaddr offset,
093bc2cd
AK
1201 uint64_t size)
1202{
2c9b15ca 1203 memory_region_init(mr, owner, name, size);
dfde4e6e
PB
1204 memory_region_ref(orig);
1205 mr->destructor = memory_region_destructor_alias;
093bc2cd
AK
1206 mr->alias = orig;
1207 mr->alias_offset = offset;
1208}
1209
d0a9b5bc 1210void memory_region_init_rom_device(MemoryRegion *mr,
2c9b15ca 1211 Object *owner,
d0a9b5bc 1212 const MemoryRegionOps *ops,
75f5941c 1213 void *opaque,
d0a9b5bc 1214 const char *name,
33e0eb52
HT
1215 uint64_t size,
1216 Error **errp)
d0a9b5bc 1217{
2c9b15ca 1218 memory_region_init(mr, owner, name, size);
7bc2b9cd 1219 mr->ops = ops;
75f5941c 1220 mr->opaque = opaque;
d0a9b5bc 1221 mr->terminates = true;
75c578dc 1222 mr->rom_device = true;
d0a9b5bc 1223 mr->destructor = memory_region_destructor_rom_device;
33e0eb52 1224 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
d0a9b5bc
AK
1225}
1226
30951157 1227void memory_region_init_iommu(MemoryRegion *mr,
2c9b15ca 1228 Object *owner,
30951157
AK
1229 const MemoryRegionIOMMUOps *ops,
1230 const char *name,
1231 uint64_t size)
1232{
2c9b15ca 1233 memory_region_init(mr, owner, name, size);
30951157
AK
1234 mr->iommu_ops = ops,
1235 mr->terminates = true; /* then re-forwards */
06866575 1236 notifier_list_init(&mr->iommu_notify);
30951157
AK
1237}
1238
1660e72d 1239void memory_region_init_reservation(MemoryRegion *mr,
2c9b15ca 1240 Object *owner,
1660e72d
JK
1241 const char *name,
1242 uint64_t size)
1243{
2c9b15ca 1244 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1660e72d
JK
1245}
1246
b4fefef9 1247static void memory_region_finalize(Object *obj)
093bc2cd 1248{
b4fefef9
PC
1249 MemoryRegion *mr = MEMORY_REGION(obj);
1250
093bc2cd 1251 assert(QTAILQ_EMPTY(&mr->subregions));
545e92e0 1252 mr->destructor(mr);
093bc2cd 1253 memory_region_clear_coalescing(mr);
302fa283 1254 g_free((char *)mr->name);
7267c094 1255 g_free(mr->ioeventfds);
093bc2cd
AK
1256}
1257
803c0816
PB
1258Object *memory_region_owner(MemoryRegion *mr)
1259{
22a893e4
PB
1260 Object *obj = OBJECT(mr);
1261 return obj->parent;
803c0816
PB
1262}
1263
46637be2
PB
1264void memory_region_ref(MemoryRegion *mr)
1265{
22a893e4
PB
1266 /* MMIO callbacks most likely will access data that belongs
1267 * to the owner, hence the need to ref/unref the owner whenever
1268 * the memory region is in use.
1269 *
1270 * The memory region is a child of its owner. As long as the
1271 * owner doesn't call unparent itself on the memory region,
1272 * ref-ing the owner will also keep the memory region alive.
1273 * Memory regions without an owner are supposed to never go away,
1274 * but we still ref/unref them for debugging purposes.
1275 */
1276 Object *obj = OBJECT(mr);
1277 if (obj && obj->parent) {
1278 object_ref(obj->parent);
b4fefef9 1279 } else {
22a893e4 1280 object_ref(obj);
46637be2
PB
1281 }
1282}
1283
1284void memory_region_unref(MemoryRegion *mr)
1285{
22a893e4
PB
1286 Object *obj = OBJECT(mr);
1287 if (obj && obj->parent) {
1288 object_unref(obj->parent);
b4fefef9 1289 } else {
22a893e4 1290 object_unref(obj);
46637be2
PB
1291 }
1292}
1293
093bc2cd
AK
1294uint64_t memory_region_size(MemoryRegion *mr)
1295{
08dafab4
AK
1296 if (int128_eq(mr->size, int128_2_64())) {
1297 return UINT64_MAX;
1298 }
1299 return int128_get64(mr->size);
093bc2cd
AK
1300}
1301
5d546d4b 1302const char *memory_region_name(const MemoryRegion *mr)
8991c79b 1303{
d1dd32af
PC
1304 if (!mr->name) {
1305 ((MemoryRegion *)mr)->name =
1306 object_get_canonical_path_component(OBJECT(mr));
1307 }
302fa283 1308 return mr->name;
8991c79b
AK
1309}
1310
8ea9252a
AK
1311bool memory_region_is_ram(MemoryRegion *mr)
1312{
1313 return mr->ram;
1314}
1315
e4dc3f59
ND
1316bool memory_region_is_skip_dump(MemoryRegion *mr)
1317{
1318 return mr->skip_dump;
1319}
1320
55043ba3
AK
1321bool memory_region_is_logging(MemoryRegion *mr)
1322{
1323 return mr->dirty_log_mask;
1324}
1325
ce7923da
AK
1326bool memory_region_is_rom(MemoryRegion *mr)
1327{
1328 return mr->ram && mr->readonly;
1329}
1330
30951157
AK
1331bool memory_region_is_iommu(MemoryRegion *mr)
1332{
1333 return mr->iommu_ops;
1334}
1335
06866575
DG
1336void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1337{
1338 notifier_list_add(&mr->iommu_notify, n);
1339}
1340
1341void memory_region_unregister_iommu_notifier(Notifier *n)
1342{
1343 notifier_remove(n);
1344}
1345
1346void memory_region_notify_iommu(MemoryRegion *mr,
1347 IOMMUTLBEntry entry)
1348{
1349 assert(memory_region_is_iommu(mr));
1350 notifier_list_notify(&mr->iommu_notify, &entry);
1351}
1352
093bc2cd
AK
1353void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1354{
5a583347
AK
1355 uint8_t mask = 1 << client;
1356
59023ef4 1357 memory_region_transaction_begin();
5a583347 1358 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1359 memory_region_update_pending |= mr->enabled;
59023ef4 1360 memory_region_transaction_commit();
093bc2cd
AK
1361}
1362
a8170e5e
AK
1363bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1364 hwaddr size, unsigned client)
093bc2cd 1365{
14a3c10a 1366 assert(mr->terminates);
52159192 1367 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
093bc2cd
AK
1368}
1369
a8170e5e
AK
1370void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1371 hwaddr size)
093bc2cd 1372{
14a3c10a 1373 assert(mr->terminates);
75218e7f 1374 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size);
093bc2cd
AK
1375}
1376
6c279db8
JQ
1377bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1378 hwaddr size, unsigned client)
1379{
1380 bool ret;
1381 assert(mr->terminates);
52159192 1382 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
6c279db8 1383 if (ret) {
a2f4d5be 1384 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
6c279db8
JQ
1385 }
1386 return ret;
1387}
1388
1389
093bc2cd
AK
1390void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1391{
0d673e36 1392 AddressSpace *as;
5a583347
AK
1393 FlatRange *fr;
1394
0d673e36 1395 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
856d7245 1396 FlatView *view = address_space_get_flatview(as);
99e86347 1397 FOR_EACH_FLAT_RANGE(fr, view) {
0d673e36
AK
1398 if (fr->mr == mr) {
1399 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1400 }
5a583347 1401 }
856d7245 1402 flatview_unref(view);
5a583347 1403 }
093bc2cd
AK
1404}
1405
1406void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1407{
fb1cd6f9 1408 if (mr->readonly != readonly) {
59023ef4 1409 memory_region_transaction_begin();
fb1cd6f9 1410 mr->readonly = readonly;
22bde714 1411 memory_region_update_pending |= mr->enabled;
59023ef4 1412 memory_region_transaction_commit();
fb1cd6f9 1413 }
093bc2cd
AK
1414}
1415
5f9a5ea1 1416void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1417{
5f9a5ea1 1418 if (mr->romd_mode != romd_mode) {
59023ef4 1419 memory_region_transaction_begin();
5f9a5ea1 1420 mr->romd_mode = romd_mode;
22bde714 1421 memory_region_update_pending |= mr->enabled;
59023ef4 1422 memory_region_transaction_commit();
d0a9b5bc
AK
1423 }
1424}
1425
a8170e5e
AK
1426void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1427 hwaddr size, unsigned client)
093bc2cd 1428{
14a3c10a 1429 assert(mr->terminates);
a2f4d5be 1430 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
093bc2cd
AK
1431}
1432
a35ba7be
PB
1433int memory_region_get_fd(MemoryRegion *mr)
1434{
1435 if (mr->alias) {
1436 return memory_region_get_fd(mr->alias);
1437 }
1438
1439 assert(mr->terminates);
1440
1441 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1442}
1443
093bc2cd
AK
1444void *memory_region_get_ram_ptr(MemoryRegion *mr)
1445{
1446 if (mr->alias) {
1447 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1448 }
1449
14a3c10a 1450 assert(mr->terminates);
093bc2cd 1451
021d26d1 1452 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
093bc2cd
AK
1453}
1454
0d673e36 1455static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd 1456{
99e86347 1457 FlatView *view;
093bc2cd
AK
1458 FlatRange *fr;
1459 CoalescedMemoryRange *cmr;
1460 AddrRange tmp;
95d2994a 1461 MemoryRegionSection section;
093bc2cd 1462
856d7245 1463 view = address_space_get_flatview(as);
99e86347 1464 FOR_EACH_FLAT_RANGE(fr, view) {
093bc2cd 1465 if (fr->mr == mr) {
95d2994a 1466 section = (MemoryRegionSection) {
f6790af6 1467 .address_space = as,
95d2994a 1468 .offset_within_address_space = int128_get64(fr->addr.start),
052e87b0 1469 .size = fr->addr.size,
95d2994a
AK
1470 };
1471
1472 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1473 int128_get64(fr->addr.start),
1474 int128_get64(fr->addr.size));
093bc2cd
AK
1475 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1476 tmp = addrrange_shift(cmr->addr,
08dafab4
AK
1477 int128_sub(fr->addr.start,
1478 int128_make64(fr->offset_in_region)));
093bc2cd
AK
1479 if (!addrrange_intersects(tmp, fr->addr)) {
1480 continue;
1481 }
1482 tmp = addrrange_intersection(tmp, fr->addr);
95d2994a
AK
1483 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1484 int128_get64(tmp.start),
1485 int128_get64(tmp.size));
093bc2cd
AK
1486 }
1487 }
1488 }
856d7245 1489 flatview_unref(view);
093bc2cd
AK
1490}
1491
0d673e36
AK
1492static void memory_region_update_coalesced_range(MemoryRegion *mr)
1493{
1494 AddressSpace *as;
1495
1496 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1497 memory_region_update_coalesced_range_as(mr, as);
1498 }
1499}
1500
093bc2cd
AK
1501void memory_region_set_coalescing(MemoryRegion *mr)
1502{
1503 memory_region_clear_coalescing(mr);
08dafab4 1504 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
1505}
1506
1507void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1508 hwaddr offset,
093bc2cd
AK
1509 uint64_t size)
1510{
7267c094 1511 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1512
08dafab4 1513 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK
1514 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1515 memory_region_update_coalesced_range(mr);
d410515e 1516 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
1517}
1518
1519void memory_region_clear_coalescing(MemoryRegion *mr)
1520{
1521 CoalescedMemoryRange *cmr;
ab5b3db5 1522 bool updated = false;
093bc2cd 1523
d410515e
JK
1524 qemu_flush_coalesced_mmio_buffer();
1525 mr->flush_coalesced_mmio = false;
1526
093bc2cd
AK
1527 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1528 cmr = QTAILQ_FIRST(&mr->coalesced);
1529 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1530 g_free(cmr);
ab5b3db5
FZ
1531 updated = true;
1532 }
1533
1534 if (updated) {
1535 memory_region_update_coalesced_range(mr);
093bc2cd 1536 }
093bc2cd
AK
1537}
1538
d410515e
JK
1539void memory_region_set_flush_coalesced(MemoryRegion *mr)
1540{
1541 mr->flush_coalesced_mmio = true;
1542}
1543
1544void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1545{
1546 qemu_flush_coalesced_mmio_buffer();
1547 if (QTAILQ_EMPTY(&mr->coalesced)) {
1548 mr->flush_coalesced_mmio = false;
1549 }
1550}
1551
3e9d69e7 1552void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 1553 hwaddr addr,
3e9d69e7
AK
1554 unsigned size,
1555 bool match_data,
1556 uint64_t data,
753d5e14 1557 EventNotifier *e)
3e9d69e7
AK
1558{
1559 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1560 .addr.start = int128_make64(addr),
1561 .addr.size = int128_make64(size),
3e9d69e7
AK
1562 .match_data = match_data,
1563 .data = data,
753d5e14 1564 .e = e,
3e9d69e7
AK
1565 };
1566 unsigned i;
1567
28f362be 1568 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1569 memory_region_transaction_begin();
3e9d69e7
AK
1570 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1571 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1572 break;
1573 }
1574 }
1575 ++mr->ioeventfd_nb;
7267c094 1576 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
1577 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1578 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1579 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1580 mr->ioeventfds[i] = mrfd;
4dc56152 1581 ioeventfd_update_pending |= mr->enabled;
59023ef4 1582 memory_region_transaction_commit();
3e9d69e7
AK
1583}
1584
1585void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 1586 hwaddr addr,
3e9d69e7
AK
1587 unsigned size,
1588 bool match_data,
1589 uint64_t data,
753d5e14 1590 EventNotifier *e)
3e9d69e7
AK
1591{
1592 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1593 .addr.start = int128_make64(addr),
1594 .addr.size = int128_make64(size),
3e9d69e7
AK
1595 .match_data = match_data,
1596 .data = data,
753d5e14 1597 .e = e,
3e9d69e7
AK
1598 };
1599 unsigned i;
1600
28f362be 1601 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1602 memory_region_transaction_begin();
3e9d69e7
AK
1603 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1604 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1605 break;
1606 }
1607 }
1608 assert(i != mr->ioeventfd_nb);
1609 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1610 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1611 --mr->ioeventfd_nb;
7267c094 1612 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1613 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
4dc56152 1614 ioeventfd_update_pending |= mr->enabled;
59023ef4 1615 memory_region_transaction_commit();
3e9d69e7
AK
1616}
1617
feca4ac1 1618static void memory_region_update_container_subregions(MemoryRegion *subregion)
093bc2cd 1619{
0598701a 1620 hwaddr offset = subregion->addr;
feca4ac1 1621 MemoryRegion *mr = subregion->container;
093bc2cd
AK
1622 MemoryRegion *other;
1623
59023ef4
JK
1624 memory_region_transaction_begin();
1625
dfde4e6e 1626 memory_region_ref(subregion);
093bc2cd
AK
1627 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1628 if (subregion->may_overlap || other->may_overlap) {
1629 continue;
1630 }
2c7cfd65 1631 if (int128_ge(int128_make64(offset),
08dafab4
AK
1632 int128_add(int128_make64(other->addr), other->size))
1633 || int128_le(int128_add(int128_make64(offset), subregion->size),
1634 int128_make64(other->addr))) {
093bc2cd
AK
1635 continue;
1636 }
a5e1cbc8 1637#if 0
860329b2
MW
1638 printf("warning: subregion collision %llx/%llx (%s) "
1639 "vs %llx/%llx (%s)\n",
093bc2cd 1640 (unsigned long long)offset,
08dafab4 1641 (unsigned long long)int128_get64(subregion->size),
860329b2
MW
1642 subregion->name,
1643 (unsigned long long)other->addr,
08dafab4 1644 (unsigned long long)int128_get64(other->size),
860329b2 1645 other->name);
a5e1cbc8 1646#endif
093bc2cd
AK
1647 }
1648 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1649 if (subregion->priority >= other->priority) {
1650 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1651 goto done;
1652 }
1653 }
1654 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1655done:
22bde714 1656 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1657 memory_region_transaction_commit();
093bc2cd
AK
1658}
1659
0598701a
PC
1660static void memory_region_add_subregion_common(MemoryRegion *mr,
1661 hwaddr offset,
1662 MemoryRegion *subregion)
1663{
feca4ac1
PB
1664 assert(!subregion->container);
1665 subregion->container = mr;
0598701a 1666 subregion->addr = offset;
feca4ac1 1667 memory_region_update_container_subregions(subregion);
0598701a 1668}
093bc2cd
AK
1669
1670void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 1671 hwaddr offset,
093bc2cd
AK
1672 MemoryRegion *subregion)
1673{
1674 subregion->may_overlap = false;
1675 subregion->priority = 0;
1676 memory_region_add_subregion_common(mr, offset, subregion);
1677}
1678
1679void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 1680 hwaddr offset,
093bc2cd 1681 MemoryRegion *subregion,
a1ff8ae0 1682 int priority)
093bc2cd
AK
1683{
1684 subregion->may_overlap = true;
1685 subregion->priority = priority;
1686 memory_region_add_subregion_common(mr, offset, subregion);
1687}
1688
1689void memory_region_del_subregion(MemoryRegion *mr,
1690 MemoryRegion *subregion)
1691{
59023ef4 1692 memory_region_transaction_begin();
feca4ac1
PB
1693 assert(subregion->container == mr);
1694 subregion->container = NULL;
093bc2cd 1695 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 1696 memory_region_unref(subregion);
22bde714 1697 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1698 memory_region_transaction_commit();
6bba19ba
AK
1699}
1700
1701void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1702{
1703 if (enabled == mr->enabled) {
1704 return;
1705 }
59023ef4 1706 memory_region_transaction_begin();
6bba19ba 1707 mr->enabled = enabled;
22bde714 1708 memory_region_update_pending = true;
59023ef4 1709 memory_region_transaction_commit();
093bc2cd 1710}
1c0ffa58 1711
e7af4c67
MT
1712void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1713{
1714 Int128 s = int128_make64(size);
1715
1716 if (size == UINT64_MAX) {
1717 s = int128_2_64();
1718 }
1719 if (int128_eq(s, mr->size)) {
1720 return;
1721 }
1722 memory_region_transaction_begin();
1723 mr->size = s;
1724 memory_region_update_pending = true;
1725 memory_region_transaction_commit();
1726}
1727
67891b8a 1728static void memory_region_readd_subregion(MemoryRegion *mr)
2282e1af 1729{
feca4ac1 1730 MemoryRegion *container = mr->container;
2282e1af 1731
feca4ac1 1732 if (container) {
67891b8a
PC
1733 memory_region_transaction_begin();
1734 memory_region_ref(mr);
feca4ac1
PB
1735 memory_region_del_subregion(container, mr);
1736 mr->container = container;
1737 memory_region_update_container_subregions(mr);
67891b8a
PC
1738 memory_region_unref(mr);
1739 memory_region_transaction_commit();
2282e1af 1740 }
67891b8a 1741}
2282e1af 1742
67891b8a
PC
1743void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1744{
1745 if (addr != mr->addr) {
1746 mr->addr = addr;
1747 memory_region_readd_subregion(mr);
1748 }
2282e1af
AK
1749}
1750
a8170e5e 1751void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 1752{
4703359e 1753 assert(mr->alias);
4703359e 1754
59023ef4 1755 if (offset == mr->alias_offset) {
4703359e
AK
1756 return;
1757 }
1758
59023ef4
JK
1759 memory_region_transaction_begin();
1760 mr->alias_offset = offset;
22bde714 1761 memory_region_update_pending |= mr->enabled;
59023ef4 1762 memory_region_transaction_commit();
4703359e
AK
1763}
1764
e34911c4
AK
1765ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1766{
e34911c4
AK
1767 return mr->ram_addr;
1768}
1769
a2b257d6
IM
1770uint64_t memory_region_get_alignment(const MemoryRegion *mr)
1771{
1772 return mr->align;
1773}
1774
e2177955
AK
1775static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1776{
1777 const AddrRange *addr = addr_;
1778 const FlatRange *fr = fr_;
1779
1780 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1781 return -1;
1782 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1783 return 1;
1784 }
1785 return 0;
1786}
1787
99e86347 1788static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
e2177955 1789{
99e86347 1790 return bsearch(&addr, view->ranges, view->nr,
e2177955
AK
1791 sizeof(FlatRange), cmp_flatrange_addr);
1792}
1793
feca4ac1 1794bool memory_region_present(MemoryRegion *container, hwaddr addr)
3ce10901 1795{
feca4ac1
PB
1796 MemoryRegion *mr = memory_region_find(container, addr, 1).mr;
1797 if (!mr || (mr == container)) {
3ce10901
PB
1798 return false;
1799 }
dfde4e6e 1800 memory_region_unref(mr);
3ce10901
PB
1801 return true;
1802}
1803
eed2bacf
IM
1804bool memory_region_is_mapped(MemoryRegion *mr)
1805{
1806 return mr->container ? true : false;
1807}
1808
73034e9e 1809MemoryRegionSection memory_region_find(MemoryRegion *mr,
a8170e5e 1810 hwaddr addr, uint64_t size)
e2177955 1811{
052e87b0 1812 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB
1813 MemoryRegion *root;
1814 AddressSpace *as;
1815 AddrRange range;
99e86347 1816 FlatView *view;
73034e9e
PB
1817 FlatRange *fr;
1818
1819 addr += mr->addr;
feca4ac1
PB
1820 for (root = mr; root->container; ) {
1821 root = root->container;
73034e9e
PB
1822 addr += root->addr;
1823 }
e2177955 1824
73034e9e 1825 as = memory_region_to_address_space(root);
eed2bacf
IM
1826 if (!as) {
1827 return ret;
1828 }
73034e9e 1829 range = addrrange_make(int128_make64(addr), int128_make64(size));
99e86347 1830
2b647668
PB
1831 rcu_read_lock();
1832 view = atomic_rcu_read(&as->current_map);
99e86347 1833 fr = flatview_lookup(view, range);
e2177955 1834 if (!fr) {
2b647668 1835 goto out;
e2177955
AK
1836 }
1837
99e86347 1838 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
e2177955
AK
1839 --fr;
1840 }
1841
1842 ret.mr = fr->mr;
73034e9e 1843 ret.address_space = as;
e2177955
AK
1844 range = addrrange_intersection(range, fr->addr);
1845 ret.offset_within_region = fr->offset_in_region;
1846 ret.offset_within_region += int128_get64(int128_sub(range.start,
1847 fr->addr.start));
052e87b0 1848 ret.size = range.size;
e2177955 1849 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 1850 ret.readonly = fr->readonly;
dfde4e6e 1851 memory_region_ref(ret.mr);
2b647668
PB
1852out:
1853 rcu_read_unlock();
e2177955
AK
1854 return ret;
1855}
1856
1d671369 1857void address_space_sync_dirty_bitmap(AddressSpace *as)
86e775c6 1858{
99e86347 1859 FlatView *view;
7664e80c
AK
1860 FlatRange *fr;
1861
856d7245 1862 view = address_space_get_flatview(as);
99e86347 1863 FOR_EACH_FLAT_RANGE(fr, view) {
72e22d2f 1864 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c 1865 }
856d7245 1866 flatview_unref(view);
7664e80c
AK
1867}
1868
1869void memory_global_dirty_log_start(void)
1870{
7664e80c 1871 global_dirty_log = true;
7376e582 1872 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
7664e80c
AK
1873}
1874
1875void memory_global_dirty_log_stop(void)
1876{
7664e80c 1877 global_dirty_log = false;
7376e582 1878 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK
1879}
1880
1881static void listener_add_address_space(MemoryListener *listener,
1882 AddressSpace *as)
1883{
99e86347 1884 FlatView *view;
7664e80c
AK
1885 FlatRange *fr;
1886
221b3a3f 1887 if (listener->address_space_filter
f6790af6 1888 && listener->address_space_filter != as) {
221b3a3f
JG
1889 return;
1890 }
1891
7664e80c 1892 if (global_dirty_log) {
975aefe0
AK
1893 if (listener->log_global_start) {
1894 listener->log_global_start(listener);
1895 }
7664e80c 1896 }
975aefe0 1897
856d7245 1898 view = address_space_get_flatview(as);
99e86347 1899 FOR_EACH_FLAT_RANGE(fr, view) {
7664e80c
AK
1900 MemoryRegionSection section = {
1901 .mr = fr->mr,
f6790af6 1902 .address_space = as,
7664e80c 1903 .offset_within_region = fr->offset_in_region,
052e87b0 1904 .size = fr->addr.size,
7664e80c 1905 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 1906 .readonly = fr->readonly,
7664e80c 1907 };
975aefe0
AK
1908 if (listener->region_add) {
1909 listener->region_add(listener, &section);
1910 }
7664e80c 1911 }
856d7245 1912 flatview_unref(view);
7664e80c
AK
1913}
1914
f6790af6 1915void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
7664e80c 1916{
72e22d2f 1917 MemoryListener *other = NULL;
0d673e36 1918 AddressSpace *as;
72e22d2f 1919
7376e582 1920 listener->address_space_filter = filter;
72e22d2f
AK
1921 if (QTAILQ_EMPTY(&memory_listeners)
1922 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1923 memory_listeners)->priority) {
1924 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1925 } else {
1926 QTAILQ_FOREACH(other, &memory_listeners, link) {
1927 if (listener->priority < other->priority) {
1928 break;
1929 }
1930 }
1931 QTAILQ_INSERT_BEFORE(other, listener, link);
1932 }
0d673e36
AK
1933
1934 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1935 listener_add_address_space(listener, as);
1936 }
7664e80c
AK
1937}
1938
1939void memory_listener_unregister(MemoryListener *listener)
1940{
72e22d2f 1941 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 1942}
e2177955 1943
7dca8043 1944void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 1945{
ac95190e 1946 memory_region_ref(root);
59023ef4 1947 memory_region_transaction_begin();
8786db7c
AK
1948 as->root = root;
1949 as->current_map = g_new(FlatView, 1);
1950 flatview_init(as->current_map);
4c19eb72
AK
1951 as->ioeventfd_nb = 0;
1952 as->ioeventfds = NULL;
0d673e36 1953 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 1954 as->name = g_strdup(name ? name : "anonymous");
ac1970fb 1955 address_space_init_dispatch(as);
f43793c7
PB
1956 memory_region_update_pending |= root->enabled;
1957 memory_region_transaction_commit();
1c0ffa58 1958}
658b2224 1959
374f2981 1960static void do_address_space_destroy(AddressSpace *as)
83f3c251 1961{
078c44f4
DG
1962 MemoryListener *listener;
1963
83f3c251 1964 address_space_destroy_dispatch(as);
078c44f4
DG
1965
1966 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1967 assert(listener->address_space_filter != as);
1968 }
1969
856d7245 1970 flatview_unref(as->current_map);
7dca8043 1971 g_free(as->name);
4c19eb72 1972 g_free(as->ioeventfds);
ac95190e 1973 memory_region_unref(as->root);
83f3c251
AK
1974}
1975
374f2981
PB
1976void address_space_destroy(AddressSpace *as)
1977{
ac95190e
PB
1978 MemoryRegion *root = as->root;
1979
374f2981
PB
1980 /* Flush out anything from MemoryListeners listening in on this */
1981 memory_region_transaction_begin();
1982 as->root = NULL;
1983 memory_region_transaction_commit();
1984 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
6e48e8f9 1985 address_space_unregister(as);
374f2981
PB
1986
1987 /* At this point, as->dispatch and as->current_map are dummy
1988 * entries that the guest should never use. Wait for the old
1989 * values to expire before freeing the data.
1990 */
ac95190e 1991 as->root = root;
374f2981
PB
1992 call_rcu(as, do_address_space_destroy, rcu);
1993}
1994
791af8c8 1995bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
acbbec5d 1996{
791af8c8 1997 return memory_region_dispatch_read(mr, addr, pval, size);
acbbec5d
AK
1998}
1999
791af8c8 2000bool io_mem_write(MemoryRegion *mr, hwaddr addr,
acbbec5d
AK
2001 uint64_t val, unsigned size)
2002{
791af8c8 2003 return memory_region_dispatch_write(mr, addr, val, size);
acbbec5d
AK
2004}
2005
314e2987
BS
2006typedef struct MemoryRegionList MemoryRegionList;
2007
2008struct MemoryRegionList {
2009 const MemoryRegion *mr;
314e2987
BS
2010 QTAILQ_ENTRY(MemoryRegionList) queue;
2011};
2012
2013typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2014
2015static void mtree_print_mr(fprintf_function mon_printf, void *f,
2016 const MemoryRegion *mr, unsigned int level,
a8170e5e 2017 hwaddr base,
9479c57a 2018 MemoryRegionListHead *alias_print_queue)
314e2987 2019{
9479c57a
JK
2020 MemoryRegionList *new_ml, *ml, *next_ml;
2021 MemoryRegionListHead submr_print_queue;
314e2987
BS
2022 const MemoryRegion *submr;
2023 unsigned int i;
2024
7ea692b2 2025 if (!mr || !mr->enabled) {
314e2987
BS
2026 return;
2027 }
2028
2029 for (i = 0; i < level; i++) {
2030 mon_printf(f, " ");
2031 }
2032
2033 if (mr->alias) {
2034 MemoryRegionList *ml;
2035 bool found = false;
2036
2037 /* check if the alias is already in the queue */
9479c57a 2038 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
f54bb15f 2039 if (ml->mr == mr->alias) {
314e2987
BS
2040 found = true;
2041 }
2042 }
2043
2044 if (!found) {
2045 ml = g_new(MemoryRegionList, 1);
2046 ml->mr = mr->alias;
9479c57a 2047 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 2048 }
4896d74b
JK
2049 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2050 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2051 "-" TARGET_FMT_plx "\n",
314e2987 2052 base + mr->addr,
08dafab4 2053 base + mr->addr
fd1d9926
AW
2054 + (int128_nz(mr->size) ?
2055 (hwaddr)int128_get64(int128_sub(mr->size,
2056 int128_one())) : 0),
4b474ba7 2057 mr->priority,
5f9a5ea1
JK
2058 mr->romd_mode ? 'R' : '-',
2059 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2060 : '-',
3fb18b4d
PC
2061 memory_region_name(mr),
2062 memory_region_name(mr->alias),
314e2987 2063 mr->alias_offset,
08dafab4 2064 mr->alias_offset
a66670c7
AK
2065 + (int128_nz(mr->size) ?
2066 (hwaddr)int128_get64(int128_sub(mr->size,
2067 int128_one())) : 0));
314e2987 2068 } else {
4896d74b
JK
2069 mon_printf(f,
2070 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
314e2987 2071 base + mr->addr,
08dafab4 2072 base + mr->addr
fd1d9926
AW
2073 + (int128_nz(mr->size) ?
2074 (hwaddr)int128_get64(int128_sub(mr->size,
2075 int128_one())) : 0),
4b474ba7 2076 mr->priority,
5f9a5ea1
JK
2077 mr->romd_mode ? 'R' : '-',
2078 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2079 : '-',
3fb18b4d 2080 memory_region_name(mr));
314e2987 2081 }
9479c57a
JK
2082
2083 QTAILQ_INIT(&submr_print_queue);
2084
314e2987 2085 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
2086 new_ml = g_new(MemoryRegionList, 1);
2087 new_ml->mr = submr;
2088 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2089 if (new_ml->mr->addr < ml->mr->addr ||
2090 (new_ml->mr->addr == ml->mr->addr &&
2091 new_ml->mr->priority > ml->mr->priority)) {
2092 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2093 new_ml = NULL;
2094 break;
2095 }
2096 }
2097 if (new_ml) {
2098 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2099 }
2100 }
2101
2102 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2103 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2104 alias_print_queue);
2105 }
2106
88365e47 2107 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 2108 g_free(ml);
314e2987
BS
2109 }
2110}
2111
2112void mtree_info(fprintf_function mon_printf, void *f)
2113{
2114 MemoryRegionListHead ml_head;
2115 MemoryRegionList *ml, *ml2;
0d673e36 2116 AddressSpace *as;
314e2987
BS
2117
2118 QTAILQ_INIT(&ml_head);
2119
0d673e36 2120 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
0d673e36
AK
2121 mon_printf(f, "%s\n", as->name);
2122 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
b9f9be88
BS
2123 }
2124
2125 mon_printf(f, "aliases\n");
314e2987
BS
2126 /* print aliased regions */
2127 QTAILQ_FOREACH(ml, &ml_head, queue) {
f54bb15f
PB
2128 mon_printf(f, "%s\n", memory_region_name(ml->mr));
2129 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
314e2987
BS
2130 }
2131
2132 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 2133 g_free(ml);
314e2987 2134 }
314e2987 2135}
b4fefef9
PC
2136
2137static const TypeInfo memory_region_info = {
2138 .parent = TYPE_OBJECT,
2139 .name = TYPE_MEMORY_REGION,
2140 .instance_size = sizeof(MemoryRegion),
2141 .instance_init = memory_region_initfn,
2142 .instance_finalize = memory_region_finalize,
2143};
2144
2145static void memory_register_types(void)
2146{
2147 type_register_static(&memory_region_info);
2148}
2149
2150type_init(memory_register_types)