The die-level as the first PC-specific cpu topology is added to the leagcy
cpu topology model, which has one die per package implicitly and only the
numbers of sockets/cores/threads are configurable.
In the new model with die-level support, the total number of logical
processors (including offline) on board will be calculated as:
#cpus = #sockets * #dies * #cores * #threads
and considering compatibility, the default value for #dies would be
initialized to one in x86_cpu_initfn() and pc_machine_initfn().
Signed-off-by: Like Xu <like.xu@linux.intel.com>
Message-Id: <
20190612084104.34984-2-like.xu@linux.intel.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
- /* if APIC ID is not set, set it based on socket/core/thread properties */
+ /*
+ * If APIC ID is not set,
+ * set it based on socket/die/core/thread properties.
+ */
if (cpu->apic_id == UNASSIGNED_APIC_ID) {
if (cpu->apic_id == UNASSIGNED_APIC_ID) {
- int max_socket = (ms->smp.max_cpus - 1) / smp_threads / smp_cores;
+ int max_socket = (ms->smp.max_cpus - 1) /
+ smp_threads / smp_cores / pcms->smp_dies;
if (cpu->socket_id < 0) {
error_setg(errp, "CPU socket-id is not set");
if (cpu->socket_id < 0) {
error_setg(errp, "CPU socket-id is not set");
pcms->smbus_enabled = true;
pcms->sata_enabled = true;
pcms->pit_enabled = true;
pcms->smbus_enabled = true;
pcms->sata_enabled = true;
pcms->pit_enabled = true;
pc_system_flash_create(pcms);
}
pc_system_flash_create(pcms);
}
* PCMachineState:
* @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
* @boot_cpus: number of present VCPUs
* PCMachineState:
* @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
* @boot_cpus: number of present VCPUs
+ * @smp_dies: number of dies per one package
*/
struct PCMachineState {
/*< private >*/
*/
struct PCMachineState {
/*< private >*/
bool apic_xrupt_override;
unsigned apic_id_limit;
uint16_t boot_cpus;
bool apic_xrupt_override;
unsigned apic_id_limit;
uint16_t boot_cpus;
/* NUMA information: */
uint64_t numa_nodes;
/* NUMA information: */
uint64_t numa_nodes;
CPUX86State *env = &cpu->env;
FeatureWord w;
CPUX86State *env = &cpu->env;
FeatureWord w;
cpu_set_cpustate_pointers(cpu);
object_property_add(obj, "family", "int",
cpu_set_cpustate_pointers(cpu);
object_property_add(obj, "family", "int",
uint64_t xss;
TPRAccess tpr_access_type;
uint64_t xss;
TPRAccess tpr_access_type;
} CPUX86State;
struct kvm_msrs;
} CPUX86State;
struct kvm_msrs;