]> git.proxmox.com Git - mirror_qemu.git/commitdiff
target/arm: Move ARM_CPU_IRQ/FIQ definitions to 'cpu-qom.h' header
authorPhilippe Mathieu-Daudé <philmd@linaro.org>
Thu, 18 Jan 2024 20:06:38 +0000 (21:06 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 26 Jan 2024 11:30:49 +0000 (11:30 +0000)
The ARM_CPU_IRQ/FIQ definitions are used to index the GPIO
IRQ created calling qdev_init_gpio_in() in ARMCPU instance_init()
handler. To allow non-ARM code to raise interrupt on ARM cores,
move they to 'target/arm/cpu-qom.h' which is non-ARM specific and
can be included by any hw/ file.

File list to include the new header generated using:

  $ git grep -wEl 'ARM_CPU_(\w*IRQ|FIQ)'

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240118200643.29037-18-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
31 files changed:
hw/arm/allwinner-a10.c
hw/arm/allwinner-h3.c
hw/arm/allwinner-r40.c
hw/arm/armv7m.c
hw/arm/aspeed_ast2400.c
hw/arm/aspeed_ast2600.c
hw/arm/bcm2836.c
hw/arm/exynos4210.c
hw/arm/fsl-imx25.c
hw/arm/fsl-imx31.c
hw/arm/fsl-imx6.c
hw/arm/fsl-imx6ul.c
hw/arm/fsl-imx7.c
hw/arm/highbank.c
hw/arm/integratorcp.c
hw/arm/musicpal.c
hw/arm/npcm7xx.c
hw/arm/omap1.c
hw/arm/omap2.c
hw/arm/realview.c
hw/arm/sbsa-ref.c
hw/arm/strongarm.c
hw/arm/versatilepb.c
hw/arm/vexpress.c
hw/arm/virt.c
hw/arm/xilinx_zynq.c
hw/arm/xlnx-versal.c
hw/arm/xlnx-zynqmp.c
target/arm/cpu-qom.h
target/arm/cpu.c
target/arm/cpu.h

index 0135632996cc133a8a92c9781ffebf7d3bd3ff82..581dd45edf0427f1062fcb65a92e93a5440adab6 100644 (file)
@@ -26,6 +26,7 @@
 #include "hw/boards.h"
 #include "hw/usb/hcd-ohci.h"
 #include "hw/loader.h"
+#include "target/arm/cpu-qom.h"
 
 #define AW_A10_SRAM_A_BASE      0x00000000
 #define AW_A10_DRAMC_BASE       0x01c01000
index f05afddf7e0416f61a87b9d2b583e0c10972256c..2d684b5287b46ca3e38420a739542994a5338a2f 100644 (file)
@@ -30,6 +30,7 @@
 #include "hw/loader.h"
 #include "sysemu/sysemu.h"
 #include "hw/arm/allwinner-h3.h"
+#include "target/arm/cpu-qom.h"
 
 /* Memory map */
 const hwaddr allwinner_h3_memmap[] = {
index a28e5b3886a50f38e7442809c7cde67f2c15f1bf..79976b0b54dfca638f39370aa31af858ed4ca827 100644 (file)
@@ -33,6 +33,7 @@
 #include "sysemu/sysemu.h"
 #include "hw/arm/allwinner-r40.h"
 #include "hw/misc/allwinner-r40-dramc.h"
+#include "target/arm/cpu-qom.h"
 
 /* Memory map */
 const hwaddr allwinner_r40_memmap[] = {
index edcd8adc748991b7775a8504e26506aaf1da76c7..7c68525a9e6a140f823646a0959e7c85ff9172a8 100644 (file)
@@ -23,6 +23,7 @@
 #include "target/arm/idau.h"
 #include "target/arm/cpu.h"
 #include "target/arm/cpu-features.h"
+#include "target/arm/cpu-qom.h"
 #include "migration/vmstate.h"
 
 /* Bitbanded IO.  Each word corresponds to a single bit.  */
index 0baa2ff96e46b377a0ebf78ace2460bcea48bfc9..ad76035528fd1d7c33535f1d03a1f3c02811d697 100644 (file)
@@ -21,6 +21,7 @@
 #include "hw/i2c/aspeed_i2c.h"
 #include "net/net.h"
 #include "sysemu/sysemu.h"
+#include "target/arm/cpu-qom.h"
 
 #define ASPEED_SOC_IOMEM_SIZE       0x00200000
 
index 3a9a303ab8bacbf98581aa1a570142386df2251a..386a88d4e0f9b6bef91132538f05ad02d750189d 100644 (file)
@@ -16,6 +16,7 @@
 #include "hw/i2c/aspeed_i2c.h"
 #include "net/net.h"
 #include "sysemu/sysemu.h"
+#include "target/arm/cpu-qom.h"
 
 #define ASPEED_SOC_IOMEM_SIZE       0x00200000
 #define ASPEED_SOC_DPMCU_SIZE       0x00040000
index b0674a22a6c26f212a196da1593cb040c6e5843a..58a78780d2bb136a2ac50bc4b191db6031b3d8d8 100644 (file)
@@ -15,6 +15,7 @@
 #include "hw/arm/bcm2836.h"
 #include "hw/arm/raspi_platform.h"
 #include "hw/sysbus.h"
+#include "target/arm/cpu-qom.h"
 
 struct BCM283XClass {
     /*< private >*/
index af511a153ddacfe4542d04cb090e7826a236b0db..6c428d8eeb41766084e995afbe487f8e788da6e5 100644 (file)
@@ -36,6 +36,7 @@
 #include "hw/arm/exynos4210.h"
 #include "hw/sd/sdhci.h"
 #include "hw/usb/hcd-ehci.h"
+#include "target/arm/cpu-qom.h"
 
 #define EXYNOS4210_CHIPID_ADDR         0x10000000
 
index 9d2fb75a689702b3b4a802a3b2b69a028ae68526..4a49507ef19f9960d5ec769fa20e9157e34aae00 100644 (file)
@@ -28,6 +28,7 @@
 #include "sysemu/sysemu.h"
 #include "hw/qdev-properties.h"
 #include "chardev/char.h"
+#include "target/arm/cpu-qom.h"
 
 #define IMX25_ESDHC_CAPABILITIES     0x07e20000
 
index c0584e4dfcdc7a9dd03d26576f8bf459ea1d4650..4b8d9b8e4fec45d8e13f658160d893c4bfe20c78 100644 (file)
@@ -26,6 +26,7 @@
 #include "exec/address-spaces.h"
 #include "hw/qdev-properties.h"
 #include "chardev/char.h"
+#include "target/arm/cpu-qom.h"
 
 static void fsl_imx31_init(Object *obj)
 {
index af2e982b0527539bc386b01d046a3ec4cdb60abc..42f90588251c39dc1eb0648241e7eb8f47c76eea 100644 (file)
@@ -29,6 +29,7 @@
 #include "chardev/char.h"
 #include "qemu/error-report.h"
 #include "qemu/module.h"
+#include "target/arm/cpu-qom.h"
 
 #define IMX6_ESDHC_CAPABILITIES     0x057834b4
 
index e37b69a5e16dc5830bfa603f5839d1dc2faf2cde..486a009deb82e62036c076e621e9c1f43a4a0e12 100644 (file)
@@ -25,6 +25,7 @@
 #include "sysemu/sysemu.h"
 #include "qemu/error-report.h"
 #include "qemu/module.h"
+#include "target/arm/cpu-qom.h"
 
 #define NAME_SIZE 20
 
index 474cfdc87c6f2ebc6c443d20a464332661e0052b..572810949187efe16fdba0e7260c1fbec893e38e 100644 (file)
@@ -26,6 +26,7 @@
 #include "sysemu/sysemu.h"
 #include "qemu/error-report.h"
 #include "qemu/module.h"
+#include "target/arm/cpu-qom.h"
 
 #define NAME_SIZE 20
 
index c21e18d08fdb54f7cdd08148972fc19222845027..e6e27d69af54f4211eed9bf26de3b722657de998 100644 (file)
@@ -36,6 +36,7 @@
 #include "qemu/log.h"
 #include "qom/object.h"
 #include "cpu.h"
+#include "target/arm/cpu-qom.h"
 
 #define SMP_BOOT_ADDR           0x100
 #define SMP_BOOT_REG            0x40
index 1830e1d785088a647a970e139ad0893c178dc22f..5600616a4ddd42423801094fa7617829acb9e7c7 100644 (file)
@@ -28,6 +28,7 @@
 #include "hw/sd/sd.h"
 #include "qom/object.h"
 #include "audio/audio.h"
+#include "target/arm/cpu-qom.h"
 
 #define TYPE_INTEGRATOR_CM "integrator_core"
 OBJECT_DECLARE_SIMPLE_TYPE(IntegratorCMState, INTEGRATOR_CM)
index 6987472871e5dfa82732e77e240d52a59f4b71dc..a2d25139e20dd1fb49c8484736de382b99f5069b 100644 (file)
@@ -39,6 +39,7 @@
 #include "hw/net/mv88w8618_eth.h"
 #include "audio/audio.h"
 #include "qemu/error-report.h"
+#include "target/arm/cpu-qom.h"
 
 #define MP_MISC_BASE            0x80002000
 #define MP_MISC_SIZE            0x00001000
index 7fb0a233b2d23661683cec2021671c3c63fee69d..e3243a520d82f19d829cec72fad1ec66aec43cb6 100644 (file)
@@ -26,6 +26,7 @@
 #include "qapi/error.h"
 #include "qemu/units.h"
 #include "sysemu/sysemu.h"
+#include "target/arm/cpu-qom.h"
 
 /*
  * This covers the whole MMIO space. We'll use this to catch any MMIO accesses
index d5438156ee9ed86bbffb9f518ccd6abf78ca1fb2..86ee336e59922a4204c67c05344256ed149f0b97 100644 (file)
@@ -40,6 +40,7 @@
 #include "hw/sysbus.h"
 #include "qemu/cutils.h"
 #include "qemu/bcd.h"
+#include "target/arm/cpu-qom.h"
 
 static inline void omap_log_badwidth(const char *funcname, hwaddr addr, int sz)
 {
index f170728e7ece7a46b109ce431114f3b69a0ff38e..f159fb73ea939fdd3dea2569040b158625e50566 100644 (file)
@@ -39,6 +39,7 @@
 #include "hw/sysbus.h"
 #include "hw/boards.h"
 #include "audio/audio.h"
+#include "target/arm/cpu-qom.h"
 
 /* Enhanced Audio Controller (CODEC only) */
 struct omap_eac_s {
index 132217b2eddbd675790d2b4599d4ed832f8a9be9..566deff9ced1db4755d1c1f901e945e3d39f7f89 100644 (file)
@@ -30,6 +30,7 @@
 #include "hw/i2c/arm_sbcon_i2c.h"
 #include "hw/sd/sd.h"
 #include "audio/audio.h"
+#include "target/arm/cpu-qom.h"
 
 #define SMP_BOOT_ADDR 0xe0000000
 #define SMP_BOOTREG_ADDR 0x10000030
index b8857d1e9e4ad21e9f143aed65aa6a2e8920a2fc..d6081bfc41f043302416ae8f25425a06089fbd84 100644 (file)
@@ -50,6 +50,7 @@
 #include "net/net.h"
 #include "qapi/qmp/qlist.h"
 #include "qom/object.h"
+#include "target/arm/cpu-qom.h"
 
 #define RAMLIMIT_GB 8192
 #define RAMLIMIT_BYTES (RAMLIMIT_GB * GiB)
index fef3638acaa3dafec48308f079ae2b73e460df13..75637869cbaaabc74605cae9ac3a83070880966e 100644 (file)
@@ -46,6 +46,7 @@
 #include "qemu/cutils.h"
 #include "qemu/log.h"
 #include "qom/object.h"
+#include "target/arm/cpu-qom.h"
 
 //#define DEBUG
 
index 4b2257787b21d4d146d03fe622a7c5e468aaabd5..15b5ed0cedc794e7539d7e0bd605f1b414aedf50 100644 (file)
@@ -27,6 +27,7 @@
 #include "hw/sd/sd.h"
 #include "qom/object.h"
 #include "audio/audio.h"
+#include "target/arm/cpu-qom.h"
 
 #define VERSATILE_FLASH_ADDR 0x34000000
 #define VERSATILE_FLASH_SIZE (64 * 1024 * 1024)
index fd981f4c33ef448c80e593e3f304834e670c3c6f..49dbcdcbf0c13b0643617db58b4322f235e327e6 100644 (file)
@@ -46,6 +46,7 @@
 #include "qapi/qmp/qlist.h"
 #include "qom/object.h"
 #include "audio/audio.h"
+#include "target/arm/cpu-qom.h"
 
 #define VEXPRESS_BOARD_ID 0x8e0
 #define VEXPRESS_FLASH_SIZE (64 * 1024 * 1024)
index 1e0df6ea3ad9cf192b69028031a06594d6c85e9e..64802446cb13a4dcee18bdd647c26a1414eed762 100644 (file)
@@ -73,6 +73,7 @@
 #include "standard-headers/linux/input.h"
 #include "hw/arm/smmuv3.h"
 #include "hw/acpi/acpi.h"
+#include "target/arm/cpu-qom.h"
 #include "target/arm/internals.h"
 #include "target/arm/multiprocessing.h"
 #include "hw/mem/pc-dimm.h"
index d4c817ecdc0c66f848edae3565355a5b2104b9c6..5809fc32af93d34e98aaf7716f6f4e988e6518e1 100644 (file)
@@ -38,6 +38,7 @@
 #include "sysemu/reset.h"
 #include "qom/object.h"
 #include "exec/tswap.h"
+#include "target/arm/cpu-qom.h"
 
 #define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9")
 OBJECT_DECLARE_SIMPLE_TYPE(ZynqMachineState, ZYNQ_MACHINE)
index 9600551c442255b564f5b77021ff693b494d8817..87fdb39d43005259f9e3d0ee43bcf31c8920963e 100644 (file)
@@ -23,6 +23,7 @@
 #include "hw/misc/unimp.h"
 #include "hw/arm/xlnx-versal.h"
 #include "qemu/log.h"
+#include "target/arm/cpu-qom.h"
 
 #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
 #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f")
index 5905a330151809fb2fbed7c1bedbec40fbbab6f7..38cb34942f8480a613f0fed15c9891aa63b7bd95 100644 (file)
@@ -25,6 +25,7 @@
 #include "sysemu/kvm.h"
 #include "sysemu/sysemu.h"
 #include "kvm_arm.h"
+#include "target/arm/cpu-qom.h"
 
 #define GIC_NUM_SPI_INTR 160
 
index 77bbc1f13c99d65ec54e3b7cb092ed76eacdd6ef..8e032691dbf93742750c60adba2cd4b9d58d090d 100644 (file)
@@ -36,6 +36,12 @@ DECLARE_CLASS_CHECKERS(AArch64CPUClass, AARCH64_CPU,
 #define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU
 #define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX)
 
+/* Meanings of the ARMCPU object's four inbound GPIO lines */
+#define ARM_CPU_IRQ 0
+#define ARM_CPU_FIQ 1
+#define ARM_CPU_VIRQ 2
+#define ARM_CPU_VFIQ 3
+
 /* For M profile, some registers are banked secure vs non-secure;
  * these are represented as a 2-element array where the first element
  * is the non-secure copy and the second is the secure copy.
index 04296f2928ff2025641897c1981292cbfad9e267..4807a4fea0df7e559be001210d6105ab7a7c1b1b 100644 (file)
@@ -48,6 +48,7 @@
 #include "disas/capstone.h"
 #include "fpu/softfloat.h"
 #include "cpregs.h"
+#include "target/arm/cpu-qom.h"
 
 static void arm_cpu_set_pc(CPUState *cs, vaddr value)
 {
index d6a79482adb276e41f0ef0d5b3c29a5ce76125d6..e8df41d642e792dc91b2478b181c75ac0329e386 100644 (file)
 #define offsetofhigh32(S, M) (offsetof(S, M) + sizeof(uint32_t))
 #endif
 
-/* Meanings of the ARMCPU object's four inbound GPIO lines */
-#define ARM_CPU_IRQ 0
-#define ARM_CPU_FIQ 1
-#define ARM_CPU_VIRQ 2
-#define ARM_CPU_VFIQ 3
-
 /* ARM-specific extra insn start words:
  * 1: Conditional execution bits
  * 2: Partial exception syndrome for data aborts