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1965aae3 PA |
1 | #ifndef _ASM_X86_PGTABLE_H |
2 | #define _ASM_X86_PGTABLE_H | |
6c386655 | 3 | |
c47c1b1f | 4 | #include <asm/page.h> |
1adcaafe | 5 | #include <asm/e820.h> |
c47c1b1f | 6 | |
8d19c99f | 7 | #include <asm/pgtable_types.h> |
b2bc2731 | 8 | |
8a7b12f7 | 9 | /* |
10 | * Macro to mark a page protection value as UC- | |
11 | */ | |
d85f3334 JG |
12 | #define pgprot_noncached(prot) \ |
13 | ((boot_cpu_data.x86 > 3) \ | |
14 | ? (__pgprot(pgprot_val(prot) | \ | |
15 | cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \ | |
8a7b12f7 | 16 | : (prot)) |
17 | ||
4614139c | 18 | #ifndef __ASSEMBLY__ |
55a6ca25 PA |
19 | #include <asm/x86_init.h> |
20 | ||
ef6bea6d | 21 | void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd); |
e1a58320 SS |
22 | void ptdump_walk_pgd_level_checkwx(void); |
23 | ||
24 | #ifdef CONFIG_DEBUG_WX | |
25 | #define debug_checkwx() ptdump_walk_pgd_level_checkwx() | |
26 | #else | |
27 | #define debug_checkwx() do { } while (0) | |
28 | #endif | |
ef6bea6d | 29 | |
8405b122 JF |
30 | /* |
31 | * ZERO_PAGE is a global shared page that is always zero: used | |
32 | * for zero-mapped memory areas etc.. | |
33 | */ | |
277d5b40 AK |
34 | extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] |
35 | __visible; | |
8405b122 JF |
36 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) |
37 | ||
e3ed910d JF |
38 | extern spinlock_t pgd_lock; |
39 | extern struct list_head pgd_list; | |
8405b122 | 40 | |
617d34d9 JF |
41 | extern struct mm_struct *pgd_page_get_mm(struct page *page); |
42 | ||
54321d94 JF |
43 | #ifdef CONFIG_PARAVIRT |
44 | #include <asm/paravirt.h> | |
45 | #else /* !CONFIG_PARAVIRT */ | |
46 | #define set_pte(ptep, pte) native_set_pte(ptep, pte) | |
47 | #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte) | |
2609ae6d | 48 | #define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd) |
54321d94 | 49 | |
54321d94 JF |
50 | #define set_pte_atomic(ptep, pte) \ |
51 | native_set_pte_atomic(ptep, pte) | |
52 | ||
53 | #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) | |
54 | ||
55 | #ifndef __PAGETABLE_PUD_FOLDED | |
56 | #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) | |
57 | #define pgd_clear(pgd) native_pgd_clear(pgd) | |
58 | #endif | |
59 | ||
60 | #ifndef set_pud | |
61 | # define set_pud(pudp, pud) native_set_pud(pudp, pud) | |
62 | #endif | |
63 | ||
64 | #ifndef __PAGETABLE_PMD_FOLDED | |
65 | #define pud_clear(pud) native_pud_clear(pud) | |
66 | #endif | |
67 | ||
68 | #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) | |
69 | #define pmd_clear(pmd) native_pmd_clear(pmd) | |
70 | ||
71 | #define pte_update(mm, addr, ptep) do { } while (0) | |
54321d94 | 72 | |
54321d94 JF |
73 | #define pgd_val(x) native_pgd_val(x) |
74 | #define __pgd(x) native_make_pgd(x) | |
75 | ||
76 | #ifndef __PAGETABLE_PUD_FOLDED | |
77 | #define pud_val(x) native_pud_val(x) | |
78 | #define __pud(x) native_make_pud(x) | |
79 | #endif | |
80 | ||
81 | #ifndef __PAGETABLE_PMD_FOLDED | |
82 | #define pmd_val(x) native_pmd_val(x) | |
83 | #define __pmd(x) native_make_pmd(x) | |
84 | #endif | |
85 | ||
86 | #define pte_val(x) native_pte_val(x) | |
87 | #define __pte(x) native_make_pte(x) | |
88 | ||
224101ed JF |
89 | #define arch_end_context_switch(prev) do {} while(0) |
90 | ||
54321d94 JF |
91 | #endif /* CONFIG_PARAVIRT */ |
92 | ||
4614139c JF |
93 | /* |
94 | * The following only work if pte_present() is true. | |
95 | * Undefined behaviour if not.. | |
96 | */ | |
3cbaeafe JP |
97 | static inline int pte_dirty(pte_t pte) |
98 | { | |
a15af1c9 | 99 | return pte_flags(pte) & _PAGE_DIRTY; |
3cbaeafe JP |
100 | } |
101 | ||
a927cb83 DH |
102 | |
103 | static inline u32 read_pkru(void) | |
104 | { | |
105 | if (boot_cpu_has(X86_FEATURE_OSPKE)) | |
106 | return __read_pkru(); | |
107 | return 0; | |
108 | } | |
109 | ||
3cbaeafe JP |
110 | static inline int pte_young(pte_t pte) |
111 | { | |
a15af1c9 | 112 | return pte_flags(pte) & _PAGE_ACCESSED; |
3cbaeafe JP |
113 | } |
114 | ||
c164e038 KS |
115 | static inline int pmd_dirty(pmd_t pmd) |
116 | { | |
117 | return pmd_flags(pmd) & _PAGE_DIRTY; | |
118 | } | |
3cbaeafe | 119 | |
f2d6bfe9 JW |
120 | static inline int pmd_young(pmd_t pmd) |
121 | { | |
122 | return pmd_flags(pmd) & _PAGE_ACCESSED; | |
123 | } | |
124 | ||
3cbaeafe JP |
125 | static inline int pte_write(pte_t pte) |
126 | { | |
a15af1c9 | 127 | return pte_flags(pte) & _PAGE_RW; |
3cbaeafe JP |
128 | } |
129 | ||
3cbaeafe JP |
130 | static inline int pte_huge(pte_t pte) |
131 | { | |
a15af1c9 | 132 | return pte_flags(pte) & _PAGE_PSE; |
4614139c JF |
133 | } |
134 | ||
3cbaeafe JP |
135 | static inline int pte_global(pte_t pte) |
136 | { | |
a15af1c9 | 137 | return pte_flags(pte) & _PAGE_GLOBAL; |
3cbaeafe JP |
138 | } |
139 | ||
140 | static inline int pte_exec(pte_t pte) | |
141 | { | |
a15af1c9 | 142 | return !(pte_flags(pte) & _PAGE_NX); |
3cbaeafe JP |
143 | } |
144 | ||
7e675137 NP |
145 | static inline int pte_special(pte_t pte) |
146 | { | |
c819f37e | 147 | return pte_flags(pte) & _PAGE_SPECIAL; |
7e675137 NP |
148 | } |
149 | ||
91030ca1 HD |
150 | static inline unsigned long pte_pfn(pte_t pte) |
151 | { | |
152 | return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT; | |
153 | } | |
154 | ||
087975b0 AM |
155 | static inline unsigned long pmd_pfn(pmd_t pmd) |
156 | { | |
f70abb0f | 157 | return (pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT; |
087975b0 AM |
158 | } |
159 | ||
0ee364eb MG |
160 | static inline unsigned long pud_pfn(pud_t pud) |
161 | { | |
f70abb0f | 162 | return (pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT; |
0ee364eb MG |
163 | } |
164 | ||
91030ca1 HD |
165 | #define pte_page(pte) pfn_to_page(pte_pfn(pte)) |
166 | ||
3cbaeafe JP |
167 | static inline int pmd_large(pmd_t pte) |
168 | { | |
027ef6c8 | 169 | return pmd_flags(pte) & _PAGE_PSE; |
3cbaeafe JP |
170 | } |
171 | ||
f2d6bfe9 | 172 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
f2d6bfe9 JW |
173 | static inline int pmd_trans_huge(pmd_t pmd) |
174 | { | |
5c7fb56e | 175 | return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; |
f2d6bfe9 | 176 | } |
4b7167b9 AA |
177 | |
178 | static inline int has_transparent_hugepage(void) | |
179 | { | |
180 | return cpu_has_pse; | |
181 | } | |
5c7fb56e DW |
182 | |
183 | #ifdef __HAVE_ARCH_PTE_DEVMAP | |
184 | static inline int pmd_devmap(pmd_t pmd) | |
185 | { | |
186 | return !!(pmd_val(pmd) & _PAGE_DEVMAP); | |
187 | } | |
188 | #endif | |
f2d6bfe9 JW |
189 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ |
190 | ||
6522869c JF |
191 | static inline pte_t pte_set_flags(pte_t pte, pteval_t set) |
192 | { | |
193 | pteval_t v = native_pte_val(pte); | |
194 | ||
195 | return native_make_pte(v | set); | |
196 | } | |
197 | ||
198 | static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) | |
199 | { | |
200 | pteval_t v = native_pte_val(pte); | |
201 | ||
202 | return native_make_pte(v & ~clear); | |
203 | } | |
204 | ||
3cbaeafe JP |
205 | static inline pte_t pte_mkclean(pte_t pte) |
206 | { | |
6522869c | 207 | return pte_clear_flags(pte, _PAGE_DIRTY); |
3cbaeafe JP |
208 | } |
209 | ||
210 | static inline pte_t pte_mkold(pte_t pte) | |
211 | { | |
6522869c | 212 | return pte_clear_flags(pte, _PAGE_ACCESSED); |
3cbaeafe JP |
213 | } |
214 | ||
215 | static inline pte_t pte_wrprotect(pte_t pte) | |
216 | { | |
6522869c | 217 | return pte_clear_flags(pte, _PAGE_RW); |
3cbaeafe JP |
218 | } |
219 | ||
220 | static inline pte_t pte_mkexec(pte_t pte) | |
221 | { | |
6522869c | 222 | return pte_clear_flags(pte, _PAGE_NX); |
3cbaeafe JP |
223 | } |
224 | ||
225 | static inline pte_t pte_mkdirty(pte_t pte) | |
226 | { | |
0f8975ec | 227 | return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); |
3cbaeafe JP |
228 | } |
229 | ||
230 | static inline pte_t pte_mkyoung(pte_t pte) | |
231 | { | |
6522869c | 232 | return pte_set_flags(pte, _PAGE_ACCESSED); |
3cbaeafe JP |
233 | } |
234 | ||
235 | static inline pte_t pte_mkwrite(pte_t pte) | |
236 | { | |
6522869c | 237 | return pte_set_flags(pte, _PAGE_RW); |
3cbaeafe JP |
238 | } |
239 | ||
240 | static inline pte_t pte_mkhuge(pte_t pte) | |
241 | { | |
6522869c | 242 | return pte_set_flags(pte, _PAGE_PSE); |
3cbaeafe JP |
243 | } |
244 | ||
245 | static inline pte_t pte_clrhuge(pte_t pte) | |
246 | { | |
6522869c | 247 | return pte_clear_flags(pte, _PAGE_PSE); |
3cbaeafe JP |
248 | } |
249 | ||
250 | static inline pte_t pte_mkglobal(pte_t pte) | |
251 | { | |
6522869c | 252 | return pte_set_flags(pte, _PAGE_GLOBAL); |
3cbaeafe JP |
253 | } |
254 | ||
255 | static inline pte_t pte_clrglobal(pte_t pte) | |
256 | { | |
6522869c | 257 | return pte_clear_flags(pte, _PAGE_GLOBAL); |
3cbaeafe | 258 | } |
4614139c | 259 | |
7e675137 NP |
260 | static inline pte_t pte_mkspecial(pte_t pte) |
261 | { | |
6522869c | 262 | return pte_set_flags(pte, _PAGE_SPECIAL); |
7e675137 NP |
263 | } |
264 | ||
01c8f1c4 DW |
265 | static inline pte_t pte_mkdevmap(pte_t pte) |
266 | { | |
267 | return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP); | |
268 | } | |
269 | ||
f2d6bfe9 JW |
270 | static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) |
271 | { | |
272 | pmdval_t v = native_pmd_val(pmd); | |
273 | ||
274 | return __pmd(v | set); | |
275 | } | |
276 | ||
277 | static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) | |
278 | { | |
279 | pmdval_t v = native_pmd_val(pmd); | |
280 | ||
281 | return __pmd(v & ~clear); | |
282 | } | |
283 | ||
284 | static inline pmd_t pmd_mkold(pmd_t pmd) | |
285 | { | |
286 | return pmd_clear_flags(pmd, _PAGE_ACCESSED); | |
287 | } | |
288 | ||
590a471c MK |
289 | static inline pmd_t pmd_mkclean(pmd_t pmd) |
290 | { | |
291 | return pmd_clear_flags(pmd, _PAGE_DIRTY); | |
292 | } | |
293 | ||
f2d6bfe9 JW |
294 | static inline pmd_t pmd_wrprotect(pmd_t pmd) |
295 | { | |
296 | return pmd_clear_flags(pmd, _PAGE_RW); | |
297 | } | |
298 | ||
299 | static inline pmd_t pmd_mkdirty(pmd_t pmd) | |
300 | { | |
0f8975ec | 301 | return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); |
f2d6bfe9 JW |
302 | } |
303 | ||
f25748e3 DW |
304 | static inline pmd_t pmd_mkdevmap(pmd_t pmd) |
305 | { | |
306 | return pmd_set_flags(pmd, _PAGE_DEVMAP); | |
307 | } | |
308 | ||
f2d6bfe9 JW |
309 | static inline pmd_t pmd_mkhuge(pmd_t pmd) |
310 | { | |
311 | return pmd_set_flags(pmd, _PAGE_PSE); | |
312 | } | |
313 | ||
314 | static inline pmd_t pmd_mkyoung(pmd_t pmd) | |
315 | { | |
316 | return pmd_set_flags(pmd, _PAGE_ACCESSED); | |
317 | } | |
318 | ||
319 | static inline pmd_t pmd_mkwrite(pmd_t pmd) | |
320 | { | |
321 | return pmd_set_flags(pmd, _PAGE_RW); | |
322 | } | |
323 | ||
324 | static inline pmd_t pmd_mknotpresent(pmd_t pmd) | |
325 | { | |
21d9ee3e | 326 | return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE); |
f2d6bfe9 JW |
327 | } |
328 | ||
2bf01f9f | 329 | #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY |
0f8975ec PE |
330 | static inline int pte_soft_dirty(pte_t pte) |
331 | { | |
332 | return pte_flags(pte) & _PAGE_SOFT_DIRTY; | |
333 | } | |
334 | ||
335 | static inline int pmd_soft_dirty(pmd_t pmd) | |
336 | { | |
337 | return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; | |
338 | } | |
339 | ||
340 | static inline pte_t pte_mksoft_dirty(pte_t pte) | |
341 | { | |
342 | return pte_set_flags(pte, _PAGE_SOFT_DIRTY); | |
343 | } | |
344 | ||
345 | static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) | |
346 | { | |
347 | return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); | |
348 | } | |
349 | ||
a7b76174 MS |
350 | static inline pte_t pte_clear_soft_dirty(pte_t pte) |
351 | { | |
352 | return pte_clear_flags(pte, _PAGE_SOFT_DIRTY); | |
353 | } | |
354 | ||
355 | static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) | |
356 | { | |
357 | return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY); | |
358 | } | |
359 | ||
2bf01f9f CG |
360 | #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ |
361 | ||
b534816b JF |
362 | /* |
363 | * Mask out unsupported bits in a present pgprot. Non-present pgprots | |
364 | * can use those bits for other purposes, so leave them be. | |
365 | */ | |
366 | static inline pgprotval_t massage_pgprot(pgprot_t pgprot) | |
367 | { | |
368 | pgprotval_t protval = pgprot_val(pgprot); | |
369 | ||
370 | if (protval & _PAGE_PRESENT) | |
371 | protval &= __supported_pte_mask; | |
372 | ||
373 | return protval; | |
374 | } | |
375 | ||
6fdc05d4 JF |
376 | static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) |
377 | { | |
b534816b JF |
378 | return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) | |
379 | massage_pgprot(pgprot)); | |
6fdc05d4 JF |
380 | } |
381 | ||
382 | static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) | |
383 | { | |
b534816b JF |
384 | return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) | |
385 | massage_pgprot(pgprot)); | |
6fdc05d4 JF |
386 | } |
387 | ||
38472311 IM |
388 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) |
389 | { | |
390 | pteval_t val = pte_val(pte); | |
391 | ||
392 | /* | |
393 | * Chop off the NX bit (if present), and add the NX portion of | |
394 | * the newprot (if present): | |
395 | */ | |
1c12c4cf | 396 | val &= _PAGE_CHG_MASK; |
b534816b | 397 | val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK; |
38472311 IM |
398 | |
399 | return __pte(val); | |
400 | } | |
401 | ||
c489f125 JW |
402 | static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) |
403 | { | |
404 | pmdval_t val = pmd_val(pmd); | |
405 | ||
406 | val &= _HPAGE_CHG_MASK; | |
407 | val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK; | |
408 | ||
409 | return __pmd(val); | |
410 | } | |
411 | ||
1c12c4cf VP |
412 | /* mprotect needs to preserve PAT bits when updating vm_page_prot */ |
413 | #define pgprot_modify pgprot_modify | |
414 | static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) | |
415 | { | |
416 | pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; | |
417 | pgprotval_t addbits = pgprot_val(newprot); | |
418 | return __pgprot(preservebits | addbits); | |
419 | } | |
420 | ||
bbac8c6d TK |
421 | #define pte_pgprot(x) __pgprot(pte_flags(x)) |
422 | #define pmd_pgprot(x) __pgprot(pmd_flags(x)) | |
423 | #define pud_pgprot(x) __pgprot(pud_flags(x)) | |
c6ca18eb | 424 | |
b534816b | 425 | #define canon_pgprot(p) __pgprot(massage_pgprot(p)) |
1e8e23bc | 426 | |
1adcaafe | 427 | static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, |
d85f3334 JG |
428 | enum page_cache_mode pcm, |
429 | enum page_cache_mode new_pcm) | |
afc7d20c | 430 | { |
1adcaafe | 431 | /* |
55a6ca25 | 432 | * PAT type is always WB for untracked ranges, so no need to check. |
1adcaafe | 433 | */ |
8a271389 | 434 | if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) |
1adcaafe SS |
435 | return 1; |
436 | ||
afc7d20c | 437 | /* |
438 | * Certain new memtypes are not allowed with certain | |
439 | * requested memtype: | |
440 | * - request is uncached, return cannot be write-back | |
441 | * - request is write-combine, return cannot be write-back | |
ecb2feba TK |
442 | * - request is write-through, return cannot be write-back |
443 | * - request is write-through, return cannot be write-combine | |
afc7d20c | 444 | */ |
d85f3334 JG |
445 | if ((pcm == _PAGE_CACHE_MODE_UC_MINUS && |
446 | new_pcm == _PAGE_CACHE_MODE_WB) || | |
447 | (pcm == _PAGE_CACHE_MODE_WC && | |
ecb2feba TK |
448 | new_pcm == _PAGE_CACHE_MODE_WB) || |
449 | (pcm == _PAGE_CACHE_MODE_WT && | |
450 | new_pcm == _PAGE_CACHE_MODE_WB) || | |
451 | (pcm == _PAGE_CACHE_MODE_WT && | |
452 | new_pcm == _PAGE_CACHE_MODE_WC)) { | |
afc7d20c | 453 | return 0; |
454 | } | |
455 | ||
456 | return 1; | |
457 | } | |
458 | ||
458a3e64 TH |
459 | pmd_t *populate_extra_pmd(unsigned long vaddr); |
460 | pte_t *populate_extra_pte(unsigned long vaddr); | |
4614139c JF |
461 | #endif /* __ASSEMBLY__ */ |
462 | ||
96a388de | 463 | #ifdef CONFIG_X86_32 |
a1ce3928 | 464 | # include <asm/pgtable_32.h> |
96a388de | 465 | #else |
a1ce3928 | 466 | # include <asm/pgtable_64.h> |
96a388de | 467 | #endif |
6c386655 | 468 | |
aca159db | 469 | #ifndef __ASSEMBLY__ |
f476961c | 470 | #include <linux/mm_types.h> |
fa0f281c | 471 | #include <linux/mmdebug.h> |
4cbeb51b | 472 | #include <linux/log2.h> |
aca159db | 473 | |
a034a010 JF |
474 | static inline int pte_none(pte_t pte) |
475 | { | |
476 | return !pte.pte; | |
477 | } | |
478 | ||
8de01da3 JF |
479 | #define __HAVE_ARCH_PTE_SAME |
480 | static inline int pte_same(pte_t a, pte_t b) | |
481 | { | |
482 | return a.pte == b.pte; | |
483 | } | |
484 | ||
7c683851 | 485 | static inline int pte_present(pte_t a) |
c46a7c81 MG |
486 | { |
487 | return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE); | |
488 | } | |
489 | ||
3565fce3 DW |
490 | #ifdef __HAVE_ARCH_PTE_DEVMAP |
491 | static inline int pte_devmap(pte_t a) | |
492 | { | |
493 | return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP; | |
494 | } | |
495 | #endif | |
496 | ||
2c3cf556 | 497 | #define pte_accessible pte_accessible |
20841405 | 498 | static inline bool pte_accessible(struct mm_struct *mm, pte_t a) |
2c3cf556 | 499 | { |
20841405 RR |
500 | if (pte_flags(a) & _PAGE_PRESENT) |
501 | return true; | |
502 | ||
21d9ee3e | 503 | if ((pte_flags(a) & _PAGE_PROTNONE) && |
20841405 RR |
504 | mm_tlb_flush_pending(mm)) |
505 | return true; | |
506 | ||
507 | return false; | |
2c3cf556 RR |
508 | } |
509 | ||
eb63657e | 510 | static inline int pte_hidden(pte_t pte) |
dfec072e | 511 | { |
eb63657e | 512 | return pte_flags(pte) & _PAGE_HIDDEN; |
dfec072e VN |
513 | } |
514 | ||
649e8ef6 JF |
515 | static inline int pmd_present(pmd_t pmd) |
516 | { | |
027ef6c8 AA |
517 | /* |
518 | * Checking for _PAGE_PSE is needed too because | |
519 | * split_huge_page will temporarily clear the present bit (but | |
520 | * the _PAGE_PSE flag will remain set at all times while the | |
521 | * _PAGE_PRESENT bit is clear). | |
522 | */ | |
21d9ee3e | 523 | return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE); |
649e8ef6 JF |
524 | } |
525 | ||
e7bb4b6d MG |
526 | #ifdef CONFIG_NUMA_BALANCING |
527 | /* | |
528 | * These work without NUMA balancing but the kernel does not care. See the | |
529 | * comment in include/asm-generic/pgtable.h | |
530 | */ | |
531 | static inline int pte_protnone(pte_t pte) | |
532 | { | |
e3a1f6ca DV |
533 | return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT)) |
534 | == _PAGE_PROTNONE; | |
e7bb4b6d MG |
535 | } |
536 | ||
537 | static inline int pmd_protnone(pmd_t pmd) | |
538 | { | |
e3a1f6ca DV |
539 | return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT)) |
540 | == _PAGE_PROTNONE; | |
e7bb4b6d MG |
541 | } |
542 | #endif /* CONFIG_NUMA_BALANCING */ | |
543 | ||
4fea801a JF |
544 | static inline int pmd_none(pmd_t pmd) |
545 | { | |
546 | /* Only check low word on 32-bit platforms, since it might be | |
547 | out of sync with upper half. */ | |
26c8e317 | 548 | return (unsigned long)native_pmd_val(pmd) == 0; |
4fea801a JF |
549 | } |
550 | ||
3ffb3564 JF |
551 | static inline unsigned long pmd_page_vaddr(pmd_t pmd) |
552 | { | |
f70abb0f | 553 | return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd)); |
3ffb3564 JF |
554 | } |
555 | ||
e5f7f202 IM |
556 | /* |
557 | * Currently stuck as a macro due to indirect forward reference to | |
558 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
559 | */ | |
f70abb0f TK |
560 | #define pmd_page(pmd) \ |
561 | pfn_to_page((pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT) | |
20063ca4 | 562 | |
e24d7eee JF |
563 | /* |
564 | * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD] | |
565 | * | |
566 | * this macro returns the index of the entry in the pmd page which would | |
567 | * control the given virtual address | |
568 | */ | |
ce0c0f9e | 569 | static inline unsigned long pmd_index(unsigned long address) |
e24d7eee JF |
570 | { |
571 | return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); | |
572 | } | |
573 | ||
97e2817d JF |
574 | /* |
575 | * Conversion functions: convert a page and protection to a page entry, | |
576 | * and a page entry and page directory to the page they refer to. | |
577 | * | |
578 | * (Currently stuck as a macro because of indirect forward reference | |
579 | * to linux/mm.h:page_to_nid()) | |
580 | */ | |
581 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) | |
582 | ||
346309cf JF |
583 | /* |
584 | * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE] | |
585 | * | |
586 | * this function returns the index of the entry in the pte page which would | |
587 | * control the given virtual address | |
588 | */ | |
ce0c0f9e | 589 | static inline unsigned long pte_index(unsigned long address) |
346309cf JF |
590 | { |
591 | return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); | |
592 | } | |
593 | ||
3fbc2444 JF |
594 | static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) |
595 | { | |
596 | return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); | |
597 | } | |
598 | ||
99510238 JF |
599 | static inline int pmd_bad(pmd_t pmd) |
600 | { | |
18a7a199 | 601 | return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE; |
99510238 JF |
602 | } |
603 | ||
cc290ca3 JF |
604 | static inline unsigned long pages_to_mb(unsigned long npg) |
605 | { | |
606 | return npg >> (20 - PAGE_SHIFT); | |
607 | } | |
608 | ||
98233368 | 609 | #if CONFIG_PGTABLE_LEVELS > 2 |
deb79cfb JF |
610 | static inline int pud_none(pud_t pud) |
611 | { | |
26c8e317 | 612 | return native_pud_val(pud) == 0; |
deb79cfb JF |
613 | } |
614 | ||
5ba7c913 JF |
615 | static inline int pud_present(pud_t pud) |
616 | { | |
18a7a199 | 617 | return pud_flags(pud) & _PAGE_PRESENT; |
5ba7c913 | 618 | } |
6fff47e3 JF |
619 | |
620 | static inline unsigned long pud_page_vaddr(pud_t pud) | |
621 | { | |
f70abb0f | 622 | return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud)); |
6fff47e3 | 623 | } |
f476961c | 624 | |
e5f7f202 IM |
625 | /* |
626 | * Currently stuck as a macro due to indirect forward reference to | |
627 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
628 | */ | |
f70abb0f TK |
629 | #define pud_page(pud) \ |
630 | pfn_to_page((pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT) | |
01ade20d JF |
631 | |
632 | /* Find an entry in the second-level page table.. */ | |
633 | static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) | |
634 | { | |
635 | return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); | |
636 | } | |
3180fba0 | 637 | |
3f6cbef1 JF |
638 | static inline int pud_large(pud_t pud) |
639 | { | |
e2f5bda9 | 640 | return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == |
3f6cbef1 JF |
641 | (_PAGE_PSE | _PAGE_PRESENT); |
642 | } | |
a61bb29a JF |
643 | |
644 | static inline int pud_bad(pud_t pud) | |
645 | { | |
18a7a199 | 646 | return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; |
a61bb29a | 647 | } |
e2f5bda9 JF |
648 | #else |
649 | static inline int pud_large(pud_t pud) | |
650 | { | |
651 | return 0; | |
652 | } | |
98233368 | 653 | #endif /* CONFIG_PGTABLE_LEVELS > 2 */ |
5ba7c913 | 654 | |
98233368 | 655 | #if CONFIG_PGTABLE_LEVELS > 3 |
9f38d7e8 JF |
656 | static inline int pgd_present(pgd_t pgd) |
657 | { | |
18a7a199 | 658 | return pgd_flags(pgd) & _PAGE_PRESENT; |
9f38d7e8 | 659 | } |
c5f040b1 JF |
660 | |
661 | static inline unsigned long pgd_page_vaddr(pgd_t pgd) | |
662 | { | |
663 | return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); | |
664 | } | |
777cba16 | 665 | |
e5f7f202 IM |
666 | /* |
667 | * Currently stuck as a macro due to indirect forward reference to | |
668 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
669 | */ | |
670 | #define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT) | |
7cfb8102 JF |
671 | |
672 | /* to find an entry in a page-table-directory. */ | |
ce0c0f9e | 673 | static inline unsigned long pud_index(unsigned long address) |
7cfb8102 JF |
674 | { |
675 | return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); | |
676 | } | |
3d081b18 JF |
677 | |
678 | static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address) | |
679 | { | |
680 | return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address); | |
681 | } | |
30f10316 JF |
682 | |
683 | static inline int pgd_bad(pgd_t pgd) | |
684 | { | |
18a7a199 | 685 | return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE; |
30f10316 | 686 | } |
7325cc2e JF |
687 | |
688 | static inline int pgd_none(pgd_t pgd) | |
689 | { | |
26c8e317 | 690 | return !native_pgd_val(pgd); |
7325cc2e | 691 | } |
98233368 | 692 | #endif /* CONFIG_PGTABLE_LEVELS > 3 */ |
9f38d7e8 | 693 | |
4614139c JF |
694 | #endif /* __ASSEMBLY__ */ |
695 | ||
fb15a9b3 JF |
696 | /* |
697 | * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD] | |
698 | * | |
699 | * this macro returns the index of the entry in the pgd page which would | |
700 | * control the given virtual address | |
701 | */ | |
702 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) | |
703 | ||
704 | /* | |
705 | * pgd_offset() returns a (pgd_t *) | |
706 | * pgd_index() is used get the offset into the pgd page's array of pgd_t's; | |
707 | */ | |
708 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address))) | |
709 | /* | |
710 | * a shortcut which implies the use of the kernel's pgd, instead | |
711 | * of a process's | |
712 | */ | |
713 | #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) | |
714 | ||
715 | ||
68db065c JF |
716 | #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) |
717 | #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) | |
718 | ||
195466dc JF |
719 | #ifndef __ASSEMBLY__ |
720 | ||
2c1b284e | 721 | extern int direct_gbpages; |
22ddfcaa | 722 | void init_mem_mapping(void); |
8d57470d | 723 | void early_alloc_pgt_buf(void); |
2c1b284e | 724 | |
4891645e JF |
725 | /* local pte updates need not use xchg for locking */ |
726 | static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) | |
727 | { | |
728 | pte_t res = *ptep; | |
729 | ||
730 | /* Pure native function needs no input for mm, addr */ | |
731 | native_pte_clear(NULL, 0, ptep); | |
732 | return res; | |
733 | } | |
734 | ||
f2d6bfe9 JW |
735 | static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) |
736 | { | |
737 | pmd_t res = *pmdp; | |
738 | ||
739 | native_pmd_clear(pmdp); | |
740 | return res; | |
741 | } | |
742 | ||
4891645e JF |
743 | static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr, |
744 | pte_t *ptep , pte_t pte) | |
745 | { | |
746 | native_set_pte(ptep, pte); | |
747 | } | |
748 | ||
0a47de52 AA |
749 | static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr, |
750 | pmd_t *pmdp , pmd_t pmd) | |
751 | { | |
752 | native_set_pmd(pmdp, pmd); | |
753 | } | |
754 | ||
195466dc JF |
755 | #ifndef CONFIG_PARAVIRT |
756 | /* | |
757 | * Rules for using pte_update - it must be called after any PTE update which | |
758 | * has not been done using the set_pte / clear_pte interfaces. It is used by | |
759 | * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE | |
760 | * updates should either be sets, clears, or set_pte_atomic for P->P | |
761 | * transitions, which means this hook should only be called for user PTEs. | |
762 | * This hook implies a P->P protection or access change has taken place, which | |
d6ccc3ec | 763 | * requires a subsequent TLB flush. |
195466dc JF |
764 | */ |
765 | #define pte_update(mm, addr, ptep) do { } while (0) | |
195466dc JF |
766 | #endif |
767 | ||
195466dc JF |
768 | /* |
769 | * We only update the dirty/accessed state if we set | |
770 | * the dirty bit by hand in the kernel, since the hardware | |
771 | * will do the accessed bit for us, and we don't want to | |
772 | * race with other CPU's that might be updating the dirty | |
773 | * bit at the same time. | |
774 | */ | |
bea41808 JF |
775 | struct vm_area_struct; |
776 | ||
195466dc | 777 | #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS |
ee5aa8d3 JF |
778 | extern int ptep_set_access_flags(struct vm_area_struct *vma, |
779 | unsigned long address, pte_t *ptep, | |
780 | pte_t entry, int dirty); | |
195466dc JF |
781 | |
782 | #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG | |
f9fbf1a3 JF |
783 | extern int ptep_test_and_clear_young(struct vm_area_struct *vma, |
784 | unsigned long addr, pte_t *ptep); | |
195466dc JF |
785 | |
786 | #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH | |
c20311e1 JF |
787 | extern int ptep_clear_flush_young(struct vm_area_struct *vma, |
788 | unsigned long address, pte_t *ptep); | |
195466dc JF |
789 | |
790 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR | |
3cbaeafe JP |
791 | static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, |
792 | pte_t *ptep) | |
195466dc JF |
793 | { |
794 | pte_t pte = native_ptep_get_and_clear(ptep); | |
795 | pte_update(mm, addr, ptep); | |
796 | return pte; | |
797 | } | |
798 | ||
799 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL | |
3cbaeafe JP |
800 | static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, |
801 | unsigned long addr, pte_t *ptep, | |
802 | int full) | |
195466dc JF |
803 | { |
804 | pte_t pte; | |
805 | if (full) { | |
806 | /* | |
807 | * Full address destruction in progress; paravirt does not | |
808 | * care about updates and native needs no locking | |
809 | */ | |
810 | pte = native_local_ptep_get_and_clear(ptep); | |
811 | } else { | |
812 | pte = ptep_get_and_clear(mm, addr, ptep); | |
813 | } | |
814 | return pte; | |
815 | } | |
816 | ||
817 | #define __HAVE_ARCH_PTEP_SET_WRPROTECT | |
3cbaeafe JP |
818 | static inline void ptep_set_wrprotect(struct mm_struct *mm, |
819 | unsigned long addr, pte_t *ptep) | |
195466dc | 820 | { |
d8d89827 | 821 | clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte); |
195466dc JF |
822 | pte_update(mm, addr, ptep); |
823 | } | |
824 | ||
2ac13462 | 825 | #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0) |
61c77326 | 826 | |
f2d6bfe9 JW |
827 | #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) |
828 | ||
829 | #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS | |
830 | extern int pmdp_set_access_flags(struct vm_area_struct *vma, | |
831 | unsigned long address, pmd_t *pmdp, | |
832 | pmd_t entry, int dirty); | |
833 | ||
834 | #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG | |
835 | extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, | |
836 | unsigned long addr, pmd_t *pmdp); | |
837 | ||
838 | #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH | |
839 | extern int pmdp_clear_flush_young(struct vm_area_struct *vma, | |
840 | unsigned long address, pmd_t *pmdp); | |
841 | ||
842 | ||
f2d6bfe9 JW |
843 | #define __HAVE_ARCH_PMD_WRITE |
844 | static inline int pmd_write(pmd_t pmd) | |
845 | { | |
846 | return pmd_flags(pmd) & _PAGE_RW; | |
847 | } | |
848 | ||
8809aa2d AK |
849 | #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR |
850 | static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr, | |
f2d6bfe9 JW |
851 | pmd_t *pmdp) |
852 | { | |
d6ccc3ec | 853 | return native_pmdp_get_and_clear(pmdp); |
f2d6bfe9 JW |
854 | } |
855 | ||
856 | #define __HAVE_ARCH_PMDP_SET_WRPROTECT | |
857 | static inline void pmdp_set_wrprotect(struct mm_struct *mm, | |
858 | unsigned long addr, pmd_t *pmdp) | |
859 | { | |
860 | clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp); | |
f2d6bfe9 JW |
861 | } |
862 | ||
85958b46 JF |
863 | /* |
864 | * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); | |
865 | * | |
866 | * dst - pointer to pgd range anwhere on a pgd page | |
867 | * src - "" | |
868 | * count - the number of pgds to copy. | |
869 | * | |
870 | * dst and src can be on the same page, but the range must not overlap, | |
871 | * and must not cross a page boundary. | |
872 | */ | |
873 | static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) | |
874 | { | |
875 | memcpy(dst, src, count * sizeof(pgd_t)); | |
876 | } | |
877 | ||
4cbeb51b DH |
878 | #define PTE_SHIFT ilog2(PTRS_PER_PTE) |
879 | static inline int page_level_shift(enum pg_level level) | |
880 | { | |
881 | return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; | |
882 | } | |
883 | static inline unsigned long page_level_size(enum pg_level level) | |
884 | { | |
885 | return 1UL << page_level_shift(level); | |
886 | } | |
887 | static inline unsigned long page_level_mask(enum pg_level level) | |
888 | { | |
889 | return ~(page_level_size(level) - 1); | |
890 | } | |
85958b46 | 891 | |
602e0186 KS |
892 | /* |
893 | * The x86 doesn't have any external MMU info: the kernel page | |
894 | * tables contain all the necessary information. | |
895 | */ | |
896 | static inline void update_mmu_cache(struct vm_area_struct *vma, | |
897 | unsigned long addr, pte_t *ptep) | |
898 | { | |
899 | } | |
900 | static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, | |
901 | unsigned long addr, pmd_t *pmd) | |
902 | { | |
903 | } | |
85958b46 | 904 | |
2bf01f9f | 905 | #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY |
fa0f281c CG |
906 | static inline pte_t pte_swp_mksoft_dirty(pte_t pte) |
907 | { | |
fa0f281c CG |
908 | return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY); |
909 | } | |
910 | ||
911 | static inline int pte_swp_soft_dirty(pte_t pte) | |
912 | { | |
fa0f281c CG |
913 | return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY; |
914 | } | |
915 | ||
916 | static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) | |
917 | { | |
fa0f281c CG |
918 | return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY); |
919 | } | |
2bf01f9f | 920 | #endif |
fa0f281c | 921 | |
33a709b2 DH |
922 | #define PKRU_AD_BIT 0x1 |
923 | #define PKRU_WD_BIT 0x2 | |
84594296 | 924 | #define PKRU_BITS_PER_PKEY 2 |
33a709b2 DH |
925 | |
926 | static inline bool __pkru_allows_read(u32 pkru, u16 pkey) | |
927 | { | |
84594296 | 928 | int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY; |
33a709b2 DH |
929 | return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits)); |
930 | } | |
931 | ||
932 | static inline bool __pkru_allows_write(u32 pkru, u16 pkey) | |
933 | { | |
84594296 | 934 | int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY; |
33a709b2 DH |
935 | /* |
936 | * Access-disable disables writes too so we need to check | |
937 | * both bits here. | |
938 | */ | |
939 | return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits)); | |
940 | } | |
941 | ||
942 | static inline u16 pte_flags_pkey(unsigned long pte_flags) | |
943 | { | |
944 | #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS | |
945 | /* ifdef to avoid doing 59-bit shift on 32-bit values */ | |
946 | return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0; | |
947 | #else | |
948 | return 0; | |
949 | #endif | |
950 | } | |
951 | ||
195466dc JF |
952 | #include <asm-generic/pgtable.h> |
953 | #endif /* __ASSEMBLY__ */ | |
954 | ||
1965aae3 | 955 | #endif /* _ASM_X86_PGTABLE_H */ |